Convert CONFIG_SPL_NAND_LOAD et al to Kconfig
authorTom Rini <trini@konsulko.com>
Wed, 22 Sep 2021 18:50:29 +0000 (14:50 -0400)
committerTom Rini <trini@konsulko.com>
Wed, 6 Oct 2021 13:16:23 +0000 (09:16 -0400)
This converts the following to Kconfig:
   CONFIG_SPL_NAND_LOAD
   CONFIG_SYS_NAND_BLOCK_SIZE
   CONFIG_SYS_NAND_PAGE_SIZE
   CONFIG_SYS_NAND_OOBSIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
134 files changed:
arch/arm/include/asm/arch-lpc32xx/config.h
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/T1024RDB_NAND_defconfig
configs/T1042D4RDB_NAND_defconfig
configs/T2080QDS_NAND_defconfig
configs/T2080RDB_NAND_defconfig
configs/T2080RDB_revD_NAND_defconfig
configs/am335x_baltos_defconfig
configs/am335x_evm_defconfig
configs/am335x_evm_spiboot_defconfig
configs/am335x_guardian_defconfig
configs/am335x_hs_evm_defconfig
configs/am335x_hs_evm_uart_defconfig
configs/am335x_igep003x_defconfig
configs/am3517_evm_defconfig
configs/am43xx_evm_defconfig
configs/am43xx_evm_rtconly_defconfig
configs/am43xx_evm_usbhost_boot_defconfig
configs/am43xx_hs_evm_defconfig
configs/at91sam9n12ek_nandflash_defconfig
configs/at91sam9x5ek_dataflash_defconfig
configs/at91sam9x5ek_nandflash_defconfig
configs/axm_defconfig
configs/brppt1_nand_defconfig
configs/chiliboard_defconfig
configs/cm_t335_defconfig
configs/cm_t43_defconfig
configs/corvus_defconfig
configs/da850evm_nand_defconfig
configs/devkit3250_defconfig
configs/devkit8000_defconfig
configs/dra7xx_evm_defconfig
configs/dra7xx_hs_evm_defconfig
configs/draco_defconfig
configs/etamin_defconfig
configs/gardena-smart-gateway-at91sam_defconfig
configs/igep00x0_defconfig
configs/ls1021aqds_nand_defconfig
configs/ls1043aqds_nand_defconfig
configs/ls1043ardb_nand_SECURE_BOOT_defconfig
configs/ls1043ardb_nand_defconfig
configs/ls2080aqds_nand_defconfig
configs/ls2080ardb_nand_defconfig
configs/m53menlo_defconfig
configs/omap35_logic_defconfig
configs/omap35_logic_somlv_defconfig
configs/omap3_beagle_defconfig
configs/omap3_evm_defconfig
configs/omap3_logic_defconfig
configs/omap3_logic_somlv_defconfig
configs/omapl138_lcdk_defconfig
configs/phycore-am335x-r2-regor_defconfig
configs/phycore-am335x-r2-wega_defconfig
configs/pxm2_defconfig
configs/rastaban_defconfig
configs/rut_defconfig
configs/sama5d36ek_cmp_nandflash_defconfig
configs/sama5d3_xplained_nandflash_defconfig
configs/sama5d3xek_nandflash_defconfig
configs/sama5d4_xplained_nandflash_defconfig
configs/sama5d4ek_nandflash_defconfig
configs/smartweb_defconfig
configs/taurus_defconfig
configs/thuban_defconfig
configs/ti816x_evm_defconfig
drivers/mtd/nand/raw/Kconfig
include/configs/P1010RDB.h
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/am335x_evm.h
include/configs/am335x_guardian.h
include/configs/am335x_igep003x.h
include/configs/am3517_evm.h
include/configs/am43xx_evm.h
include/configs/at91sam9m10g45ek.h
include/configs/at91sam9n12ek.h
include/configs/at91sam9x5ek.h
include/configs/baltos.h
include/configs/brppt1.h
include/configs/chiliboard.h
include/configs/cm_t335.h
include/configs/cm_t43.h
include/configs/corenet_ds.h
include/configs/corvus.h
include/configs/da850evm.h
include/configs/devkit3250.h
include/configs/devkit8000.h
include/configs/dra7xx_evm.h
include/configs/etamin.h
include/configs/gardena-smart-gateway-at91sam.h
include/configs/ids8313.h
include/configs/km/pg-wcom-ls102xa.h
include/configs/ls1021aqds.h
include/configs/ls1043a_common.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046a_common.h
include/configs/ls1046afrwy.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/configs/m53menlo.h
include/configs/omap3_beagle.h
include/configs/omap3_evm.h
include/configs/omap3_igep00x0.h
include/configs/omap3_logic.h
include/configs/omapl138_lcdk.h
include/configs/p1_p2_rdb_pc.h
include/configs/phycore_am335x_r2.h
include/configs/pm9g45.h
include/configs/sama5d3_xplained.h
include/configs/sama5d3xek.h
include/configs/sama5d4_xplained.h
include/configs/sama5d4ek.h
include/configs/siemens-am33x-common.h
include/configs/smartweb.h
include/configs/tam3517-common.h
include/configs/taurus.h
include/configs/ti816x_evm.h

index 45e46f9..00987b5 100644 (file)
 #define NAND_LARGE_BLOCK_PAGE_SIZE     0x800
 #define NAND_SMALL_BLOCK_PAGE_SIZE     0x200
 
-#if !defined(CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      NAND_LARGE_BLOCK_PAGE_SIZE
-#endif
-
 #if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
-#define CONFIG_SYS_NAND_OOBSIZE                16
 #define CONFIG_SYS_NAND_ECCPOS         { 10, 11, 12, 13, 14, 15, }
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #else
index 9c09a9e..5e20a07 100644 (file)
@@ -68,6 +68,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 9bd62ce..ba1c2f9 100644 (file)
@@ -67,6 +67,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 5ba090b..7bc527d 100644 (file)
@@ -70,6 +70,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index e47a277..8ec6ce5 100644 (file)
@@ -69,6 +69,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 0ff1f41..8307cce 100644 (file)
@@ -68,6 +68,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 95d97ed..8342c72 100644 (file)
@@ -67,6 +67,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 17a1ab9..93d02c7 100644 (file)
@@ -71,6 +71,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index d34a129..a8cb084 100644 (file)
@@ -73,6 +73,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 3b57b0c..89294ac 100644 (file)
@@ -72,6 +72,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index dd12941..16445e1 100644 (file)
@@ -80,6 +80,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index e92c98c..cccbb64 100644 (file)
@@ -74,6 +74,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 0e37eb7..652f0fd 100644 (file)
@@ -72,6 +72,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 4b0b78a..5edf6ee 100644 (file)
@@ -78,6 +78,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 7255b52..2d18bcb 100644 (file)
@@ -79,6 +79,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
index 3b67e01..bf7bb76 100644 (file)
@@ -59,6 +59,9 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MMC_OMAP_HS_ADMA=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000
 CONFIG_PHY_ADDR_ENABLE=y
index 7fd90ce..7f986bf 100644 (file)
@@ -63,6 +63,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
index 94ea4ec..bf5f7d2 100644 (file)
@@ -62,6 +62,8 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 # CONFIG_SPL_NAND_AM33XX_BCH is not set
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
index fe8ddf6..19647a9 100644 (file)
@@ -88,6 +88,9 @@ CONFIG_MISC=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0x100
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000
 CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x200000
index 9f96b78..769c956 100644 (file)
@@ -56,6 +56,8 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
index a1ee141..6e8a919 100644 (file)
@@ -58,6 +58,8 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
index af94cc0..835a488 100644 (file)
@@ -72,6 +72,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_PHY_SMSC=y
 CONFIG_MII=y
index 864d16c..3690c9f 100644 (file)
@@ -57,6 +57,9 @@ CONFIG_DM_PCA953X=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
index b60090d..19744f1 100644 (file)
@@ -60,6 +60,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0xe0
 CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
index a4450cc..c1ef598 100644 (file)
@@ -47,6 +47,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0xe0
 CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
index 9efeccc..a36a964 100644 (file)
@@ -63,6 +63,9 @@ CONFIG_MISC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0xe0
 CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
index f340130..7109d41 100644 (file)
@@ -65,6 +65,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0xe0
 CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
index ab51b70..b67cc57 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
index dfbac62..be2d49b 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
index 4ff4f10..ae5368a 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
index a013338..4b422df 100644 (file)
@@ -73,6 +73,9 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index 88f281c..8ac36de 100644 (file)
@@ -89,6 +89,9 @@ CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_PHY_NATSEMI=y
index f6ae494..9efaded 100644 (file)
@@ -53,6 +53,9 @@ CONFIG_MISC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
index fd4e363..2ed8357 100644 (file)
@@ -61,6 +61,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
index 45b41d3..ca95aa1 100644 (file)
@@ -69,6 +69,8 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_ATMEL=y
index 72f4310..2bbaddf 100644 (file)
@@ -61,6 +61,9 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_PHYLIB=y
 CONFIG_ATMEL_USART=y
 CONFIG_USB=y
index 6d59cc5..9555dd3 100644 (file)
@@ -68,6 +68,9 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
 CONFIG_DM_SPI_FLASH=y
index a1d2779..33248e4 100644 (file)
@@ -53,6 +53,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_LPC32XX_SLC=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ADDR=31
index 0ec943a..be658ce 100644 (file)
@@ -41,6 +41,9 @@ CONFIG_TWL4030_LED=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_CONS_INDEX=3
 CONFIG_OF_LIBFDT=y
index 11dc022..3f577d0 100644 (file)
@@ -92,6 +92,9 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
index c231991..3da96a4 100644 (file)
@@ -95,6 +95,8 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
index dfb98c6..25fcfbd 100644 (file)
@@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
index f60ce5b..25a3f6b 100644 (file)
@@ -85,6 +85,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0xe0
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
index 4e1b44e..20ef4ef 100644 (file)
@@ -87,6 +87,9 @@ CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
index da0d598..9e5ea9e 100644 (file)
@@ -60,6 +60,9 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_SYS_MTDPARTS_RUNTIME=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_SMC911X=y
index 6fff54b..18da0bd 100644 (file)
@@ -86,6 +86,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index 57908b4..69b07b7 100644 (file)
@@ -79,6 +79,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHYLIB_10G=y
index 8e47f81..f5e7722 100644 (file)
@@ -61,6 +61,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 5b839bc..f4e4d95 100644 (file)
@@ -69,6 +69,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 3976284..90e4a22 100644 (file)
@@ -61,6 +61,7 @@ CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_PHYLIB=y
index cd2cab4..b9f7353 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
index a0fceb3..720c2b0 100644 (file)
@@ -78,6 +78,9 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_MXC=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
index d699efb..452ecfd 100644 (file)
@@ -57,6 +57,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
index 9f3a88f..6ef2418 100644 (file)
@@ -62,6 +62,9 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
index 578e682..24d1def 100644 (file)
@@ -74,6 +74,9 @@ CONFIG_TWL4030_LED=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
index 9a86beb..8baa564 100644 (file)
@@ -62,6 +62,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
index 9424755..c442cf7 100644 (file)
@@ -57,6 +57,9 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MMC_OMAP36XX_PINS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
index 7a78682..1c97aa8 100644 (file)
@@ -63,6 +63,9 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
index 80e9023..6dcb33b 100644 (file)
@@ -65,6 +65,9 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DAVINCI=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
index 3de815c..af517c5 100644 (file)
@@ -66,6 +66,9 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
 CONFIG_DM_SPI_FLASH=y
index 5137bec..bc63404 100644 (file)
@@ -66,6 +66,9 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x100000
index 624e98c..6faf8b3 100644 (file)
@@ -84,6 +84,9 @@ CONFIG_SYS_I2C_SPEED=400000
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
index 1e9def2..9292935 100644 (file)
@@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
index 39f9a0c..0285808 100644 (file)
@@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
index e641813..81127d8 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
index 0fd2c42..14beb80 100644 (file)
@@ -69,6 +69,9 @@ CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
index 2e1fdf7..b8557aa 100644 (file)
@@ -71,6 +71,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
index e642409..94a2e8e 100644 (file)
@@ -66,6 +66,9 @@ CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=8
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0xe0
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
index a3cd8c5..2ab8990 100644 (file)
@@ -64,6 +64,9 @@ CONFIG_MTD=y
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=8
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
+CONFIG_SYS_NAND_PAGE_SIZE=0x1000
+CONFIG_SYS_NAND_OOBSIZE=0xe0
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
index 3869635..187a001 100644 (file)
@@ -63,6 +63,9 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_PHYLIB=y
 CONFIG_ATMEL_USART=y
 CONFIG_USB=y
index 0bb28d4..6ae2912 100644 (file)
@@ -79,6 +79,9 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index 5daa63a..b7656d6 100644 (file)
@@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
index dc24bb8..bf512ff 100644 (file)
@@ -59,6 +59,9 @@ CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
+CONFIG_SYS_NAND_PAGE_SIZE=0x800
+CONFIG_SYS_NAND_OOBSIZE=0x40
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
index 931257c..04bf910 100644 (file)
@@ -109,6 +109,10 @@ config KEYSTONE_RBL_NAND
        depends on ARCH_KEYSTONE
        def_bool y
 
+config SPL_NAND_LOAD
+       def_bool y
+       depends on NAND_DAVINCI && ARCH_DAVINCI && SPL_NAND_SUPPORT
+
 config NAND_DENALI
        bool
        select SYS_NAND_SELF_INIT
@@ -359,7 +363,8 @@ comment "Generic NAND options"
 
 config SYS_NAND_BLOCK_SIZE
        hex "NAND chip eraseblock size"
-       depends on ARCH_SUNXI
+       depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT
+       depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
        help
          Number of data bytes in one eraseblock for the NAND chip on the
          board. This is the multiple of NAND_PAGE_SIZE and the number of
@@ -367,14 +372,20 @@ config SYS_NAND_BLOCK_SIZE
 
 config SYS_NAND_PAGE_SIZE
        hex "NAND chip page size"
-       depends on ARCH_SUNXI
+       depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
+               SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
+               (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
+       depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
        help
          Number of data bytes in one page for the NAND chip on the
          board, not including the OOB area.
 
 config SYS_NAND_OOBSIZE
        hex "NAND chip OOB size"
-       depends on ARCH_SUNXI
+       depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
+               SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
+               (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
+       depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
        help
          Number of bytes in the Out-Of-Band area for the NAND chip on
          the board.
index 922f066..9134e9e 100644 (file)
@@ -309,7 +309,6 @@ extern unsigned long get_sdram_size(void);
                                | CSOR_NAND_PGS_512     /* Page Size = 512b */ \
                                | CSOR_NAND_SPRZ_16     /* Spare size = 16 */ \
                                | CSOR_NAND_PB(32))     /* 32 Pages Per Block */
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (16 * 1024)
 
 #elif defined(CONFIG_TARGET_P1010RDB_PB)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
@@ -320,7 +319,6 @@ extern unsigned long get_sdram_size(void);
                                | CSOR_NAND_PGS_4K      /* Page Size = 4K */ \
                                | CSOR_NAND_SPRZ_224    /* Spare size = 224 */ \
                                | CSOR_NAND_PB(128))  /*Pages Per Block = 128 */
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
 #endif
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
index 1e75066..bdddb24 100644 (file)
@@ -171,7 +171,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_NAND_BASE_LIST     {CONFIG_SYS_NAND_BASE}
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_BLOCK_SIZE    (128 * 1024)
 
 /* NAND flash config */
 #define CONFIG_SYS_NAND_BR_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
@@ -379,7 +378,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 1680)
 #elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR        (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR        (8 * (128 * 1024))
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
index e462994..20e4334 100644 (file)
@@ -264,7 +264,6 @@ unsigned long get_board_sys_clk(void);
                                | CSOR_NAND_PGS_4K      /* Page Size = 4K */ \
                                | CSOR_NAND_SPRZ_224    /* Spare size = 224 */ \
                                | CSOR_NAND_PB(64))     /*Pages Per Block = 64*/
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
 #elif defined(CONFIG_TARGET_T1023RDB)
 #define CONFIG_SYS_NAND_CSOR   (CSOR_NAND_ECC_ENC_EN   /* ECC on encode */ \
                                | CSOR_NAND_ECC_DEC_EN  /* ECC on decode */ \
@@ -273,7 +272,6 @@ unsigned long get_board_sys_clk(void);
                                | CSOR_NAND_PGS_2K      /* Page Size = 2K */ \
                                | CSOR_NAND_SPRZ_128    /* Spare size = 128 */ \
                                | CSOR_NAND_PB(64))     /*Pages Per Block = 64*/
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #endif
 
 #define CONFIG_SYS_NAND_ONFI_DETECTION
@@ -520,14 +518,6 @@ unsigned long get_board_sys_clk(void);
  */
 #define CONFIG_SYS_FMAN_FW_ADDR                (512 * 0x820)
 #define CONFIG_SYS_QE_FW_ADDR          (512 * 0x920)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_SYS_FMAN_FW_ADDR                (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#define CONFIG_SYS_QE_FW_ADDR          (4 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_SYS_FMAN_FW_ADDR                (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#define CONFIG_SYS_QE_FW_ADDR          (12 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#endif
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
index 7c48c3a..de3860d 100644 (file)
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
-
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
  */
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 0x820)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR        (5 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_FMAN_FW_ADDR                0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FW_ADDR          0x130000
 #elif defined(CONFIG_SDCARD)
 #define CONFIG_SYS_QE_FW_ADDR          (512 * 0x920)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_QE_FW_ADDR          (7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_QE_FW_ADDR          0xEFF10000
 #endif
index 57640ac..aa525dd 100644 (file)
@@ -252,7 +252,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
@@ -500,8 +499,6 @@ unsigned long get_board_sys_clk(void);
  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
  */
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 0x820)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR        (11 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
index 6f27386..4057f40 100644 (file)
@@ -226,7 +226,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
@@ -454,8 +453,6 @@ unsigned long get_board_sys_clk(void);
  */
 #define CONFIG_SYS_FMAN_FW_ADDR                (512 * 0x820)
 
-#elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR                (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
index b7cbf87..1601ba9 100644 (file)
@@ -325,8 +325,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
-
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
@@ -475,8 +473,6 @@ unsigned long get_board_sys_clk(void);
  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
  */
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 0x820)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR        (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_FMAN_FW_ADDR        0xEFF00000
 #endif
index 0f6ffd9..31b149e 100644 (file)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 /* NAND: driver related configs */
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
 /* SPL related */
 #elif defined(CONFIG_EMMC_BOOT)
 #define CONFIG_SYS_MMC_MAX_DEVICE      2
-#elif defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_SYS_ENV_SECT_SIZE       CONFIG_SYS_NAND_BLOCK_SIZE
 #endif
 
 /* Network. */
index d93db09..1af81ae 100644 (file)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                        CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE       4096
-#define CONFIG_SYS_NAND_OOBSIZE         256
-#define CONFIG_SYS_NAND_BLOCK_SIZE      (256 * 1024)
 
 #define CONFIG_SYS_NAND_ECCPOS  {   2,   3,   4,   5,   6,   7,   8,   9, \
                         10,  11,  12,  13,  14,  15,  16,  17,  18,  19, \
index 95ba949..f11972f 100644 (file)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
                                         10, 11, 12, 13, 14, 15, 16, 17, \
index e54708c..f5fbafe 100644 (file)
@@ -21,9 +21,6 @@
 #ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2,  3,  4,  5,  6,  7,  8,  9, 10, \
                                         11, 12, 13, 14, 16, 17, 18, 19, 20, \
index 0042659..dec2478 100644 (file)
 /* NAND support */
 #ifdef CONFIG_MTD_RAW_NAND
 /* NAND: device related configs */
-#define CONFIG_SYS_NAND_PAGE_SIZE      4096
-#define CONFIG_SYS_NAND_OOBSIZE                224
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (256*1024)
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
index 78ff577..fb2d120 100644 (file)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x80000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x800
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }
index 4ae6b66..8dd84ba 100644 (file)
 #endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x800
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
 
 #endif
index 33481dc..ea9ddfd 100644 (file)
 #endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x800
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
 
 #endif
index 2fe6c86..501e8d3 100644 (file)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
                                         10, 11, 12, 13, 14, 15, 16, 17, \
index 9fb861b..5786b37 100644 (file)
@@ -147,11 +147,8 @@ NANDTGTS \
 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                        CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         {2, 3, 4, 5, 6, 7, 8, 9, \
                                        10, 11, 12, 13, 14, 15, 16, 17, \
index 86cac23..8121152 100644 (file)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 /* NAND: driver related configs */
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
index faeb903..e5309c8 100644 (file)
@@ -88,9 +88,6 @@
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
                                         10, 11, 12, 13, 14, 15, 16, 17, \
index 6e5c26e..feeb705 100644 (file)
@@ -24,9 +24,6 @@
 /* NAND support */
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       14
index 79fca96..7fd1ad1 100644 (file)
 
 #define CONFIG_SYS_NAND_BASE_LIST     {CONFIG_SYS_NAND_BASE}
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_BLOCK_SIZE    (128 * 1024)
 
 /* NAND flash config */
 #define CONFIG_SYS_NAND_BR_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
  */
 #define CONFIG_SYS_FMAN_FW_ADDR        (512 * 1680)
 #elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR        (8 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR        (8 * (128 * 1024))
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
index 32f4a10..fbabfc9 100644 (file)
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 
-#define CONFIG_SYS_NAND_PAGE_SIZE      SZ_2K
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (SZ_128K)
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }
index 34683f6..6c3e2df 100644 (file)
 #define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
 #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      (2 << 10)
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x40000
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       10
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SPL_NAND_LOAD
 
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SYS_NAND_SELF_INIT
index c2340b2..d90e944 100644 (file)
@@ -64,9 +64,6 @@
 #define CONFIG_LPC32XX_NAND_SLC_RHOLD          200000000
 #define CONFIG_LPC32XX_NAND_SLC_RSETUP         50000000
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE             0x20000
-#define CONFIG_SYS_NAND_PAGE_SIZE              NAND_LARGE_BLOCK_PAGE_SIZE
-
 /*
  * USB
  */
index a2a1d93..de4c74c 100644 (file)
 /* NAND boot config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_ECCPOS         {2, 3, 4, 5, 6, 7, 8, 9,\
                                                10, 11, 12, 13}
index 361ee96..d89239d 100644 (file)
@@ -80,9 +80,6 @@
 /* NAND support */
 #ifdef CONFIG_MTD_RAW_NAND
 /* NAND: device related configs */
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
index 7831687..82843b8 100644 (file)
@@ -14,9 +14,6 @@
 
 #include "siemens-am33x-common.h"
 /* NAND specific changes for etamin due to different page size */
-#undef CONFIG_SYS_NAND_PAGE_SIZE
-#undef CONFIG_SYS_NAND_OOBSIZE
-#undef CONFIG_SYS_NAND_BLOCK_SIZE
 #undef CONFIG_SYS_NAND_ECCPOS
 #undef CONFIG_SYS_NAND_U_BOOT_OFFS
 #undef CONFIG_SYS_ENV_SECT_SIZE
@@ -24,9 +21,6 @@
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH16_CODE_HW
 
 #define CONFIG_SYS_ENV_SECT_SIZE       (512 << 10)     /* 512 KiB */
-#define CONFIG_SYS_NAND_PAGE_SIZE       4096
-#define CONFIG_SYS_NAND_OOBSIZE         224
-#define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
                                10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
                                20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
index 72852a0..676b9dd 100644 (file)
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x800
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
 
 #define CONFIG_SPL_PAD_TO              CONFIG_SYS_NAND_U_BOOT_OFFS
index e759db2..5bd4f3b 100644 (file)
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_MAX_CHIPS      1
 #define CONFIG_NAND_FSL_ELBC
-#define CONFIG_SYS_NAND_PAGE_SIZE      (2048)
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 << 10)
 #define NAND_CACHE_PAGES               64
 
 
index 75d109a..f3c3f50 100644 (file)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 
 /* QRIO FPGA Definitions */
 #define CONFIG_SYS_QRIO_BASE           0x70000000
index a164796..edd72b3 100644 (file)
@@ -47,7 +47,6 @@ unsigned long get_board_sys_clk(void);
 
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (400 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    CONFIG_SPL_PAD_TO
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
@@ -163,8 +162,6 @@ unsigned long get_board_sys_clk(void);
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #endif
 
 /*
index fb697bd..6e8eebf 100644 (file)
 
 
 #else
-#ifdef CONFIG_NAND_BOOT
-/* Store Fman ucode at offeset 0x900000(72 blocks). */
-#define CONFIG_SYS_FMAN_FW_ADDR                (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
-#elif defined(CONFIG_SD_BOOT)
+#if defined(CONFIG_SD_BOOT)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
  * about 1MB (2040 blocks), Env is stored after the image, and the env size is
index 4ef4cac..6383a3d 100644 (file)
@@ -149,8 +149,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
-
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #endif
 
 #ifdef CONFIG_NAND_BOOT
index 906cd09..00a839b 100644 (file)
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SPL_PAD_TO              0x20000         /* block aligned */
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    CONFIG_SPL_PAD_TO
index f0bde08..f199c94 100644 (file)
 #elif defined(CONFIG_QSPI_BOOT)
 #define CONFIG_SYS_FMAN_FW_ADDR                0x40900000
 #elif defined(CONFIG_NAND_BOOT)
-#define CONFIG_SYS_FMAN_FW_ADDR                (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_FMAN_FW_ADDR                (36 * (256 * 1024))
 #else
 #define CONFIG_SYS_FMAN_FW_ADDR                0x60900000
 #endif
index 7da0860..b7db280 100644 (file)
@@ -60,8 +60,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 /* IFC Timing Params */
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
index b6bbc01..c174303 100644 (file)
@@ -164,8 +164,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
-
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (256 * 1024)
 #endif
 
 #ifdef CONFIG_NAND_BOOT
index d3f5d8c..29dd927 100644 (file)
@@ -72,8 +72,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 /*
  * CPLD
  */
index a7d8cb5..5e34182 100644 (file)
@@ -134,8 +134,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 #define CONFIG_FSL_QIXIS
 #define CONFIG_SYS_I2C_FPGA_ADDR       0x66
 #define QIXIS_LBMAP_SWITCH             6
index 4a61345..567f67c 100644 (file)
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 #ifndef SPL_NO_QIXIS
 #define CONFIG_FSL_QIXIS
 #endif
index e831d37..6839ba7 100644 (file)
@@ -139,8 +139,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-
 #define CONFIG_FSL_QIXIS       /* use common QIXIS code */
 #define QIXIS_LBMAP_SWITCH             0x06
 #define QIXIS_LBMAP_MASK               0x0f
index 5568a48..1e3ba4f 100644 (file)
@@ -147,7 +147,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
 #define CONFIG_FSL_QIXIS       /* use common QIXIS code */
 #define QIXIS_LBMAP_SWITCH             0x06
 #define QIXIS_LBMAP_MASK               0x0f
index 11c8a87..c7c6dad 100644 (file)
 #define CONFIG_SPL_STACK               0x70004000
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    CONFIG_SPL_PAD_TO
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_SIZE           (256 * 1024 * 1024)
index 8c830d9..b6ee6c1 100644 (file)
@@ -24,9 +24,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT      64
-#define CONFIG_SYS_NAND_PAGE_SIZE       2048
-#define CONFIG_SYS_NAND_OOBSIZE         64
-#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
                                          10, 11, 12, 13}
index b12e3a4..65b3ae5 100644 (file)
@@ -29,9 +29,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT      64
-#define CONFIG_SYS_NAND_PAGE_SIZE       2048
-#define CONFIG_SYS_NAND_OOBSIZE         64
-#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
                                          10, 11, 12, 13}
index 0fee2ed..c14a7ac 100644 (file)
@@ -77,9 +77,6 @@
 /* NAND config */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2,  3,  4,  5,  6,  7,  8,  9, \
                                         10, 11, 12, 13, 14, 15, 16, 17, \
index cac35ef..45200e8 100644 (file)
@@ -20,9 +20,6 @@
                                                  /* NAND devices */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
                                         13, 14, 16, 17, 18, 19, 20, 21, 22, \
index d20c9e2..e292ead 100644 (file)
 #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
 #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      (2 << 10)
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       10
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SPL_NAND_LOAD
 #endif
 
 /*
index 5833611..b948eea 100644 (file)
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
-#else
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (16 * 1024)
-#endif
 
 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
        | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
index 4925fcc..a128ace 100644 (file)
@@ -88,9 +88,6 @@
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 /* NAND: driver related configs */
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
 
 #ifdef CONFIG_SPI_BOOT
 #define CONFIG_SYS_SPI_U_BOOT_SIZE     0x40000
-#elif defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_SYS_ENV_SECT_SIZE       CONFIG_SYS_NAND_BLOCK_SIZE
 #endif
 
 #endif /* ! __CONFIG_PHYCORE_AM335x_R2_H */
index c22f698..50c8f44 100644 (file)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x80000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x800
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }
index 20d1d34..6f8716b 100644 (file)
 #endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x800
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
 
 /* Falcon boot support on raw MMC */
index ac52e27..235e668 100644 (file)
 #endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x800
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
 
 #endif
index 3032297..a0a8e6a 100644 (file)
 #endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x1000
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_OOBSIZE                224
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x40000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
 
 #endif
index 4e8fe86..11723df 100644 (file)
 #endif
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE      0x1000
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_OOBSIZE                224
-#define CONFIG_SYS_NAND_BLOCK_SIZE     0x40000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0x0
 
 #endif
index 6ccba95..903919d 100644 (file)
@@ -76,9 +76,6 @@
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
                                         10, 11, 12, 13, 14, 15, 16, 17, \
index 5bcc3a6..eac6e23 100644 (file)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 
 #define CONFIG_SYS_NAND_SIZE           (SZ_256M)
-#define CONFIG_SYS_NAND_PAGE_SIZE      SZ_2K
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (SZ_128K)
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }
index adbc2ae..c9a0985 100644 (file)
 
 /* NAND boot config */
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_NAND_ECCPOS         {40, 41, 42, 43, 44, 45, 46, 47,\
index 23f1e37..349344c 100644 (file)
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 
 #define CONFIG_SYS_NAND_SIZE           (256 * SZ_1M)
-#define CONFIG_SYS_NAND_PAGE_SIZE      SZ_2K
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (SZ_128K)
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }
index cffa794..f039557 100644 (file)
@@ -60,9 +60,6 @@
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_PAGE_SIZE      2048
-#define CONFIG_SYS_NAND_OOBSIZE                64
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 /* NAND: driver related configs */
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCPOS         { 2, 3, 4, 5, 6, 7, 8, 9, \
@@ -78,7 +75,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x000c0000
-#define CONFIG_SYS_ENV_SECT_SIZE       CONFIG_SYS_NAND_BLOCK_SIZE
 
 /* SPL */
 /* Defines for SPL */