Patrick Delaunay [Wed, 10 Apr 2019 12:09:21 +0000 (14:09 +0200)]
stm32mp1: ram: update mask for operating mode
Regression introduced by rebase, when loop
was replaced by readl_poll_timeout() function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:51 +0000 (17:32 +0200)]
serial: stm32: remove watchog reset in debug putc
For STM32MP, the watchdog is based on DM and the function watchod_reset
call the function uclass_get_device(UCLASS_WDT) to found the driver
associated IWDG2.
As this reset is not mandatory in debug putc (the uart fifo will be
empty after some us), we can simplify the code by removing this call.
And this patch avoid issue when putc is called before initialization
of DM core, before the parsing of the device tree parsing and each
node bound to driver; that also avoid memory leak.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:50 +0000 (17:32 +0200)]
serial: stm32: remove unnecessary trace
Remove the trace indicating the end of the DEBUG initialization
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:49 +0000 (17:32 +0200)]
env: solve compilation error in SPL
Solve compilation issue when cli_simple.o is used in SPL
and CONFIG_SPL_ENV_SUPPORT is not defined.
env/built-in.o:(.data.env_htab+0xc): undefined reference to `env_flags_validate'
u-boot/scripts/Makefile.spl:384: recipe for target 'spl/u-boot-spl' failed
make[2]: *** [spl/u-boot-spl] Error 1
u-boot/Makefile:1649: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 2
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:48 +0000 (17:32 +0200)]
clk: stm32mp1: add set_rate for DDRPHYC clock
Add the DDRPHYC support for clk_set_rate, used in DDR interactive mode
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:47 +0000 (17:32 +0200)]
stm32mp1: add bootstage support
Add the needed configurations for bootstage and
activate bootstage command.
BOOTSTAGE_REPORT is not activated by default.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:46 +0000 (17:32 +0200)]
armv7: timer: init timer with bootstage
In initf_bootstage() we call bootstage_mark_name() which ends up calling
timer_get_us() before timer_init(); that cause crash for stm32mp1.
This patch solve the issue without changing the initialization sequence.
See also commit
97d20f69f53e ("Enable CONFIG_TIMER_EARLY with bootstage")
for other solution when DM is activated for TIMER.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:45 +0000 (17:32 +0200)]
stm32mp1: add bootcount support
Activate bootcount and use TAMP register to store the count value.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:44 +0000 (17:32 +0200)]
mkimage: change stm32image header to manage binary information
To get more information from STM32 Header about the generated binary,
we will add a new byte with the following field:
replace padding byte 255 with 0x00 for "U-Boot"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Nicolas Le Bayon [Thu, 18 Apr 2019 15:32:43 +0000 (17:32 +0200)]
i2c: stm32f7: improve loopback in timing algorithm
This avoids useless loops inside the I2C timing algorithm.
Actually, we support only one possible solution per prescaler value.
So after finding a solution with a prescaler, the algorithm can
switch directly to the next prescaler value.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Nicolas Le Bayon [Thu, 18 Apr 2019 15:32:42 +0000 (17:32 +0200)]
i2c: stm32f7: Fix SDADEL minimum formula
It conforms with Reference Manual I2C timing section.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:41 +0000 (17:32 +0200)]
stm32mp1: update RCC binding after kernel realignment
RCC is no more a mfd and add a complete example
and alignment with latest TF-A binding
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:40 +0000 (17:32 +0200)]
stm32mp1: psci: add synchronization with ROM code
Use SGI0 interruption and TAMP_BACKUP_MAGIC_NUMBER
to synchronize the core1 boot sequence requested by
core0 in psci_cpu_on():
- a initial interruption is needed in ROM code after
RCC_MP_GRSTCSETR_MPUP1RST (psci_cpu_off)
- the ROM code set to 0 the 2 registers
+ TAMP_BACKUP_BRANCH_ADDRESS
+ TAMP_BACKUP_MAGIC_NUMBER
when magic is not egual to
BOOT_API_A7_CORE0_MAGIC_NUMBER
This patch solve issue for cpu1 restart in kernel.
echo 0 > /sys/devices/system/cpu/cpu1/online
echo 1 > /sys/devices/system/cpu/cpu1/online
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:39 +0000 (17:32 +0200)]
stm32mp1: cosmetic: bsec: reorder include files
Reorder the include files in alphabetic order.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:38 +0000 (17:32 +0200)]
stm32mp1: migrate PREBOOT to Kconfig
Use Kconfig to activate CONFIG_PREBOOT (empty by default).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:37 +0000 (17:32 +0200)]
stm32mp1: Move ENV_SIZE and ENV_OFFSET to Kconfig
Add arch stm32mp for ENV migration step and drop more
items from include/configs/xxx.h.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Thu, 18 Apr 2019 15:32:36 +0000 (17:32 +0200)]
stm32mp1: Move config SYS_MALLOC_LEN to Kconfig
This patch moves the the config SYS_MALLOC_LEN to
Kconfig as it is already done for zynq arch in
commit
01aa5b8f0503 ("Kconfig: Move config
SYS_MALLOC_LEN to Kconfig for zynq")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tom Rini [Wed, 22 May 2019 12:32:24 +0000 (08:32 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Changes from rc2 tag
- Support PCIe Gen4 driver of the Mobiveil IP
- NXP LS1028A SoC and platform support
- Few SPI related config updates
- Distinguish the ecc val by chassis version and move the ecc addr to dts
- sp805 watchdog support
Andy Shevchenko [Mon, 13 May 2019 14:04:51 +0000 (17:04 +0300)]
armv8: lx2160: Drop useless CONFIG_CMDLINE_EDITING from config.h
commit
58c3e62040be ("armv8: lx2160ardb : Add support for LX2160ARDB
platform") brought a new boards support with redundancy in the config.h.
One of them is CONFIG_CMDLINE_EDITING which is removed by this change.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Peng Ma <peng.ma@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Qiang Zhao [Tue, 7 May 2019 03:16:18 +0000 (03:16 +0000)]
config: enable SP805 watchdog support for LS1028A
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Qiang Zhao [Tue, 7 May 2019 03:16:13 +0000 (03:16 +0000)]
arm: dts: fsl-ls1028a: add sp805 watchdog node
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Qiang Zhao [Tue, 7 May 2019 03:16:09 +0000 (03:16 +0000)]
driver: watchdog: add sp805 watchdog support
sp805 is watchdog on some NXP layerscape SoCs, adding
it's driver. Configs CONFIG_WDT_SP805, CONFIG_WDT, CONFIG_CMD_WDT
needs to be enabled to use it.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Rajat Srivastava [Wed, 24 Apr 2019 12:45:12 +0000 (18:15 +0530)]
configs: Unset CONFIG_SPI_BAR for all LS2080A/LS2081A defconfigs
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Rajat Srivastava [Wed, 24 Apr 2019 12:45:11 +0000 (18:15 +0530)]
configs: Unset CONFIG_SPI_BAR for all LS1046A defconfigs
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Ashish Kumar [Wed, 24 Apr 2019 12:45:10 +0000 (18:15 +0530)]
configs: Unset CONFIG_SPI_BAR for all LS1088A defconfigs
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Udit Agarwal [Tue, 23 Apr 2019 06:06:04 +0000 (06:06 +0000)]
armv8: fsl-layerscape: Set env_loc to ENVL_NOWHERE with CONFIG_ENV_IS_NOWHERE.
ENVL_NOWHERE is dependent on CONFIG_ENV_IS_NOWHERE and not on
CONFIG_CHAIN_OF_TRUST so return ENVL_NOWHERE when CONFIG_ENV_IS_NOWHERE
is enabled
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Vinitha V Pillai [Tue, 23 Apr 2019 05:52:17 +0000 (05:52 +0000)]
armv8: Secure Boot: Modify boot_a_script definition
esbc_validate command will not be executed if “load” command for its
header fails and will further execute the source command for bootscript,
without its validation and boot process continues.
To halt the boot process in case secure boot header is not loaded
successfully, esbc_validate command is invoked separately after “load”
command. The secure boot validation of the bootscript header will fail
(if header is not loaded) and halts the boot process, which prevent source
command from execution.
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Florin Chiculita [Mon, 22 Apr 2019 08:57:47 +0000 (11:57 +0300)]
board: fsl: lx2160ardb: invert AQR107 pins polarity
AQR107 PHYs interrupt pins are active-low, while the GIC expects a
level-high signal.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Peng Ma [Wed, 17 Apr 2019 10:10:50 +0000 (10:10 +0000)]
scsi: ceva: Clean up the driver code
Distinguish the ecc val by chassis version and move the ecc addr to dts.
Add ls1028a soc support.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Peng Ma [Wed, 17 Apr 2019 10:10:49 +0000 (10:10 +0000)]
ARM: dts: Freescale: Add ecc addr for sata node
Move the ecc addr from driver to dts.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 17 Apr 2019 08:17:19 +0000 (16:17 +0800)]
configs: Enable CONFIG_SPI_FLASH for ls1088ardb_defconfig
Enables CONFIG_SPI_FLASH
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Yuantian Tang [Wed, 10 Apr 2019 08:43:35 +0000 (16:43 +0800)]
armv8: ls1028aqds: Add support of LS1028AQDS
LS1028AQDS Development System is a high-performance
computing, evaluation, and development platform that supports
LS1028A QorIQ Architecture processor.
Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Tang yuantian <andy.tang@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Yuantian Tang [Wed, 10 Apr 2019 08:43:34 +0000 (16:43 +0800)]
armv8: ls1028ardb: Add support for LS1028ARDB
LS1028A is an ARMv8 implementation. LS1028ARDB is an evaluation
platform that supports the LS1028A family SoCs. This patch add basic
support of the platform.
Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Yuantian Tang [Wed, 10 Apr 2019 08:43:33 +0000 (16:43 +0800)]
armv8: ls1028a: Add NXP LS1028A SoC support
Ls1028a SoC is based on Layerscape Chassis Generation 3.2
architecture with features:
2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN
ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers,
6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc.
Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: Rai Harninder <harninder.rai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:16:03 +0000 (10:16 +0000)]
armv8: lx2160a: enable PCIe support
Enable the PCIe Gen4 controller driver and e1000 for LX2160ARDB
and LX2160AQDS boards.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:15:58 +0000 (10:15 +0000)]
armv8: lx2160a: add PCIe controller DT nodes
The LX2160A integrated 6 PCIe Gen4 controllers.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:15:54 +0000 (10:15 +0000)]
pci: ls_pcie_g4: add device tree fixups for PCI Stream IDs
Add the infrastructure for Layerscape SoCs PCIe Gen4 controller
to update device tree nodes to convey SMMU stream IDs in the
device tree.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:15:50 +0000 (10:15 +0000)]
kconfig: add dependency PCIE_LAYERSCAPE_GEN4 for FSL_PCIE_COMPAT
The LX2160A PCIe is using driver PCIE_LAYERSCAPE_GEN4 instead
of PCIE_LAYERSCAPE.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:15:46 +0000 (10:15 +0000)]
pci: Add PCIe Gen4 controller driver for NXP Layerscape SoCs
Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe
controller is based on the Mobiveil IP, which is compatible
with the PCI Express™ Base Specification, Revision 4.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bao Xiaowei <Xiaowei.Bao@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:15:41 +0000 (10:15 +0000)]
armv8: lx2160a: add MMU table entries for PCIe
The lx2160a have up to 6 PCIe controllers and have different
address and size of PCIe region.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:15:37 +0000 (10:15 +0000)]
armv8: fsl-layerscpae: correct the PCIe controllers' region size
The LS2080A has 8GB region for each PCIe controller, while the
other platforms have 32GB.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Mon, 8 Apr 2019 10:15:32 +0000 (10:15 +0000)]
armv8: layerscape: use PCIe address macro for precompile PCIe MMU entry
Change to use PCIe address macro to determine if precompile the PCIe
MMU table entry.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Kuldeep Singh [Mon, 8 Apr 2019 06:03:29 +0000 (06:03 +0000)]
configs: ls1046: Update mtd-id for QSPI nor in mtdparts variable
Update mtd-id for QSPI nor due to change introduced in mtd/spi in
linux 5.0. commit
84d043185dbe
("spi: Add a driver for the Freescale/NXP QuadSPI controller")
This modification is only for linux kernel version >= 5.0. To use
bootargs for kernel < 5.0, use the following bootargs
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500
mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)"
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Tom Rini [Tue, 21 May 2019 11:13:35 +0000 (07:13 -0400)]
Merge git://git.denx.de/u-boot-mpc83xx
- Update MPC83xx platform support to current best practices, etc.
Tom Rini [Tue, 21 May 2019 11:12:51 +0000 (07:12 -0400)]
Merge tag 'mmc-5-20' of https://github.com/MrVan/u-boot
"Please pull mmc-5-20 for v2019.07, this is to avoid break i.MX53 boot."
Tom Rini [Tue, 21 May 2019 11:12:46 +0000 (07:12 -0400)]
Merge tag 'video-for-2019.07-rc3' of git://git.denx.de/u-boot-video
- update for using splashfile instead of location->name
when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
output on LCD displays
Dirk Eibach [Fri, 29 Mar 2019 09:18:19 +0000 (10:18 +0100)]
mpc83xx: Add gazerbeam board
The gdsys gazerbeam board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 2x 10/100 Mbit/s Ethernet (optional)
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:18 +0000 (10:18 +0100)]
gazerbeam: Add u-boot specific dts include file
Add a U-Boot specific dts file, which encapsulates the needed
modifications to the Gazerbeam Linux device tree.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:17 +0000 (10:18 +0100)]
gazerbeam: Import Linux DT
Import the Linux device tree for the Gazerbeam board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:16 +0000 (10:18 +0100)]
board: gazerbeam: Fix SC detection
The single channel detection in the gazerbeam board driver was not
implemented correctly.
Fix the detection.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:15 +0000 (10:18 +0100)]
gdsys: ioep-fpga: Switch to gazerbeam-style reporting
Use a more extensive FPGA feature reporting style in the gdsys ioep-fpga
driver.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:14 +0000 (10:18 +0100)]
gdsys: cmd_ioloop: Make DM compatible
Make the ioloop command DM compatible, while keeping the old
functionality for not-yet-converted boards.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:13 +0000 (10:18 +0100)]
gdsys: cmd_ioloop: Introduce commenting enum
Replace the boolean parameter of io_check_status that controls whether
the status is printed or not with a documenting enum.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:12 +0000 (10:18 +0100)]
gdsys: cmd_ioloop: Fix style violations
Fix some style violations in the ioloop command, and make the code more
readable where possible.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:11 +0000 (10:18 +0100)]
gdsys: mpc8308: Add FPGA flavor option
More recent versions of IHS FPGAs feature a different memory layout.
Add a Kconfig option to differentiate between the legacy layout, and the
new layout (which is used on the upcoming "Gazerbeam" and later boards).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:10 +0000 (10:18 +0100)]
gdsys: Introduce GDSYS_LEGACY_DRIVERS
Future gdsys boards will switch from the legacy drivers in board/gdsys/common
to DM-based drivers.
Define a Kconfig option that disables the legacy drivers.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:09 +0000 (10:18 +0100)]
gdsys: mpc8308: Don't use manual RAM config if RAM driver is active
The "manual" RAM configuration should not be used if the DM RAM driver
is active, hence, disable the code if the CONFIG_MPC83XX_SDRAM config
variable is defined.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:08 +0000 (10:18 +0100)]
gdsys: mpc8308: Migrate SYS_FPGA{0, 1}_{BASE, SIZE} to Kconfig
Move CONFIG_SYS_FPGA0_BASE, CONFIG_SYS_FPGA0_SIZE, CONFIG_SYS_FPGA1_BASE, and
CONFIG_SYS_FPGA1_SIZE to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:07 +0000 (10:18 +0100)]
gdsys: mpc8308: Use shadow register for output GPIO values
Since the gpio output status on MPC8xxx cannot be read back, it has to
be buffered locally.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:06 +0000 (10:18 +0100)]
gdsys: mpc8308: Fix style violations
Fix some style violations in the gdsys MPC8308 board files, and make the
code more readable.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Fri, 29 Mar 2019 09:18:05 +0000 (10:18 +0100)]
gdsys: Post ppc4xx removal cleanup
The ppc4xx architecture was removed, and with it several old gdsys 44x
boards, but some "debris" from these purged boards was left over.
This patch removes these remnants (mostly entries in Makefiles, some now
superfluous data structures and some now obsolete config variables from
the whitelist).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Dirk Eibach [Fri, 29 Mar 2019 09:18:04 +0000 (10:18 +0100)]
gdsys: phy: Adapt fixup_88e1518() to latest Release Notes
The initialization sequence in the newest release notes of the 88e1518
phy omits two commands.
Remove them from the sequence.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Mario Six [Mon, 28 Jan 2019 08:49:33 +0000 (09:49 +0100)]
ihs_mdio: Use new regmap interface
For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Mon, 28 Jan 2019 08:47:42 +0000 (09:47 +0100)]
gdsys_rxaui_ctrl: Use new regmap interface
For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 28 Jan 2019 08:47:41 +0000 (09:47 +0100)]
gdsys_rxaui_ctrl: Return old state
Make the gdsys_rxaui_ctrl polarity setting function return the old
state to comply with the API requirements.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 28 Jan 2019 08:45:58 +0000 (09:45 +0100)]
i2c: ihs: Improve error handling
Improve the error handling and reporting of the IHS I2C driver.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Mario Six [Mon, 28 Jan 2019 08:45:57 +0000 (09:45 +0100)]
i2c: ihs: Get rid of fpgamap
Since the IHS I2C driver want upstream, the surrounding infrastructure
has changed quite a bit (notably, the fpgamap driver was replaced with a
regmap driver).
Update the driver to work with these changes.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Mario Six [Mon, 28 Jan 2019 08:43:43 +0000 (09:43 +0100)]
cmd: binop: Use hex2bin
Use the new hex2bin function in the binop command instead of converting
the data manually.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Mon, 28 Jan 2019 08:43:42 +0000 (09:43 +0100)]
cmd: binop: Use new environment api
Since the binop command was introduced, the environment API was changed.
Use the new API to make the command work again.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Mon, 28 Jan 2019 08:40:36 +0000 (09:40 +0100)]
mpc83xx_clk: Add enable method
Some DM drivers have hardcoded clk_enable calls when handling
clocks (for example the fsl_esdhc driver).
To work with these drivers, add an enable method to the MCP83xx clock
driver (which does nothing, because the clocks are always enabled).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 28 Jan 2019 08:36:23 +0000 (09:36 +0100)]
mpc83xx: Define _end symbol
To support OF_EMBED, the MPC83xx architecture has to define the "_end"
symbol to correctly access the appended DT.
Fortunately, MPC8xx already defines the symbol, and the linker script is
quite similar to that of MPC83xx, so copy this approach for MPC83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 28 Jan 2019 08:33:39 +0000 (09:33 +0100)]
powerpc: Simplify processor.h
Lots of stuff in processor.h was taken verbatim from the Linux kernel.
It was never synced, so most of it was removed or changed in the kernel
since it was imported.
Remove all the stuff that is unused in the current U-Boot sources;
should anybody feel the need to re-sync with the kernel, they can do it
later on.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:23 +0000 (09:18 +0100)]
keymile: Factor out common includes again
Not that the Kconfig conversion of a lot of variables is done, we can
factor out the common include files for the keymile boards again (which
now contain hardly any #ifdef logic at all).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:22 +0000 (09:18 +0100)]
keymile: Remove CONFIG_SYS_APP{1, 2}_{BASE, SIZE}
CONFIG_SYS_APP1_BASE, CONFIG_SYS_APP2_BASE, CONFIG_SYS_APP1_SIZE, and
CONFIG_SYS_APP2_SIZE are no longer used in the keymile config files
(they were used for setting values, which were converted to Kconfig
earlier in the series).
Remove them from the configs and the whitelist.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:21 +0000 (09:18 +0100)]
mpc83xx: Use pre-defined asm functions
For a lot of inline assembly calls in the mpc8xxx and mpc83xx
directories, we already have convenient pre-defined helper functions,
but they're not used, resulting in hard-to-read code.
Use these helper functions where ever possible and useful.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:20 +0000 (09:18 +0100)]
mpc83xx: Replace ppcDWstore with inline assembly
ppcDWstore/ppcDWload are hardly used by any board, but since they're
implemented in start.S, they're always present in every U-Boot image,
even if they're not needed.
Re-implement these fuctions in C with inline assembly, so that the
compiler can decide when to actually include them.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:19 +0000 (09:18 +0100)]
mpc83xx: Don't define cpu_eth_init for DM eth
Don't use the legacy method of initializing the ethernet controller on
MPC83xx when DM is active.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:18 +0000 (09:18 +0100)]
mpc83xx: Add arch clock.h to make SDHC work
The fsl-esdhc driver can be used for the SDHC functionality on MPC83xx,
but it needs some additional definitions.
Add a clock.h file, so we can use the driver for MPC83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:17 +0000 (09:18 +0100)]
mpc83xx: Get rid of CONFIG_SYS_LBC_*
Except for one counter example, CONFIG_SYS_LBC_LBCR always has a value
of either 0x00040000 or 0x00000000.
CONFIG_SYS_LBC_MRTPR always has the value 0x20000000.
CONFIG_SYS_LBC_LSDMR_{1,2,4,5} are not set for any mpc83xx board.
CONFIG_SYS_LBC_LSRT is set by one board (to 0x32000000).
To simplify the configuration files, hardcode the setting of these
values for mpc83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:16 +0000 (09:18 +0100)]
mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE
CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:15 +0000 (09:18 +0100)]
mpc83xx: Get rid of CONFIG_SYS_DDR_BASE
CONFIG_SYS_DDR_BASE is specific to mpc83xx an is always set to the same
value as CONFIG_SYS_SDRAM_BASE. Just use CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:14 +0000 (09:18 +0100)]
mpc83xx: Migrate CONFIG_LCRR_* to Kconfig
Migrate the CONFIG_LCRR_* settings to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:13 +0000 (09:18 +0100)]
mpc83xx: Migrate SPCR to Kconfig
Migrate the SPCR setting to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:12 +0000 (09:18 +0100)]
mpc83xx: Migrate arbiter config to Kconfig
Migrate the arbiter configuration to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:11 +0000 (09:18 +0100)]
mpc8308: Migrate system io config to Kconfig
Migrate the system IO configuration setting to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:10 +0000 (09:18 +0100)]
mpc83xx: Migrate CONFIG_SYS_IMMR to Kconfig
Migrate CONFIG_SYS_IMMR to Kconfig for MPC83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:09 +0000 (09:18 +0100)]
mpc83xx: Migrate HID config to Kconfig
Mirate the HID configuration settings to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:08 +0000 (09:18 +0100)]
mpc83xx: Prepare usage of DM gpio driver
The MPC85xx GPIO driver was converted to handle a broader range of SoCs.
Prepare the MPC83xx code for usage of this driver.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:07 +0000 (09:18 +0100)]
mpc83xx: Remove last CONFIG_MPC83xx
Remove the last instances of the CONFIG_MPC83xx symbol.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:06 +0000 (09:18 +0100)]
powerpc: mpc83xx: fdt: Use get_serial_clock()
Replace the hard-coded CONFIG_SYS_NS16550_CLK value for the FDT fixup
with the previously introduced get_serial_clock function
This will make it possible to activate DM for serial devices on MPC83xx
later on.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:05 +0000 (09:18 +0100)]
powerpc: mpc83xx: Implement get_serial_clock()
DM serial drivers on PowerPC determine their clock frequency via the
get_serial_clock function. This function is not Implemented yet for
MPC83xx.
This patch Implements the function so that DM serial drivers work on
MPC83xx.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:04 +0000 (09:18 +0100)]
powerpc: mpc83xx: Fix MPC8308 IMMR memory layout
The MPC8308 has two I2C controllers, but no PCI controller.
Fix the register map layout for this SoC.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:03 +0000 (09:18 +0100)]
mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to Kconfig
Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:02 +0000 (09:18 +0100)]
sbc8349: Remove SDRAM functionality
The MPC8349EMDS configuration was the basis for the sbc8349, so it also
contains its SDRAM option.
Since
* the SDRAM has to be soldered onto the board,
* the sbc8349 never used the support, and
* the support never worked (see previous patch fixing it),
we can assume that the support on the sbc8349 is an artifact created by
copying the MPC8349EMDS config wholesome.
Hence, instead of creating a separate sbc8349 config that supports
SDRAM, we can remove the SDRAM option for this board.
Should it be needed in the future, it can be copied from the new
MPC8349EMDS_SDRAM board.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:01 +0000 (09:18 +0100)]
mpc83xx: Simplify BR,OR lines
Re-format all BR,OR #define lines into single lines. This makes them
harder to read, but accessible to semi-automatic replacement.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:18:00 +0000 (09:18 +0100)]
tqm834x: Expand CONFIG_SYS_OR_TIMING_FLASH macro
We want to normalize all BR/OR config lines as much as possible.
The TQM834x board uses CONFIG_SYS_OR_TIMING_FLASH in a OR definition,
which we want to remove. But CONFIG_SYS_OR_TIMING_FLASH is also used
outside of the config file.
Replace these usages with the definition of the variable, so we can
remove the variable in the next patch.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:17:59 +0000 (09:17 +0100)]
mpc83xx: Normalize BR/OR option lines
All BR/OR option lines should have the same layout to make them easier
to migrate to Kconfig. This includes using the same option macros
everywhere.
The normalize the lines,
* replace function macros with their results, and
* replace hardcoded hex values with standard macros
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:17:58 +0000 (09:17 +0100)]
mpc83xx: Migrate LBLAW_* to Kconfig
The LBLAW_* values determine the window configuration of the memory
controller. Hence, they must be known at compile time, and cannot be
implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:17:57 +0000 (09:17 +0100)]
mpc83xx: Migrate BATS config to Kconfig
The BATs (block address translation registers) determine the initial
memory window mappings. Hence, they must be known at compile time and
cannot be implemented in the DT mechanism.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 21 Jan 2019 08:17:56 +0000 (09:17 +0100)]
powerpc: Migrate HIGH_BATS to Kconfig
Migrate the CONFIG_HIGH_BATS variable to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>