mpc83xx: Normalize BR/OR option lines
authorMario Six <mario.six@gdsys.cc>
Mon, 21 Jan 2019 08:17:59 +0000 (09:17 +0100)
committerMario Six <mario.six@gdsys.cc>
Tue, 21 May 2019 05:52:33 +0000 (07:52 +0200)
All BR/OR option lines should have the same layout to make them easier
to migrate to Kconfig. This includes using the same option macros
everywhere.

The normalize the lines,
* replace function macros with their results, and
* replace hardcoded hex values with standard macros

Signed-off-by: Mario Six <mario.six@gdsys.cc>
27 files changed:
include/configs/MPC8308RDB.h
include/configs/MPC8313ERDB_NAND.h
include/configs/MPC8313ERDB_NOR.h
include/configs/MPC8323ERDB.h
include/configs/MPC832XEMDS.h
include/configs/MPC8349EMDS.h
include/configs/MPC8349EMDS_SDRAM.h
include/configs/MPC8349ITX.h
include/configs/MPC837XEMDS.h
include/configs/MPC837XERDB.h
include/configs/caddy2.h
include/configs/hrcon.h
include/configs/ids8313.h
include/configs/kmcoge5ne.h
include/configs/kmeter1.h
include/configs/kmopti2.h
include/configs/kmsupx5.h
include/configs/kmtegr1.h
include/configs/kmtepr2.h
include/configs/kmvect1.h
include/configs/mpc8308_p1m.h
include/configs/sbc8349.h
include/configs/strider.h
include/configs/suvd3.h
include/configs/tuge1.h
include/configs/tuxx1.h
include/configs/vme8349.h

index 1953d18..e19bcaf 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_8MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
                                | BR_PS_8               /* 8 bit Port */ \
                                | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V)                 /* valid */
-#define CONFIG_SYS_OR1_PRELIM  (P2SZ_TO_AM(CONFIG_SYS_NAND_WINDOW_SIZE) \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_32KB \
                                | OR_FCM_CSCT \
                                | OR_FCM_CST \
                                | OR_FCM_CHT \
                                        | BR_MS_GPCM    /* MSEL = GPCM */ \
                                        | BR_V)         /* valid */
                                        /* 0xF0000801 */
-#define CONFIG_SYS_OR2_PRELIM          (P2SZ_TO_AM(CONFIG_SYS_VSC7385_SIZE) \
+#define CONFIG_SYS_OR2_PRELIM          (OR_AM_128KB \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_XACS \
                                        | OR_GPCM_SCY_15 \
index 79c7f12..bbb9d4b 100644 (file)
                                        | BR_MS_GPCM    /* MSEL = GPCM */ \
                                        | BR_V)         /* valid */
                                        /* 0xFA000801 */
-#define CONFIG_SYS_OR3_PRELIM          (P2SZ_TO_AM(CONFIG_SYS_BCSR_SIZE) \
+#define CONFIG_SYS_OR3_PRELIM          (OR_AM_32KB \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_ACS_DIV2 \
                                        | OR_GPCM_XACS \
                                        | BR_PS_8       /* 8 bit port */ \
                                        | BR_MS_GPCM    /* MSEL = GPCM */ \
                                        | BR_V)         /* valid */
-#define CONFIG_SYS_OR2_PRELIM          (P2SZ_TO_AM(CONFIG_SYS_VSC7385_SIZE) \
+#define CONFIG_SYS_OR2_PRELIM          (OR_AM_128KB \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_XACS \
                                        | OR_GPCM_SCY_15 \
index 1b2bba9..1cb0018 100644 (file)
                                        | BR_MS_GPCM    /* MSEL = GPCM */ \
                                        | BR_V)         /* valid */
                                        /* 0xFA000801 */
-#define CONFIG_SYS_OR3_PRELIM          (P2SZ_TO_AM(CONFIG_SYS_BCSR_SIZE) \
+#define CONFIG_SYS_OR3_PRELIM          (OR_AM_32KB \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_ACS_DIV2 \
                                        | OR_GPCM_XACS \
                                        | BR_PS_8       /* 8 bit port */ \
                                        | BR_MS_GPCM    /* MSEL = GPCM */ \
                                        | BR_V)         /* valid */
-#define CONFIG_SYS_OR2_PRELIM          (P2SZ_TO_AM(CONFIG_SYS_VSC7385_SIZE) \
+#define CONFIG_SYS_OR2_PRELIM          (OR_AM_128KB \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_XACS \
                                        | OR_GPCM_SCY_15 \
index cb17c76..30f1e44 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_16MB \
                                | OR_GPCM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
index d51d5ce..3a8a3e4 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_16MB \
                                | OR_GPCM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
                                | BR_MS_GPCM \
                                | BR_V)
                                /* 0xF8008801 */
-#define CONFIG_SYS_OR2_PRELIM  (P2SZ_TO_AM(CONFIG_SYS_PIB_WINDOW_SIZE) \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_32KB \
                                | OR_GPCM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_XACS \
                                | BR_MS_GPCM \
                                | BR_V)
                                /* 0xF8010801 */
-#define CONFIG_SYS_OR3_PRELIM  (P2SZ_TO_AM(CONFIG_SYS_PIB_WINDOW_SIZE) \
+#define CONFIG_SYS_OR3_PRELIM  (OR_AM_32KB \
                                | OR_GPCM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_XACS \
index 06017a8..fa73b81 100644 (file)
                                | BR_PS_16      /* 16 bit port  */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_32MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
index 708a21f..218c4b1 100644 (file)
                                | BR_PS_16      /* 16 bit port  */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_32MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
index 16d615d..0bf179a 100644 (file)
@@ -217,7 +217,7 @@ boards, we say we have two, but don't display a message if we find only one. */
                                | BR_PS_16 \
                                | BR_MS_GPCM \
                                | BR_V)
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_16MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
index 9d6dc76..e10c58d 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_32MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
index a1de8ac..1e45b5e 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_8MB \
                                | OR_GPCM_XACS \
                                | OR_GPCM_SCY_9 \
                                | OR_GPCM_EHTR_SET \
index b355e56..ffd52a2 100644 (file)
@@ -74,7 +74,7 @@
                                         BR_MS_GPCM |   /*  MSEL = GPCM */ \
                                         BR_V)          /* valid */
 
-#define CONFIG_SYS_OR0_PRELIM          (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM          (OR_AM_4MB \
                                        | OR_GPCM_XAM \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_ACS_DIV2 \
index d86de80..4193ceb 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_8MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_FPGA0_SIZE) \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_1MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
index e930c65..871b91f 100644 (file)
                                         BR_MS_GPCM |\
                                         BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM          (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) |\
+#define CONFIG_SYS_OR0_PRELIM          (OR_AM_8MB |\
                                         OR_GPCM_SCY_10 |\
                                         OR_GPCM_EHTR |\
                                         OR_GPCM_TRLX |\
 #define NAND_CACHE_PAGES               64
 
 #define CONFIG_SYS_BR1_PRELIM  ((CONFIG_SYS_NAND_BASE) |\
-                                (2<<BR_DECC_SHIFT) |\
+                                BR_DECC_CHK_GEN |\
                                 BR_PS_8 |\
                                 BR_MS_FCM |\
                                 BR_V)
 
-#define CONFIG_SYS_OR1_PRELIM  (0xFFFF8000 |\
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_32KB |\
                                 OR_FCM_PGS |\
                                 OR_FCM_CSCT |\
                                 OR_FCM_CST |\
                                         BR_MS_GPCM |\
                                         BR_V)
 
-#define CONFIG_SYS_OR2_PRELIM          0xFFFE0C74
+#define CONFIG_SYS_OR2_PRELIM          (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_ACS_DIV4 | OR_GPCM_SCY_7 | OR_GPCM_TRLX_SET)
 
 /*
  * CPLD setup
                                         BR_MS_GPCM |\
                                         BR_V)
 
-#define CONFIG_SYS_OR3_PRELIM          0xFFFF8814
+#define CONFIG_SYS_OR3_PRELIM          (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_SCY_1 | OR_GPCM_TRLX_SET)
 
 /*
  * HW-Watchdog
index dcabac5..370e6b4 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_64MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
 
 #define CONFIG_SYS_BR3_PRELIM (\
        CONFIG_SYS_PAXE_BASE | \
-       (1 << BR_PS_SHIFT) | \
+       BR_PS_8 | \
        BR_V)
 
 #define CONFIG_SYS_OR3_PRELIM (\
-       MEG_TO_AM(CONFIG_SYS_PAXE_SIZE) | \
+       OR_AM_256MB | \
        OR_GPCM_CSNT | \
        OR_GPCM_ACS_DIV2 | \
        OR_GPCM_SCY_2 | \
 
 #define CONFIG_SYS_BR4_PRELIM (\
        CONFIG_SYS_BFTIC3_BASE |\
-       (1 << BR_PS_SHIFT) | \
+       BR_PS_8 | \
        BR_V)
 
 #define CONFIG_SYS_OR4_PRELIM (\
-       MEG_TO_AM(CONFIG_SYS_BFTIC3_SIZE) |\
+       OR_AM_256MB|\
        OR_GPCM_CSNT | \
        OR_GPCM_ACS_DIV2 |\
        OR_GPCM_SCY_2 |\
index 1da8df3..2650544 100644 (file)
@@ -98,7 +98,7 @@
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_64MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
 
 #define CONFIG_SYS_BR3_PRELIM (\
        CONFIG_SYS_PAXE_BASE | \
-       (1 << BR_PS_SHIFT) | \
+       BR_PS_8 | \
        BR_V)
 
 #define CONFIG_SYS_OR3_PRELIM (\
-       MEG_TO_AM(CONFIG_SYS_PAXE_SIZE) | \
+       OR_AM_256MB | \
        OR_GPCM_CSNT | \
        OR_GPCM_ACS_DIV2 | \
        OR_GPCM_SCY_2 | \
index e732c2a..6e59fde 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_MS_GPCM | \
                                 BR_V)
 
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_2 | \
                                 BR_PS_16 |             \
                                 BR_MS_GPCM |           \
                                 BR_V)
-#define CONFIG_SYS_OR3_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
+#define CONFIG_SYS_OR3_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_SCY_4 | \
                                 OR_GPCM_TRLX_CLEAR | \
                                 OR_GPCM_EHTR_CLEAR)
index 42fbdbf..af39e8b 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_MS_GPCM | \
                                 BR_V)
 
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_2 | \
index 222eb72..1312aa2 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_MS_GPCM | \
                                 BR_V)
 
-#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
+#define CONFIG_SYS_OR3_PRELIM (OR_AM_256MB | \
                                 OR_GPCM_SCY_5 | \
                                 OR_GPCM_TRLX_CLEAR | \
                                 OR_GPCM_EHTR_CLEAR)
index e542158..fd00ea8 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_MS_GPCM | \
                                 BR_V)
 
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_2 | \
                                 BR_PS_16 |             \
                                 BR_MS_GPCM |           \
                                 BR_V)
-#define CONFIG_SYS_OR3_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
+#define CONFIG_SYS_OR3_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_SCY_4 | \
                                 OR_GPCM_TRLX_CLEAR | \
                                 OR_GPCM_EHTR_CLEAR)
index 3e2cc60..3d91647 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_PS_16 | \
                                 BR_MS_UPMA | \
                                 BR_V)
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE))
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_256MB)
 
 #define CONFIG_SYS_BR3_PRELIM  (CONFIG_SYS_APP2_BASE | \
                                 BR_PS_16 | \
                                 BR_V)
 
-#define CONFIG_SYS_OR3_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
+#define CONFIG_SYS_OR3_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_3 | \
index aa9710f..046355f 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_64MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
index edf76e5..dffb7c6 100644 (file)
                                        | BR_MS_GPCM    /* MSEL = GPCM */ \
                                        | BR_V)         /* valid */
 
-#define CONFIG_SYS_OR0_PRELIM          (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM          (OR_AM_8MB \
                                        | OR_GPCM_XAM \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_ACS_DIV2 \
  * 1111 1100 0000 0000 0110 1001 0000 0001 = FC006901
  */
 
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_LBC_SDRAM_SIZE) \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_64MB \
                        | OR_SDRAM_XAM \
                        | ((9 - OR_SDRAM_MIN_COLS) << OR_SDRAM_COLS_SHIFT) \
                        | ((13 - OR_SDRAM_MIN_ROWS) << OR_SDRAM_ROWS_SHIFT) \
index 3b02074..184396e 100644 (file)
                                | BR_PS_16      /* 16 bit port */ \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_8MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_ACS_DIV2 \
                                | BR_MS_GPCM    /* MSEL = GPCM */ \
                                | BR_V)         /* valid */
 
-#define CONFIG_SYS_OR1_PRELIM   (MEG_TO_AM(CONFIG_SYS_FPGA0_SIZE) \
+#define CONFIG_SYS_OR1_PRELIM   (OR_AM_1MB \
                                | OR_UPM_XAM \
                                | OR_GPCM_CSNT \
                                | OR_GPCM_SCY_5 \
index 987b2d7..ad270de 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_PS_16 | \
                                 BR_MS_UPMA | \
                                 BR_V)
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE))
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_256MB)
 
 #define CONFIG_SYS_BR3_PRELIM  (CONFIG_SYS_APP2_BASE | \
                                 BR_PS_16 | \
                                 BR_V)
 
-#define CONFIG_SYS_OR3_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
+#define CONFIG_SYS_OR3_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_3 | \
index 5fceac7..af6a348 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_MS_GPCM | \
                                 BR_V)
 
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_2 | \
index 1b97d0f..18476c1 100644 (file)
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
 
-#define CONFIG_SYS_OR0_PRELIM  (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) | \
+#define CONFIG_SYS_OR0_PRELIM  (OR_AM_256MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_5 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                BR_PS_8 | /* 8 bit port size */ \
                                BR_MS_GPCM | /* MSEL = GPCM */ \
                                BR_V)
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_KMBEC_FPGA_SIZE) | \
+#define CONFIG_SYS_OR1_PRELIM  (OR_AM_128MB | \
                                OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | \
                                OR_GPCM_SCY_2 | \
                                OR_GPCM_TRLX_SET | OR_GPCM_EAD)
                                 BR_MS_GPCM | \
                                 BR_V)
 
-#define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
+#define CONFIG_SYS_OR2_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV4 | \
                                 OR_GPCM_SCY_2 | \
                                 BR_MS_GPCM |           \
                                 BR_V)
 
-#define CONFIG_SYS_OR3_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
+#define CONFIG_SYS_OR3_PRELIM  (OR_AM_256MB | \
                                 OR_GPCM_CSNT | \
                                 OR_GPCM_ACS_DIV2 | \
                                 OR_GPCM_SCY_2 | \
index ed02661..76821e7 100644 (file)
@@ -74,7 +74,7 @@
                                         BR_MS_GPCM |   /*  MSEL = GPCM */ \
                                         BR_V)          /* valid */
 
-#define CONFIG_SYS_OR0_PRELIM          (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \
+#define CONFIG_SYS_OR0_PRELIM          (OR_AM_128MB \
                                        | OR_GPCM_XAM \
                                        | OR_GPCM_CSNT \
                                        | OR_GPCM_ACS_DIV2 \