mpc83xx: Migrate SPCR to Kconfig

Migrate the SPCR setting to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 8a3bb10..fe20e85 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -296,6 +296,7 @@ source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/hid/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig"
 source "arch/powerpc/cpu/mpc83xx/arbiter/Kconfig"
+source "arch/powerpc/cpu/mpc83xx/initreg/Kconfig"
 
 menu "Legacy options"
 

diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 7750256..59faa78 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -16,6 +16,7 @@
 #include "elbc/elbc.h"
 #include "sysio/sysio.h"
 #include "arbiter/arbiter.h"
+#include "initreg/initreg.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,34 +53,6 @@ static void config_qe_ioports(void)
  */
 void cpu_init_f (volatile immap_t * im)
 {
-       __be32 spcr_mask =
-#ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev */
-               SPCR_OPT |
-#endif
-#ifdef CONFIG_SYS_SPCR_TSECEP /* all eTSEC's Emergency priority */
-               SPCR_TSECEP |
-#endif
-#ifdef CONFIG_SYS_SPCR_TSEC1EP /* TSEC1 Emergency priority */
-               SPCR_TSEC1EP |
-#endif
-#ifdef CONFIG_SYS_SPCR_TSEC2EP /* TSEC2 Emergency priority */
-               SPCR_TSEC2EP |
-#endif
-               0;
-       __be32 spcr_val =
-#ifdef CONFIG_SYS_SPCR_OPT
-               (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT) |
-#endif
-#ifdef CONFIG_SYS_SPCR_TSECEP /* all eTSEC's Emergency priority */
-               (CONFIG_SYS_SPCR_TSECEP << SPCR_TSECEP_SHIFT) |
-#endif
-#ifdef CONFIG_SYS_SPCR_TSEC1EP /* TSEC1 Emergency priority */
-               (CONFIG_SYS_SPCR_TSEC1EP << SPCR_TSEC1EP_SHIFT) |
-#endif
-#ifdef CONFIG_SYS_SPCR_TSEC2EP /* TSEC2 Emergency priority */
-               (CONFIG_SYS_SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT) |
-#endif
-               0;
        __be32 sccr_mask =
 #ifdef CONFIG_SYS_SCCR_ENCCM /* Encryption clock mode */
                SCCR_ENCCM |

diff --git a/arch/powerpc/cpu/mpc83xx/initreg/Kconfig b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig
new file mode 100644 (file)
index 0000000..82c2489
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig
@@ -0,0 +1,5 @@
+menu "Initial register configuration"
+
+source "arch/powerpc/cpu/mpc83xx/initreg/Kconfig.spcr"
+
+endmenu

diff --git a/arch/powerpc/cpu/mpc83xx/initreg/Kconfig.spcr b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig.spcr
new file mode 100644 (file)
index 0000000..f32309e
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig.spcr
@@ -0,0 +1,115 @@
+menu "SPCR - System priority and configuration register"
+
+choice
+       prompt "Optimize"
+
+config SPCR_OPT_UNSET
+       bool "Don't set value"
+
+config SPCR_OPT_NONE
+       bool "No performance enhancement"
+
+config SPCR_OPT_SPEC_READ
+       bool "Performance enhancement by speculative read"
+
+endchoice
+
+if ARCH_MPC8308 || ARCH_MPC831X || ARCH_MPC837X
+
+choice
+       prompt "TSEC emergency priority"
+
+config SPCR_TSECEP_UNSET
+       bool "Don't set value"
+
+config SPCR_TSECEP_0
+       bool "Level 0 (lowest priority)"
+
+config SPCR_TSECEP_1
+       bool "Level 1"
+
+config SPCR_TSECEP_2
+       bool "Level 2"
+
+config SPCR_TSECEP_3
+       bool "Level 3 (highest priority)"
+
+endchoice
+
+endif
+
+if ARCH_MPC8349
+
+choice
+       prompt "TSEC1 emergency priority"
+
+config SPCR_TSEC1EP_UNSET
+       bool "Don't set value"
+
+config SPCR_TSEC1EP_0
+       bool "Level 0 (lowest priority)"
+
+config SPCR_TSEC1EP_1
+       bool "Level 1"
+
+config SPCR_TSEC1EP_2
+       bool "Level 2"
+
+config SPCR_TSEC1EP_3
+       bool "Level 3 (highest priority)"
+
+endchoice
+
+choice
+       prompt "TSEC2 emergency priority"
+
+config SPCR_TSEC2EP_UNSET
+       bool "Don't set value"
+
+config SPCR_TSEC2EP_0
+       bool "Level 0 (lowest priority)"
+
+config SPCR_TSEC2EP_1
+       bool "Level 1"
+
+config SPCR_TSEC2EP_2
+       bool "Level 2"
+
+config SPCR_TSEC2EP_3
+       bool "Level 3 (highest priority)"
+
+endchoice
+
+endif
+
+config SPCR_OPT
+       hex
+       default 0x0 if SPCR_OPT_UNSET
+       default 0x0 if SPCR_OPT_NONE
+       default 0x800000 if SPCR_OPT_SPEC_READ
+
+config SPCR_TSECEP
+       hex
+       default 0x0 if SPCR_TSECEP_UNSET
+       default 0x0 if SPCR_TSECEP_0
+       default 0x100 if SPCR_TSECEP_1
+       default 0x200 if SPCR_TSECEP_2
+       default 0x300 if SPCR_TSECEP_3
+
+config SPCR_TSEC1EP
+       hex
+       default 0x0 if SPCR_TSEC1EP_UNSET
+       default 0x0 if SPCR_TSEC1EP_0
+       default 0x100 if SPCR_TSEC1EP_1
+       default 0x200 if SPCR_TSEC1EP_2
+       default 0x300 if SPCR_TSEC1EP_3
+
+config SPCR_TSEC2EP
+       hex
+       default 0x0 if SPCR_TSEC2EP_UNSET
+       default 0x0 if SPCR_TSEC2EP_0
+       default 0x1 if SPCR_TSEC2EP_1
+       default 0x2 if SPCR_TSEC2EP_2
+       default 0x3 if SPCR_TSEC2EP_3
+
+endmenu

diff --git a/arch/powerpc/cpu/mpc83xx/initreg/initreg.h b/arch/powerpc/cpu/mpc83xx/initreg/initreg.h
new file mode 100644 (file)
index 0000000..d61c70f
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/initreg/initreg.h
@@ -0,0 +1,43 @@
+#define SPCR_PCIHPE_MASK       0x10000000
+#define SPCR_PCIPR_MASK                0x03000000
+#define SPCR_OPT_MASK          0x00800000
+#define SPCR_TBEN_MASK         0x00400000
+#define SPCR_COREPR_MASK       0x00300000
+#define SPCR_TSEC1DP_MASK      0x00003000
+#define SPCR_TSEC1BDP_MASK     0x00000C00
+#define SPCR_TSEC1EP_MASK      0x00000300
+#define SPCR_TSEC2DP_MASK      0x00000030
+#define SPCR_TSEC2BDP_MASK     0x0000000C
+#define SPCR_TSEC2EP_MASK      0x00000003
+#define SPCR_TSECDP_MASK       0x00003000
+#define SPCR_TSECBDP_MASK      0x00000C00
+#define SPCR_TSECEP_MASK       0x00000300
+
+       const __be32 spcr_mask =
+#if defined(CONFIG_SPCR_OPT) && !defined(CONFIG_SPCR_OPT_UNSET)
+               SPCR_OPT_MASK |
+#endif
+#if defined(CONFIG_SPCR_TSECEP) && !defined(CONFIG_SPCR_TSECEP_UNSET)
+               SPCR_TSECEP_MASK |
+#endif
+#if defined(CONFIG_SPCR_TSEC1EP) && !defined(CONFIG_SPCR_TSEC1EP_UNSET)
+               SPCR_TSEC1EP_MASK |
+#endif
+#if defined(CONFIG_SPCR_TSEC2EP) && !defined(CONFIG_SPCR_TSEC2EP_UNSET)
+               SPCR_TSEC2EP_MASK |
+#endif
+               0;
+       const __be32 spcr_val =
+#if defined(CONFIG_SPCR_OPT) && !defined(CONFIG_SPCR_OPT_UNSET)
+               CONFIG_SPCR_OPT |
+#endif
+#if defined(CONFIG_SPCR_TSECEP) && !defined(CONFIG_SPCR_TSECEP_UNSET)
+               CONFIG_SPCR_TSECEP |
+#endif
+#if defined(CONFIG_SPCR_TSEC1EP) && !defined(CONFIG_SPCR_TSEC1EP_UNSET)
+               CONFIG_SPCR_TSEC1EP |
+#endif
+#if defined(CONFIG_SPCR_TSEC2EP) && !defined(CONFIG_SPCR_TSEC2EP_UNSET)
+               CONFIG_SPCR_TSEC2EP |
+#endif
+               0;

diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index 00feacc..a01ff89 100644 (file)
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -72,6 +72,7 @@ CONFIG_SICR_TMSOBI1_2_5_V=y
 CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y

diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index 2263b9c..e5e1b7a 100644 (file)
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -82,6 +82,7 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6

diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig
index b52d1fd..08486f8 100644 (file)
--- a/configs/MPC8323ERDB_defconfig
+++ b/configs/MPC8323ERDB_defconfig
@@ -75,6 +75,7 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_OPT_SPEC_READ=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6

diff --git a/configs/MPC8349EMDS_PCI64_defconfig b/configs/MPC8349EMDS_PCI64_defconfig
index 9108275..fa646f5 100644 (file)
--- a/configs/MPC8349EMDS_PCI64_defconfig
+++ b/configs/MPC8349EMDS_PCI64_defconfig
@@ -58,6 +58,8 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSEC1EP_3=y
+CONFIG_SPCR_TSEC2EP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6

diff --git a/configs/MPC8349EMDS_SLAVE_defconfig b/configs/MPC8349EMDS_SLAVE_defconfig
index 7454dd6..8af1a3d 100644 (file)
--- a/configs/MPC8349EMDS_SLAVE_defconfig
+++ b/configs/MPC8349EMDS_SLAVE_defconfig
@@ -56,6 +56,8 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSEC1EP_3=y
+CONFIG_SPCR_TSEC2EP_3=y
 CONFIG_PCI_ONE_PCI1=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y

diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 328c3aa..b2b944a 100644 (file)
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -58,6 +58,8 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSEC1EP_3=y
+CONFIG_SPCR_TSEC2EP_3=y
 CONFIG_PCI_ONE_PCI1=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y

diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index fa121d7..fcd7833 100644 (file)
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -101,6 +101,8 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSEC1EP_3=y
+CONFIG_SPCR_TSEC2EP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000"

diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index 0a79d1e..319b8d8 100644 (file)
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -101,6 +101,8 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSEC1EP_3=y
+CONFIG_SPCR_TSEC2EP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6

diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index e746107..f60527b 100644 (file)
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -100,6 +100,8 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSEC1EP_3=y
+CONFIG_SPCR_TSEC2EP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6

diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 0df5bdb..33e536c 100644 (file)
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -106,6 +106,7 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6

diff --git a/configs/MPC837XEMDS_SLAVE_defconfig b/configs/MPC837XEMDS_SLAVE_defconfig
index 99f206e..7d1f405 100644 (file)
--- a/configs/MPC837XEMDS_SLAVE_defconfig
+++ b/configs/MPC837XEMDS_SLAVE_defconfig
@@ -66,6 +66,7 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"

diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index 98dc6ca..d4515cb 100644 (file)
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -86,6 +86,7 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6

diff --git a/configs/MPC837XERDB_SLAVE_defconfig b/configs/MPC837XERDB_SLAVE_defconfig
index 11a33d9..9730aef 100644 (file)
--- a/configs/MPC837XERDB_SLAVE_defconfig
+++ b/configs/MPC837XERDB_SLAVE_defconfig
@@ -66,6 +66,7 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE"

diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index d43b364..7bf081a 100644 (file)
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -106,6 +106,7 @@ CONFIG_HID0_FINAL_ICE=y
 CONFIG_HID2_HBE=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCIE"

diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index 3dad033..9c1ab75 100644 (file)
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -69,6 +69,7 @@ CONFIG_SICR_TMSOBI1_2_5_V=y
 CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
index 4fb7cb5..0f1cc63 100644 (file)
--- a/configs/hrcon_dh_defconfig
+++ b/configs/hrcon_dh_defconfig
@@ -69,6 +69,7 @@ CONFIG_SICR_TMSOBI1_2_5_V=y
 CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig
index f73084c..f1559be 100644 (file)
--- a/configs/mpc8308_p1m_defconfig
+++ b/configs/mpc8308_p1m_defconfig
@@ -70,6 +70,7 @@ CONFIG_SICR_GTM_GPIO=y
 CONFIG_SICR_GPIOSEL_IEEE1588=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=5

diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig
index 722f25d..b11a26c 100644 (file)
--- a/configs/strider_con_defconfig
+++ b/configs/strider_con_defconfig
@@ -68,6 +68,7 @@ CONFIG_SICR_TMSOBI1_2_5_V=y
 CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
index dd3c83d..72cb274 100644 (file)
--- a/configs/strider_con_dp_defconfig
+++ b/configs/strider_con_dp_defconfig
@@ -68,6 +68,7 @@ CONFIG_SICR_TMSOBI1_2_5_V=y
 CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig
index 1a35132..f36404d 100644 (file)
--- a/configs/strider_cpu_defconfig
+++ b/configs/strider_cpu_defconfig
@@ -68,6 +68,7 @@ CONFIG_SICR_TMSOBI1_2_5_V=y
 CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
index 79fdc14..0ade985 100644 (file)
--- a/configs/strider_cpu_dp_defconfig
+++ b/configs/strider_cpu_dp_defconfig
@@ -68,6 +68,7 @@ CONFIG_SICR_TMSOBI1_2_5_V=y
 CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSECEP_3=y
 CONFIG_CMD_IOLOOP=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 60c6b92..c4b604c 100644 (file)
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -33,8 +33,6 @@
 #define CONFIG_FSL_SERDES
 #define CONFIG_FSL_SERDES1     0xe3000
 
-#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
-
 /*
  * DDR Setup
  */

diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 9531be3..10742ae 100644 (file)
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -31,8 +31,6 @@
 
 #define CONFIG_HWCONFIG
 
-#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
-
 /*
  * DDR Setup
  */

diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 2349651..2ef16e5 100644 (file)
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -20,9 +20,6 @@
  */
 #define CONFIG_SYS_SICRL               0x00000000
 
-/* (0-1) Optimize transactions between CSB and the SEC and QUICC Engine block */
-#define CONFIG_SYS_SPCR_OPT    1
-
 /*
  * DDR Setup
  */

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 51c47a8..b64a911 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -328,8 +328,6 @@
 /*
  * System performance
  */
-#define CONFIG_SYS_SPCR_TSEC1EP        3       /* TSEC1 emergency priority (0-3) */
-#define CONFIG_SYS_SPCR_TSEC2EP        3       /* TSEC2 emergency priority (0-3) */
 #define CONFIG_SYS_SCCR_TSEC1CM        1       /* TSEC1 clock mode (0-3) */
 #define CONFIG_SYS_SCCR_TSEC2CM        1       /* TSEC2 & I2C0 clock mode (0-3) */
 

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 1c8574a..d8e86f2 100644 (file)
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -403,8 +403,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 /*
  * System performance
  */
-#define CONFIG_SYS_SPCR_TSEC1EP        3       /* TSEC1 emergency priority (0-3) */
-#define CONFIG_SYS_SPCR_TSEC2EP        3       /* TSEC2 emergency priority (0-3) */
 #define CONFIG_SYS_SCCR_TSEC1CM        1       /* TSEC1 clock mode (0-3) */
 #define CONFIG_SYS_SCCR_TSEC2CM        1       /* TSEC2 & I2C0 clock mode (0-3) */
 #define CONFIG_SYS_SCCR_USBMPHCM 3     /* USB MPH controller's clock */

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index d8a02b8..5d46907 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -12,9 +12,6 @@
  */
 #define CONFIG_E300            1 /* E300 family */
 
-/* System Priority Control Register */
-#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC1/2 emergency has highest priority */
-
 /*
  * IP blocks clock configuration
  */

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 6fa57eb..b6756c3 100644 (file)
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -23,9 +23,6 @@
 /* System performance - define the value i.e. CONFIG_SYS_XXX
 */
 
-/* System Priority Control Regsiter */
-#define CONFIG_SYS_SPCR_TSECEP 3       /* eTSEC1&2 emergency priority (0-3) */
-
 /* System Clock Configuration Register */
 #define CONFIG_SYS_SCCR_TSEC1CM        1               /* eTSEC1 clock mode (0-3) */
 #define CONFIG_SYS_SCCR_TSEC2CM        1               /* eTSEC2 clock mode (0-3) */

diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 76b28e0..9cb5df4 100644 (file)
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -21,8 +21,6 @@
 #define CONFIG_FSL_SERDES
 #define CONFIG_FSL_SERDES1     0xe3000
 
-#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
-
 /*
  * DDR Setup
  */

diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index 60871b7..ce3a899 100644 (file)
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -36,8 +36,6 @@
 #define CONFIG_FSL_SERDES
 #define CONFIG_FSL_SERDES1     0xe3000
 
-#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
-
 /*
  * DDR Setup
  */

diff --git a/include/configs/strider.h b/include/configs/strider.h
index 95bc202..e4584db 100644 (file)
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -21,8 +21,6 @@
 #define CONFIG_FSL_SERDES
 #define CONFIG_FSL_SERDES1     0xe3000
 
-#define CONFIG_SYS_SPCR_TSECEP 3 /* eTSEC emergency priority is highest */
-
 /*
  * DDR Setup
  */

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index ae07c8d..30b8b55 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4085,7 +4085,6 @@ CONFIG_SYS_SPANSION_BOOT
 CONFIG_SYS_SPCR_OPT
 CONFIG_SYS_SPCR_TSEC1EP
 CONFIG_SYS_SPCR_TSEC2EP
-CONFIG_SYS_SPCR_TSECEP
 CONFIG_SYS_SPD_BUS_NUM
 CONFIG_SYS_SPI0
 CONFIG_SYS_SPI0_NUM_CS