Imported Upstream version 1.2
[platform/upstream/libunwind.git] / src / ptrace / _UPT_reg_offset.c
1 /* libunwind - a platform-independent unwind library
2    Copyright (C) 2003-2004 Hewlett-Packard Co
3         Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
4    Copyright (C) 2013 Linaro Limited
5
6 This file is part of libunwind.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice shall be
17 included in all copies or substantial portions of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
22 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
26
27 #include "_UPT_internal.h"
28
29 #include <stddef.h>
30
31 #ifdef HAVE_ASM_PTRACE_OFFSETS_H
32 # include <asm/ptrace_offsets.h>
33 #endif
34
35 const int _UPT_reg_offset[UNW_REG_LAST + 1] =
36   {
37 #ifdef HAVE_ASM_PTRACE_OFFSETS_H
38 # ifndef PT_AR_CSD
39 #  define PT_AR_CSD     -1      /* this was introduced with rev 2.1 of ia64 */
40 # endif
41
42     [UNW_IA64_GR +  0]  = -1,           [UNW_IA64_GR +  1]      = PT_R1,
43     [UNW_IA64_GR +  2]  = PT_R2,        [UNW_IA64_GR +  3]      = PT_R3,
44     [UNW_IA64_GR +  4]  = PT_R4,        [UNW_IA64_GR +  5]      = PT_R5,
45     [UNW_IA64_GR +  6]  = PT_R6,        [UNW_IA64_GR +  7]      = PT_R7,
46     [UNW_IA64_GR +  8]  = PT_R8,        [UNW_IA64_GR +  9]      = PT_R9,
47     [UNW_IA64_GR + 10]  = PT_R10,       [UNW_IA64_GR + 11]      = PT_R11,
48     [UNW_IA64_GR + 12]  = PT_R12,       [UNW_IA64_GR + 13]      = PT_R13,
49     [UNW_IA64_GR + 14]  = PT_R14,       [UNW_IA64_GR + 15]      = PT_R15,
50     [UNW_IA64_GR + 16]  = PT_R16,       [UNW_IA64_GR + 17]      = PT_R17,
51     [UNW_IA64_GR + 18]  = PT_R18,       [UNW_IA64_GR + 19]      = PT_R19,
52     [UNW_IA64_GR + 20]  = PT_R20,       [UNW_IA64_GR + 21]      = PT_R21,
53     [UNW_IA64_GR + 22]  = PT_R22,       [UNW_IA64_GR + 23]      = PT_R23,
54     [UNW_IA64_GR + 24]  = PT_R24,       [UNW_IA64_GR + 25]      = PT_R25,
55     [UNW_IA64_GR + 26]  = PT_R26,       [UNW_IA64_GR + 27]      = PT_R27,
56     [UNW_IA64_GR + 28]  = PT_R28,       [UNW_IA64_GR + 29]      = PT_R29,
57     [UNW_IA64_GR + 30]  = PT_R30,       [UNW_IA64_GR + 31]      = PT_R31,
58
59     [UNW_IA64_NAT+  0]  = -1,           [UNW_IA64_NAT+  1]      = PT_NAT_BITS,
60     [UNW_IA64_NAT+  2]  = PT_NAT_BITS,  [UNW_IA64_NAT+  3]      = PT_NAT_BITS,
61     [UNW_IA64_NAT+  4]  = PT_NAT_BITS,  [UNW_IA64_NAT+  5]      = PT_NAT_BITS,
62     [UNW_IA64_NAT+  6]  = PT_NAT_BITS,  [UNW_IA64_NAT+  7]      = PT_NAT_BITS,
63     [UNW_IA64_NAT+  8]  = PT_NAT_BITS,  [UNW_IA64_NAT+  9]      = PT_NAT_BITS,
64     [UNW_IA64_NAT+ 10]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 11]      = PT_NAT_BITS,
65     [UNW_IA64_NAT+ 12]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 13]      = PT_NAT_BITS,
66     [UNW_IA64_NAT+ 14]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 15]      = PT_NAT_BITS,
67     [UNW_IA64_NAT+ 16]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 17]      = PT_NAT_BITS,
68     [UNW_IA64_NAT+ 18]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 19]      = PT_NAT_BITS,
69     [UNW_IA64_NAT+ 20]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 21]      = PT_NAT_BITS,
70     [UNW_IA64_NAT+ 22]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 23]      = PT_NAT_BITS,
71     [UNW_IA64_NAT+ 24]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 25]      = PT_NAT_BITS,
72     [UNW_IA64_NAT+ 26]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 27]      = PT_NAT_BITS,
73     [UNW_IA64_NAT+ 28]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 29]      = PT_NAT_BITS,
74     [UNW_IA64_NAT+ 30]  = PT_NAT_BITS,  [UNW_IA64_NAT+ 31]      = PT_NAT_BITS,
75
76     [UNW_IA64_FR +  0]  = -1,           [UNW_IA64_FR +  1]      = -1,
77     [UNW_IA64_FR +  2]  = PT_F2,        [UNW_IA64_FR +  3]      = PT_F3,
78     [UNW_IA64_FR +  4]  = PT_F4,        [UNW_IA64_FR +  5]      = PT_F5,
79     [UNW_IA64_FR +  6]  = PT_F6,        [UNW_IA64_FR +  7]      = PT_F7,
80     [UNW_IA64_FR +  8]  = PT_F8,        [UNW_IA64_FR +  9]      = PT_F9,
81     [UNW_IA64_FR + 10]  = PT_F10,       [UNW_IA64_FR + 11]      = PT_F11,
82     [UNW_IA64_FR + 12]  = PT_F12,       [UNW_IA64_FR + 13]      = PT_F13,
83     [UNW_IA64_FR + 14]  = PT_F14,       [UNW_IA64_FR + 15]      = PT_F15,
84     [UNW_IA64_FR + 16]  = PT_F16,       [UNW_IA64_FR + 17]      = PT_F17,
85     [UNW_IA64_FR + 18]  = PT_F18,       [UNW_IA64_FR + 19]      = PT_F19,
86     [UNW_IA64_FR + 20]  = PT_F20,       [UNW_IA64_FR + 21]      = PT_F21,
87     [UNW_IA64_FR + 22]  = PT_F22,       [UNW_IA64_FR + 23]      = PT_F23,
88     [UNW_IA64_FR + 24]  = PT_F24,       [UNW_IA64_FR + 25]      = PT_F25,
89     [UNW_IA64_FR + 26]  = PT_F26,       [UNW_IA64_FR + 27]      = PT_F27,
90     [UNW_IA64_FR + 28]  = PT_F28,       [UNW_IA64_FR + 29]      = PT_F29,
91     [UNW_IA64_FR + 30]  = PT_F30,       [UNW_IA64_FR + 31]      = PT_F31,
92     [UNW_IA64_FR + 32]  = PT_F32,       [UNW_IA64_FR + 33]      = PT_F33,
93     [UNW_IA64_FR + 34]  = PT_F34,       [UNW_IA64_FR + 35]      = PT_F35,
94     [UNW_IA64_FR + 36]  = PT_F36,       [UNW_IA64_FR + 37]      = PT_F37,
95     [UNW_IA64_FR + 38]  = PT_F38,       [UNW_IA64_FR + 39]      = PT_F39,
96     [UNW_IA64_FR + 40]  = PT_F40,       [UNW_IA64_FR + 41]      = PT_F41,
97     [UNW_IA64_FR + 42]  = PT_F42,       [UNW_IA64_FR + 43]      = PT_F43,
98     [UNW_IA64_FR + 44]  = PT_F44,       [UNW_IA64_FR + 45]      = PT_F45,
99     [UNW_IA64_FR + 46]  = PT_F46,       [UNW_IA64_FR + 47]      = PT_F47,
100     [UNW_IA64_FR + 48]  = PT_F48,       [UNW_IA64_FR + 49]      = PT_F49,
101     [UNW_IA64_FR + 50]  = PT_F50,       [UNW_IA64_FR + 51]      = PT_F51,
102     [UNW_IA64_FR + 52]  = PT_F52,       [UNW_IA64_FR + 53]      = PT_F53,
103     [UNW_IA64_FR + 54]  = PT_F54,       [UNW_IA64_FR + 55]      = PT_F55,
104     [UNW_IA64_FR + 56]  = PT_F56,       [UNW_IA64_FR + 57]      = PT_F57,
105     [UNW_IA64_FR + 58]  = PT_F58,       [UNW_IA64_FR + 59]      = PT_F59,
106     [UNW_IA64_FR + 60]  = PT_F60,       [UNW_IA64_FR + 61]      = PT_F61,
107     [UNW_IA64_FR + 62]  = PT_F62,       [UNW_IA64_FR + 63]      = PT_F63,
108     [UNW_IA64_FR + 64]  = PT_F64,       [UNW_IA64_FR + 65]      = PT_F65,
109     [UNW_IA64_FR + 66]  = PT_F66,       [UNW_IA64_FR + 67]      = PT_F67,
110     [UNW_IA64_FR + 68]  = PT_F68,       [UNW_IA64_FR + 69]      = PT_F69,
111     [UNW_IA64_FR + 70]  = PT_F70,       [UNW_IA64_FR + 71]      = PT_F71,
112     [UNW_IA64_FR + 72]  = PT_F72,       [UNW_IA64_FR + 73]      = PT_F73,
113     [UNW_IA64_FR + 74]  = PT_F74,       [UNW_IA64_FR + 75]      = PT_F75,
114     [UNW_IA64_FR + 76]  = PT_F76,       [UNW_IA64_FR + 77]      = PT_F77,
115     [UNW_IA64_FR + 78]  = PT_F78,       [UNW_IA64_FR + 79]      = PT_F79,
116     [UNW_IA64_FR + 80]  = PT_F80,       [UNW_IA64_FR + 81]      = PT_F81,
117     [UNW_IA64_FR + 82]  = PT_F82,       [UNW_IA64_FR + 83]      = PT_F83,
118     [UNW_IA64_FR + 84]  = PT_F84,       [UNW_IA64_FR + 85]      = PT_F85,
119     [UNW_IA64_FR + 86]  = PT_F86,       [UNW_IA64_FR + 87]      = PT_F87,
120     [UNW_IA64_FR + 88]  = PT_F88,       [UNW_IA64_FR + 89]      = PT_F89,
121     [UNW_IA64_FR + 90]  = PT_F90,       [UNW_IA64_FR + 91]      = PT_F91,
122     [UNW_IA64_FR + 92]  = PT_F92,       [UNW_IA64_FR + 93]      = PT_F93,
123     [UNW_IA64_FR + 94]  = PT_F94,       [UNW_IA64_FR + 95]      = PT_F95,
124     [UNW_IA64_FR + 96]  = PT_F96,       [UNW_IA64_FR + 97]      = PT_F97,
125     [UNW_IA64_FR + 98]  = PT_F98,       [UNW_IA64_FR + 99]      = PT_F99,
126     [UNW_IA64_FR +100]  = PT_F100,      [UNW_IA64_FR +101]      = PT_F101,
127     [UNW_IA64_FR +102]  = PT_F102,      [UNW_IA64_FR +103]      = PT_F103,
128     [UNW_IA64_FR +104]  = PT_F104,      [UNW_IA64_FR +105]      = PT_F105,
129     [UNW_IA64_FR +106]  = PT_F106,      [UNW_IA64_FR +107]      = PT_F107,
130     [UNW_IA64_FR +108]  = PT_F108,      [UNW_IA64_FR +109]      = PT_F109,
131     [UNW_IA64_FR +110]  = PT_F110,      [UNW_IA64_FR +111]      = PT_F111,
132     [UNW_IA64_FR +112]  = PT_F112,      [UNW_IA64_FR +113]      = PT_F113,
133     [UNW_IA64_FR +114]  = PT_F114,      [UNW_IA64_FR +115]      = PT_F115,
134     [UNW_IA64_FR +116]  = PT_F116,      [UNW_IA64_FR +117]      = PT_F117,
135     [UNW_IA64_FR +118]  = PT_F118,      [UNW_IA64_FR +119]      = PT_F119,
136     [UNW_IA64_FR +120]  = PT_F120,      [UNW_IA64_FR +121]      = PT_F121,
137     [UNW_IA64_FR +122]  = PT_F122,      [UNW_IA64_FR +123]      = PT_F123,
138     [UNW_IA64_FR +124]  = PT_F124,      [UNW_IA64_FR +125]      = PT_F125,
139     [UNW_IA64_FR +126]  = PT_F126,      [UNW_IA64_FR +127]      = PT_F127,
140
141     [UNW_IA64_AR +  0]  = -1,           [UNW_IA64_AR +  1]      = -1,
142     [UNW_IA64_AR +  2]  = -1,           [UNW_IA64_AR +  3]      = -1,
143     [UNW_IA64_AR +  4]  = -1,           [UNW_IA64_AR +  5]      = -1,
144     [UNW_IA64_AR +  6]  = -1,           [UNW_IA64_AR +  7]      = -1,
145     [UNW_IA64_AR +  8]  = -1,           [UNW_IA64_AR +  9]      = -1,
146     [UNW_IA64_AR + 10]  = -1,           [UNW_IA64_AR + 11]      = -1,
147     [UNW_IA64_AR + 12]  = -1,           [UNW_IA64_AR + 13]      = -1,
148     [UNW_IA64_AR + 14]  = -1,           [UNW_IA64_AR + 15]      = -1,
149     [UNW_IA64_AR + 16]  = PT_AR_RSC,    [UNW_IA64_AR + 17]      = PT_AR_BSP,
150     [UNW_IA64_AR + 18]  = PT_AR_BSPSTORE,[UNW_IA64_AR + 19]     = PT_AR_RNAT,
151     [UNW_IA64_AR + 20]  = -1,           [UNW_IA64_AR + 21]      = -1,
152     [UNW_IA64_AR + 22]  = -1,           [UNW_IA64_AR + 23]      = -1,
153     [UNW_IA64_AR + 24]  = -1,           [UNW_IA64_AR + 25]      = PT_AR_CSD,
154     [UNW_IA64_AR + 26]  = -1,           [UNW_IA64_AR + 27]      = -1,
155     [UNW_IA64_AR + 28]  = -1,           [UNW_IA64_AR + 29]      = -1,
156     [UNW_IA64_AR + 30]  = -1,           [UNW_IA64_AR + 31]      = -1,
157     [UNW_IA64_AR + 32]  = PT_AR_CCV,    [UNW_IA64_AR + 33]      = -1,
158     [UNW_IA64_AR + 34]  = -1,           [UNW_IA64_AR + 35]      = -1,
159     [UNW_IA64_AR + 36]  = PT_AR_UNAT,   [UNW_IA64_AR + 37]      = -1,
160     [UNW_IA64_AR + 38]  = -1,           [UNW_IA64_AR + 39]      = -1,
161     [UNW_IA64_AR + 40]  = PT_AR_FPSR,   [UNW_IA64_AR + 41]      = -1,
162     [UNW_IA64_AR + 42]  = -1,           [UNW_IA64_AR + 43]      = -1,
163     [UNW_IA64_AR + 44]  = -1,           [UNW_IA64_AR + 45]      = -1,
164     [UNW_IA64_AR + 46]  = -1,           [UNW_IA64_AR + 47]      = -1,
165     [UNW_IA64_AR + 48]  = -1,           [UNW_IA64_AR + 49]      = -1,
166     [UNW_IA64_AR + 50]  = -1,           [UNW_IA64_AR + 51]      = -1,
167     [UNW_IA64_AR + 52]  = -1,           [UNW_IA64_AR + 53]      = -1,
168     [UNW_IA64_AR + 54]  = -1,           [UNW_IA64_AR + 55]      = -1,
169     [UNW_IA64_AR + 56]  = -1,           [UNW_IA64_AR + 57]      = -1,
170     [UNW_IA64_AR + 58]  = -1,           [UNW_IA64_AR + 59]      = -1,
171     [UNW_IA64_AR + 60]  = -1,           [UNW_IA64_AR + 61]      = -1,
172     [UNW_IA64_AR + 62]  = -1,           [UNW_IA64_AR + 63]      = -1,
173     [UNW_IA64_AR + 64]  = PT_AR_PFS,    [UNW_IA64_AR + 65]      = PT_AR_LC,
174     [UNW_IA64_AR + 66]  = PT_AR_EC,     [UNW_IA64_AR + 67]      = -1,
175     [UNW_IA64_AR + 68]  = -1,           [UNW_IA64_AR + 69]      = -1,
176     [UNW_IA64_AR + 70]  = -1,           [UNW_IA64_AR + 71]      = -1,
177     [UNW_IA64_AR + 72]  = -1,           [UNW_IA64_AR + 73]      = -1,
178     [UNW_IA64_AR + 74]  = -1,           [UNW_IA64_AR + 75]      = -1,
179     [UNW_IA64_AR + 76]  = -1,           [UNW_IA64_AR + 77]      = -1,
180     [UNW_IA64_AR + 78]  = -1,           [UNW_IA64_AR + 79]      = -1,
181     [UNW_IA64_AR + 80]  = -1,           [UNW_IA64_AR + 81]      = -1,
182     [UNW_IA64_AR + 82]  = -1,           [UNW_IA64_AR + 83]      = -1,
183     [UNW_IA64_AR + 84]  = -1,           [UNW_IA64_AR + 85]      = -1,
184     [UNW_IA64_AR + 86]  = -1,           [UNW_IA64_AR + 87]      = -1,
185     [UNW_IA64_AR + 88]  = -1,           [UNW_IA64_AR + 89]      = -1,
186     [UNW_IA64_AR + 90]  = -1,           [UNW_IA64_AR + 91]      = -1,
187     [UNW_IA64_AR + 92]  = -1,           [UNW_IA64_AR + 93]      = -1,
188     [UNW_IA64_AR + 94]  = -1,           [UNW_IA64_AR + 95]      = -1,
189     [UNW_IA64_AR + 96]  = -1,           [UNW_IA64_AR + 97]      = -1,
190     [UNW_IA64_AR + 98]  = -1,           [UNW_IA64_AR + 99]      = -1,
191     [UNW_IA64_AR +100]  = -1,           [UNW_IA64_AR +101]      = -1,
192     [UNW_IA64_AR +102]  = -1,           [UNW_IA64_AR +103]      = -1,
193     [UNW_IA64_AR +104]  = -1,           [UNW_IA64_AR +105]      = -1,
194     [UNW_IA64_AR +106]  = -1,           [UNW_IA64_AR +107]      = -1,
195     [UNW_IA64_AR +108]  = -1,           [UNW_IA64_AR +109]      = -1,
196     [UNW_IA64_AR +110]  = -1,           [UNW_IA64_AR +111]      = -1,
197     [UNW_IA64_AR +112]  = -1,           [UNW_IA64_AR +113]      = -1,
198     [UNW_IA64_AR +114]  = -1,           [UNW_IA64_AR +115]      = -1,
199     [UNW_IA64_AR +116]  = -1,           [UNW_IA64_AR +117]      = -1,
200     [UNW_IA64_AR +118]  = -1,           [UNW_IA64_AR +119]      = -1,
201     [UNW_IA64_AR +120]  = -1,           [UNW_IA64_AR +121]      = -1,
202     [UNW_IA64_AR +122]  = -1,           [UNW_IA64_AR +123]      = -1,
203     [UNW_IA64_AR +124]  = -1,           [UNW_IA64_AR +125]      = -1,
204     [UNW_IA64_AR +126]  = -1,           [UNW_IA64_AR +127]      = -1,
205
206     [UNW_IA64_BR +  0]  = PT_B0,        [UNW_IA64_BR +  1]      = PT_B1,
207     [UNW_IA64_BR +  2]  = PT_B2,        [UNW_IA64_BR +  3]      = PT_B3,
208     [UNW_IA64_BR +  4]  = PT_B4,        [UNW_IA64_BR +  5]      = PT_B5,
209     [UNW_IA64_BR +  6]  = PT_B6,        [UNW_IA64_BR +  7]      = PT_B7,
210
211     [UNW_IA64_PR]       = PT_PR,
212     [UNW_IA64_CFM]      = PT_CFM,
213     [UNW_IA64_IP]       = PT_CR_IIP
214 #elif defined(HAVE_TTRACE)
215 # warning No support for ttrace() yet.
216 #elif defined(UNW_TARGET_HPPA)
217     [UNW_HPPA_GR +  0]  = 0x000,        [UNW_HPPA_GR +  1]      = 0x004,
218     [UNW_HPPA_GR +  2]  = 0x008,        [UNW_HPPA_GR +  3]      = 0x00c,
219     [UNW_HPPA_GR +  4]  = 0x010,        [UNW_HPPA_GR +  5]      = 0x014,
220     [UNW_HPPA_GR +  6]  = 0x018,        [UNW_HPPA_GR +  7]      = 0x01c,
221     [UNW_HPPA_GR +  8]  = 0x020,        [UNW_HPPA_GR +  9]      = 0x024,
222     [UNW_HPPA_GR + 10]  = 0x028,        [UNW_HPPA_GR + 11]      = 0x02c,
223     [UNW_HPPA_GR + 12]  = 0x030,        [UNW_HPPA_GR + 13]      = 0x034,
224     [UNW_HPPA_GR + 14]  = 0x038,        [UNW_HPPA_GR + 15]      = 0x03c,
225     [UNW_HPPA_GR + 16]  = 0x040,        [UNW_HPPA_GR + 17]      = 0x044,
226     [UNW_HPPA_GR + 18]  = 0x048,        [UNW_HPPA_GR + 19]      = 0x04c,
227     [UNW_HPPA_GR + 20]  = 0x050,        [UNW_HPPA_GR + 21]      = 0x054,
228     [UNW_HPPA_GR + 22]  = 0x058,        [UNW_HPPA_GR + 23]      = 0x05c,
229     [UNW_HPPA_GR + 24]  = 0x060,        [UNW_HPPA_GR + 25]      = 0x064,
230     [UNW_HPPA_GR + 26]  = 0x068,        [UNW_HPPA_GR + 27]      = 0x06c,
231     [UNW_HPPA_GR + 28]  = 0x070,        [UNW_HPPA_GR + 29]      = 0x074,
232     [UNW_HPPA_GR + 30]  = 0x078,        [UNW_HPPA_GR + 31]      = 0x07c,
233
234     [UNW_HPPA_FR +  0]  = 0x080,        [UNW_HPPA_FR +  1]      = 0x088,
235     [UNW_HPPA_FR +  2]  = 0x090,        [UNW_HPPA_FR +  3]      = 0x098,
236     [UNW_HPPA_FR +  4]  = 0x0a0,        [UNW_HPPA_FR +  5]      = 0x0a8,
237     [UNW_HPPA_FR +  6]  = 0x0b0,        [UNW_HPPA_FR +  7]      = 0x0b8,
238     [UNW_HPPA_FR +  8]  = 0x0c0,        [UNW_HPPA_FR +  9]      = 0x0c8,
239     [UNW_HPPA_FR + 10]  = 0x0d0,        [UNW_HPPA_FR + 11]      = 0x0d8,
240     [UNW_HPPA_FR + 12]  = 0x0e0,        [UNW_HPPA_FR + 13]      = 0x0e8,
241     [UNW_HPPA_FR + 14]  = 0x0f0,        [UNW_HPPA_FR + 15]      = 0x0f8,
242     [UNW_HPPA_FR + 16]  = 0x100,        [UNW_HPPA_FR + 17]      = 0x108,
243     [UNW_HPPA_FR + 18]  = 0x110,        [UNW_HPPA_FR + 19]      = 0x118,
244     [UNW_HPPA_FR + 20]  = 0x120,        [UNW_HPPA_FR + 21]      = 0x128,
245     [UNW_HPPA_FR + 22]  = 0x130,        [UNW_HPPA_FR + 23]      = 0x138,
246     [UNW_HPPA_FR + 24]  = 0x140,        [UNW_HPPA_FR + 25]      = 0x148,
247     [UNW_HPPA_FR + 26]  = 0x150,        [UNW_HPPA_FR + 27]      = 0x158,
248     [UNW_HPPA_FR + 28]  = 0x160,        [UNW_HPPA_FR + 29]      = 0x168,
249     [UNW_HPPA_FR + 30]  = 0x170,        [UNW_HPPA_FR + 31]      = 0x178,
250
251     [UNW_HPPA_IP]       = 0x1a8         /* IAOQ[0] */
252 #elif defined(UNW_TARGET_X86)
253 #if defined __FreeBSD__
254 #define UNW_R_OFF(R, r) \
255     [UNW_X86_##R]       = offsetof(gregset_t, r_##r),
256     UNW_R_OFF(EAX, eax)
257     UNW_R_OFF(EDX, edx)
258     UNW_R_OFF(ECX, ecx)
259     UNW_R_OFF(EBX, ebx)
260     UNW_R_OFF(ESI, esi)
261     UNW_R_OFF(EDI, edi)
262     UNW_R_OFF(EBP, ebp)
263     UNW_R_OFF(ESP, esp)
264     UNW_R_OFF(EIP, eip)
265 //  UNW_R_OFF(CS, cs)
266 //  UNW_R_OFF(EFLAGS, eflags)
267 //  UNW_R_OFF(SS, ss)
268 #elif defined __linux__
269     [UNW_X86_EAX]       = 0x18,
270     [UNW_X86_EBX]       = 0x00,
271     [UNW_X86_ECX]       = 0x04,
272     [UNW_X86_EDX]       = 0x08,
273     [UNW_X86_ESI]       = 0x0c,
274     [UNW_X86_EDI]       = 0x10,
275     [UNW_X86_EBP]       = 0x14,
276     [UNW_X86_EIP]       = 0x30,
277     [UNW_X86_ESP]       = 0x3c
278 /*  CS                  = 0x34, */
279 /*  DS                  = 0x1c, */
280 /*  ES                  = 0x20, */
281 /*  FS                  = 0x24, */
282 /*  GS                  = 0x28, */
283 /*  ORIG_EAX            = 0x2c, */
284 /*  EFLAGS              = 0x38, */
285 /*  SS                  = 0x40 */
286 #else
287 #error Port me
288 #endif
289 #elif defined(UNW_TARGET_X86_64)
290 #if defined __FreeBSD__
291 #define UNW_R_OFF(R, r) \
292     [UNW_X86_64_##R]    = offsetof(gregset_t, r_##r),
293     UNW_R_OFF(RAX, rax)
294     UNW_R_OFF(RDX, rdx)
295     UNW_R_OFF(RCX, rcx)
296     UNW_R_OFF(RBX, rbx)
297     UNW_R_OFF(RSI, rsi)
298     UNW_R_OFF(RDI, rdi)
299     UNW_R_OFF(RBP, rbp)
300     UNW_R_OFF(RSP, rsp)
301     UNW_R_OFF(R8, r8)
302     UNW_R_OFF(R9, r9)
303     UNW_R_OFF(R10, r10)
304     UNW_R_OFF(R11, r11)
305     UNW_R_OFF(R12, r12)
306     UNW_R_OFF(R13, r13)
307     UNW_R_OFF(R14, r14)
308     UNW_R_OFF(R15, r15)
309     UNW_R_OFF(RIP, rip)
310 //  UNW_R_OFF(CS, cs)
311 //  UNW_R_OFF(EFLAGS, rflags)
312 //  UNW_R_OFF(SS, ss)
313 #undef UNW_R_OFF
314 #elif defined __linux__
315     [UNW_X86_64_RAX]    = 0x50,
316     [UNW_X86_64_RDX]    = 0x60,
317     [UNW_X86_64_RCX]    = 0x58,
318     [UNW_X86_64_RBX]    = 0x28,
319     [UNW_X86_64_RSI]    = 0x68,
320     [UNW_X86_64_RDI]    = 0x70,
321     [UNW_X86_64_RBP]    = 0x20,
322     [UNW_X86_64_RSP]    = 0x98,
323     [UNW_X86_64_R8]     = 0x48,
324     [UNW_X86_64_R9]     = 0x40,
325     [UNW_X86_64_R10]    = 0x38,
326     [UNW_X86_64_R11]    = 0x30,
327     [UNW_X86_64_R12]    = 0x18,
328     [UNW_X86_64_R13]    = 0x10,
329     [UNW_X86_64_R14]    = 0x08,
330     [UNW_X86_64_R15]    = 0x00,
331     [UNW_X86_64_RIP]    = 0x80
332 //  [UNW_X86_64_CS]     = 0x88,
333 //  [UNW_X86_64_EFLAGS] = 0x90,
334 //  [UNW_X86_64_RSP]    = 0x98,
335 //  [UNW_X86_64_SS]     = 0xa0
336 #else
337 #error Port me
338 #endif
339 #elif defined(UNW_TARGET_PPC32) || defined(UNW_TARGET_PPC64)
340
341 #define UNW_REG_SLOT_SIZE sizeof(unsigned long)
342 #define UNW_PPC_R(v) ((v) * UNW_REG_SLOT_SIZE)
343 #define UNW_PPC_PT(p) UNW_PPC_R(PT_##p)
344
345 #define UNW_FP_OFF(b, i)    \
346     [UNW_PPC##b##_F##i] = UNW_PPC_R(PT_FPR0 + i * 8/UNW_REG_SLOT_SIZE)
347
348 #define UNW_R_OFF(b, i) \
349     [UNW_PPC##b##_R##i] = UNW_PPC_R(PT_R##i)
350
351 #define UNW_PPC_REGS(b) \
352     UNW_R_OFF(b, 0),    \
353     UNW_R_OFF(b, 1),    \
354     UNW_R_OFF(b, 2),    \
355     UNW_R_OFF(b, 3),    \
356     UNW_R_OFF(b, 4),    \
357     UNW_R_OFF(b, 5),    \
358     UNW_R_OFF(b, 6),    \
359     UNW_R_OFF(b, 7),    \
360     UNW_R_OFF(b, 8),    \
361     UNW_R_OFF(b, 9),    \
362     UNW_R_OFF(b, 10),   \
363     UNW_R_OFF(b, 11),   \
364     UNW_R_OFF(b, 12),   \
365     UNW_R_OFF(b, 13),   \
366     UNW_R_OFF(b, 14),   \
367     UNW_R_OFF(b, 15),   \
368     UNW_R_OFF(b, 16),   \
369     UNW_R_OFF(b, 17),   \
370     UNW_R_OFF(b, 18),   \
371     UNW_R_OFF(b, 19),   \
372     UNW_R_OFF(b, 20),   \
373     UNW_R_OFF(b, 21),   \
374     UNW_R_OFF(b, 22),   \
375     UNW_R_OFF(b, 23),   \
376     UNW_R_OFF(b, 24),   \
377     UNW_R_OFF(b, 25),   \
378     UNW_R_OFF(b, 26),   \
379     UNW_R_OFF(b, 27),   \
380     UNW_R_OFF(b, 28),   \
381     UNW_R_OFF(b, 29),   \
382     UNW_R_OFF(b, 30),   \
383     UNW_R_OFF(b, 31),   \
384                                \
385     [UNW_PPC##b##_CTR] = UNW_PPC_PT(CTR), \
386     [UNW_PPC##b##_XER] = UNW_PPC_PT(XER), \
387     [UNW_PPC##b##_LR]  = UNW_PPC_PT(LNK), \
388                                \
389     UNW_FP_OFF(b, 0), \
390     UNW_FP_OFF(b, 1), \
391     UNW_FP_OFF(b, 2), \
392     UNW_FP_OFF(b, 3), \
393     UNW_FP_OFF(b, 4), \
394     UNW_FP_OFF(b, 5), \
395     UNW_FP_OFF(b, 6), \
396     UNW_FP_OFF(b, 7), \
397     UNW_FP_OFF(b, 8), \
398     UNW_FP_OFF(b, 9), \
399     UNW_FP_OFF(b, 10), \
400     UNW_FP_OFF(b, 11), \
401     UNW_FP_OFF(b, 12), \
402     UNW_FP_OFF(b, 13), \
403     UNW_FP_OFF(b, 14), \
404     UNW_FP_OFF(b, 15), \
405     UNW_FP_OFF(b, 16), \
406     UNW_FP_OFF(b, 17), \
407     UNW_FP_OFF(b, 18), \
408     UNW_FP_OFF(b, 19), \
409     UNW_FP_OFF(b, 20), \
410     UNW_FP_OFF(b, 21), \
411     UNW_FP_OFF(b, 22), \
412     UNW_FP_OFF(b, 23), \
413     UNW_FP_OFF(b, 24), \
414     UNW_FP_OFF(b, 25), \
415     UNW_FP_OFF(b, 26), \
416     UNW_FP_OFF(b, 27), \
417     UNW_FP_OFF(b, 28), \
418     UNW_FP_OFF(b, 29), \
419     UNW_FP_OFF(b, 30), \
420     UNW_FP_OFF(b, 31)
421
422 #define UNW_PPC32_REGS \
423     [UNW_PPC32_FPSCR] = UNW_PPC_PT(FPSCR), \
424     [UNW_PPC32_CCR] = UNW_PPC_PT(CCR)
425
426 #define UNW_VR_OFF(i)   \
427     [UNW_PPC64_V##i] = UNW_PPC_R(PT_VR0 + i * 2)
428
429 #define UNW_PPC64_REGS \
430     [UNW_PPC64_NIP] = UNW_PPC_PT(NIP), \
431     [UNW_PPC64_FRAME_POINTER] = -1, \
432     [UNW_PPC64_ARG_POINTER] = -1,   \
433     [UNW_PPC64_CR0] = -1,           \
434     [UNW_PPC64_CR1] = -1,           \
435     [UNW_PPC64_CR2] = -1,           \
436     [UNW_PPC64_CR3] = -1,           \
437     [UNW_PPC64_CR4] = -1,           \
438     [UNW_PPC64_CR5] = -1,           \
439     [UNW_PPC64_CR6] = -1,           \
440     [UNW_PPC64_CR7] = -1,           \
441     [UNW_PPC64_VRSAVE] = UNW_PPC_PT(VRSAVE), \
442     [UNW_PPC64_VSCR] = UNW_PPC_PT(VSCR),     \
443     [UNW_PPC64_SPE_ACC] = -1,       \
444     [UNW_PPC64_SPEFSCR] = -1,       \
445     UNW_VR_OFF(0), \
446     UNW_VR_OFF(1), \
447     UNW_VR_OFF(2), \
448     UNW_VR_OFF(3), \
449     UNW_VR_OFF(4), \
450     UNW_VR_OFF(5), \
451     UNW_VR_OFF(6), \
452     UNW_VR_OFF(7), \
453     UNW_VR_OFF(8), \
454     UNW_VR_OFF(9), \
455     UNW_VR_OFF(10), \
456     UNW_VR_OFF(11), \
457     UNW_VR_OFF(12), \
458     UNW_VR_OFF(13), \
459     UNW_VR_OFF(14), \
460     UNW_VR_OFF(15), \
461     UNW_VR_OFF(16), \
462     UNW_VR_OFF(17), \
463     UNW_VR_OFF(18), \
464     UNW_VR_OFF(19), \
465     UNW_VR_OFF(20), \
466     UNW_VR_OFF(21), \
467     UNW_VR_OFF(22), \
468     UNW_VR_OFF(23), \
469     UNW_VR_OFF(24), \
470     UNW_VR_OFF(25), \
471     UNW_VR_OFF(26), \
472     UNW_VR_OFF(27), \
473     UNW_VR_OFF(28), \
474     UNW_VR_OFF(29), \
475     UNW_VR_OFF(30), \
476     UNW_VR_OFF(31)
477
478 #if defined(UNW_TARGET_PPC32)
479     UNW_PPC_REGS(32),
480     UNW_PPC32_REGS,
481 #else
482     UNW_PPC_REGS(64),
483     UNW_PPC64_REGS,
484 #endif
485
486 #elif defined(UNW_TARGET_ARM)
487     [UNW_ARM_R0]       = 0x00,
488     [UNW_ARM_R1]       = 0x04,
489     [UNW_ARM_R2]       = 0x08,
490     [UNW_ARM_R3]       = 0x0c,
491     [UNW_ARM_R4]       = 0x10,
492     [UNW_ARM_R5]       = 0x14,
493     [UNW_ARM_R6]       = 0x18,
494     [UNW_ARM_R7]       = 0x1c,
495     [UNW_ARM_R8]       = 0x20,
496     [UNW_ARM_R9]       = 0x24,
497     [UNW_ARM_R10]      = 0x28,
498     [UNW_ARM_R11]      = 0x2c,
499     [UNW_ARM_R12]      = 0x30,
500     [UNW_ARM_R13]      = 0x34,
501     [UNW_ARM_R14]      = 0x38,
502     [UNW_ARM_R15]      = 0x3c,
503 #elif defined(UNW_TARGET_MIPS)
504 #elif defined(UNW_TARGET_SH)
505 #elif defined(UNW_TARGET_AARCH64)
506     [UNW_AARCH64_X0]       = 0x00,
507     [UNW_AARCH64_X1]       = 0x08,
508     [UNW_AARCH64_X2]       = 0x10,
509     [UNW_AARCH64_X3]       = 0x18,
510     [UNW_AARCH64_X4]       = 0x20,
511     [UNW_AARCH64_X5]       = 0x28,
512     [UNW_AARCH64_X6]       = 0x30,
513     [UNW_AARCH64_X7]       = 0x38,
514     [UNW_AARCH64_X8]       = 0x40,
515     [UNW_AARCH64_X9]       = 0x48,
516     [UNW_AARCH64_X10]      = 0x50,
517     [UNW_AARCH64_X11]      = 0x58,
518     [UNW_AARCH64_X12]      = 0x60,
519     [UNW_AARCH64_X13]      = 0x68,
520     [UNW_AARCH64_X14]      = 0x70,
521     [UNW_AARCH64_X15]      = 0x78,
522     [UNW_AARCH64_X16]      = 0x80,
523     [UNW_AARCH64_X17]      = 0x88,
524     [UNW_AARCH64_X18]      = 0x90,
525     [UNW_AARCH64_X19]      = 0x98,
526     [UNW_AARCH64_X20]      = 0xa0,
527     [UNW_AARCH64_X21]      = 0xa8,
528     [UNW_AARCH64_X22]      = 0xb0,
529     [UNW_AARCH64_X23]      = 0xb8,
530     [UNW_AARCH64_X24]      = 0xc0,
531     [UNW_AARCH64_X25]      = 0xc8,
532     [UNW_AARCH64_X26]      = 0xd0,
533     [UNW_AARCH64_X27]      = 0xd8,
534     [UNW_AARCH64_X28]      = 0xe0,
535     [UNW_AARCH64_X29]      = 0xe8,
536     [UNW_AARCH64_X30]      = 0xf0,
537     [UNW_AARCH64_SP]       = 0xf8,
538     [UNW_AARCH64_PC]       = 0x100,
539     [UNW_AARCH64_PSTATE]   = 0x108
540 #elif defined(UNW_TARGET_TILEGX)
541     [UNW_TILEGX_R0]    = 0x00,
542     [UNW_TILEGX_R1]    = 0x08,
543     [UNW_TILEGX_R2]    = 0x10,
544     [UNW_TILEGX_R3]    = 0x08,
545     [UNW_TILEGX_R4]    = 0x20,
546     [UNW_TILEGX_R5]    = 0x28,
547     [UNW_TILEGX_R6]    = 0x30,
548     [UNW_TILEGX_R7]    = 0x38,
549     [UNW_TILEGX_R8]    = 0x40,
550     [UNW_TILEGX_R9]    = 0x48,
551     [UNW_TILEGX_R10]    = 0x50,
552     [UNW_TILEGX_R11]    = 0x58,
553     [UNW_TILEGX_R12]    = 0x60,
554     [UNW_TILEGX_R13]    = 0x68,
555     [UNW_TILEGX_R14]    = 0x70,
556     [UNW_TILEGX_R15]    = 0x78,
557     [UNW_TILEGX_R16]    = 0x80,
558     [UNW_TILEGX_R17]    = 0x88,
559     [UNW_TILEGX_R18]    = 0x90,
560     [UNW_TILEGX_R19]    = 0x98,
561     [UNW_TILEGX_R20]    = 0xa0,
562     [UNW_TILEGX_R21]    = 0xa8,
563     [UNW_TILEGX_R22]    = 0xb0,
564     [UNW_TILEGX_R23]    = 0xb8,
565     [UNW_TILEGX_R24]    = 0xc0,
566     [UNW_TILEGX_R25]    = 0xc8,
567     [UNW_TILEGX_R26]    = 0xd0,
568     [UNW_TILEGX_R27]    = 0xd8,
569     [UNW_TILEGX_R28]    = 0xe0,
570     [UNW_TILEGX_R29]    = 0xe8,
571     [UNW_TILEGX_R30]    = 0xf0,
572     [UNW_TILEGX_R31]    = 0xf8,
573     [UNW_TILEGX_R32]    = 0x100,
574     [UNW_TILEGX_R33]    = 0x108,
575     [UNW_TILEGX_R34]    = 0x110,
576     [UNW_TILEGX_R35]    = 0x118,
577     [UNW_TILEGX_R36]    = 0x120,
578     [UNW_TILEGX_R37]    = 0x128,
579     [UNW_TILEGX_R38]    = 0x130,
580     [UNW_TILEGX_R39]    = 0x138,
581     [UNW_TILEGX_R40]    = 0x140,
582     [UNW_TILEGX_R41]    = 0x148,
583     [UNW_TILEGX_R42]    = 0x150,
584     [UNW_TILEGX_R43]    = 0x158,
585     [UNW_TILEGX_R44]    = 0x160,
586     [UNW_TILEGX_R45]    = 0x168,
587     [UNW_TILEGX_R46]    = 0x170,
588     [UNW_TILEGX_R47]    = 0x178,
589     [UNW_TILEGX_R48]    = 0x180,
590     [UNW_TILEGX_R49]    = 0x188,
591     [UNW_TILEGX_R50]    = 0x190,
592     [UNW_TILEGX_R51]    = 0x198,
593     [UNW_TILEGX_R52]    = 0x1a0,
594     [UNW_TILEGX_R53]    = 0x1a8,
595     [UNW_TILEGX_R54]    = 0x1b0,
596     [UNW_TILEGX_R55]    = 0x1b8,
597     [UNW_TILEGX_PC]     = 0x1a0
598 #else
599 # error Fix me.
600 #endif
601   };