Merge branch '2022-08-04-Kconfig-migrations'

- Further migrations to Kconfig and associated dead code removal.

diff --cc scripts/config_whitelist.txt
index fc07c5d,fc07c5d..4f628e0
--- 1/scripts/config_whitelist.txt
--- 2/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@@ -32,7 -32,7 +32,6 @@@ CONFIG_FEC_ENET_DE
  CONFIG_FEC_FIXED_SPEED
  CONFIG_FEC_MXC_PHYADDR
  CONFIG_FLASH_BR_PRELIM
--CONFIG_FLASH_CFI_LEGACY
  CONFIG_FLASH_OR_PRELIM
  CONFIG_FLASH_SECTOR_SIZE
  CONFIG_FLASH_SHOW_PROGRESS
@@@ -40,16 -40,16 +39,13 @@@ CONFIG_FLASH_SPANSION_S29WS_
  CONFIG_FLASH_VERIFY
  CONFIG_FM_PLAT_CLK_DIV
  CONFIG_FSL_CADMUS
--CONFIG_FSL_CORENET
  CONFIG_FSL_CPLD
  CONFIG_FSL_DEVICE_DISABLE
--CONFIG_FSL_DSPI1
  CONFIG_FSL_ESDHC_PIN_MUX
  CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
  CONFIG_FSL_IIM
  CONFIG_FSL_ISBC_KEY_EXT
  CONFIG_FSL_LBC
--CONFIG_FSL_MEMAC
  CONFIG_FSL_NGPIXIS
  CONFIG_FSL_PMIC_BITLEN
  CONFIG_FSL_PMIC_BUS
@@@ -487,7 -487,7 +483,6 @@@ CONFIG_SYS_BMAN_SP_CENA_SIZ
  CONFIG_SYS_BMAN_SP_CINH_SIZE
  CONFIG_SYS_BMAN_SWP_ISDR_REG
  CONFIG_SYS_BOOTMAPSZ
--CONFIG_SYS_BOOT_BLOCK
  CONFIG_SYS_CACHE_ACR0
  CONFIG_SYS_CACHE_ACR1
  CONFIG_SYS_CACHE_ACR2
@@@ -499,8 -499,8 +494,6 @@@ CONFIG_SYS_CCSRBAR_PHYS_HIG
  CONFIG_SYS_CCSRBAR_PHYS_LOW
  CONFIG_SYS_CLK
  CONFIG_SYS_CLKTL_CBCDR
--CONFIG_SYS_CORE_SRAM
--CONFIG_SYS_CORE_SRAM_SIZE
  CONFIG_SYS_CPLD_AMASK
  CONFIG_SYS_CPLD_BASE
  CONFIG_SYS_CPLD_BASE_PHYS
@@@ -511,7 -511,7 +504,6 @@@ CONFIG_SYS_CPLD_FTIM
  CONFIG_SYS_CPLD_FTIM1
  CONFIG_SYS_CPLD_FTIM2
  CONFIG_SYS_CPLD_FTIM3
--CONFIG_SYS_CPLD_SIZE
  CONFIG_SYS_CPU_CLK
  CONFIG_SYS_CS0_BASE
  CONFIG_SYS_CS0_CTRL
@@@ -602,7 -602,7 +594,6 @@@ CONFIG_SYS_DDR_CLKSE
  CONFIG_SYS_DDR_CLK_CNTL
  CONFIG_SYS_DDR_CLK_CONTROL
  CONFIG_SYS_DDR_CLK_CTRL
--CONFIG_SYS_DDR_CLK_CTRL_667
  CONFIG_SYS_DDR_CLK_CTRL_800
  CONFIG_SYS_DDR_CONFIG
  CONFIG_SYS_DDR_CONFIG_2
@@@ -618,15 -618,15 +609,12 @@@ CONFIG_SYS_DDR_CS1_CONFIG_
  CONFIG_SYS_DDR_INIT_ADDR
  CONFIG_SYS_DDR_INIT_EXT_ADDR
  CONFIG_SYS_DDR_INTERVAL
--CONFIG_SYS_DDR_INTERVAL_667
  CONFIG_SYS_DDR_INTERVAL_800
  CONFIG_SYS_DDR_MODE
  CONFIG_SYS_DDR_MODE2
  CONFIG_SYS_DDR_MODE_1
--CONFIG_SYS_DDR_MODE_1_667
  CONFIG_SYS_DDR_MODE_1_800
  CONFIG_SYS_DDR_MODE_2
--CONFIG_SYS_DDR_MODE_2_667
  CONFIG_SYS_DDR_MODE_2_800
  CONFIG_SYS_DDR_MODE_CONTROL
  CONFIG_SYS_DDR_RCW_1
@@@ -635,53 -635,53 +623,34 @@@ CONFIG_SYS_DDR_SDRAM_BAS
  CONFIG_SYS_DDR_SDRAM_CFG
  CONFIG_SYS_DDR_SDRAM_CFG2
  CONFIG_SYS_DDR_SDRAM_CLK_CNTL
--CONFIG_SYS_DDR_SIZE
  CONFIG_SYS_DDR_SR_CNTR
  CONFIG_SYS_DDR_TIMING_0
--CONFIG_SYS_DDR_TIMING_0_667
  CONFIG_SYS_DDR_TIMING_0_800
  CONFIG_SYS_DDR_TIMING_1
--CONFIG_SYS_DDR_TIMING_1_667
  CONFIG_SYS_DDR_TIMING_1_800
  CONFIG_SYS_DDR_TIMING_2
--CONFIG_SYS_DDR_TIMING_2_667
  CONFIG_SYS_DDR_TIMING_2_800
  CONFIG_SYS_DDR_TIMING_3
--CONFIG_SYS_DDR_TIMING_3_667
  CONFIG_SYS_DDR_TIMING_3_800
  CONFIG_SYS_DDR_TIMING_4
  CONFIG_SYS_DDR_TIMING_5
  CONFIG_SYS_DDR_WRLVL_CONTROL
--CONFIG_SYS_DDR_WRLVL_CONTROL_667
--CONFIG_SYS_DDR_WRLVL_CONTROL_800
  CONFIG_SYS_DDR_ZQ_CONTROL
--CONFIG_SYS_DEBUG
--CONFIG_SYS_DEBUG_SERVER_FW_ADDR
--CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
  CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
--CONFIG_SYS_DIRECT_FLASH_TFTP
  CONFIG_SYS_DPAA_DCE
  CONFIG_SYS_DPAA_FMAN
  CONFIG_SYS_DPAA_PME
  CONFIG_SYS_DPAA_RMAN
--CONFIG_SYS_DRAM_SIZE
  CONFIG_SYS_DRAM_TEST
--CONFIG_SYS_DSPI_CTAR0
--CONFIG_SYS_DSPI_CTAR1
--CONFIG_SYS_DSPI_CTAR2
--CONFIG_SYS_DSPI_CTAR3
  CONFIG_SYS_DV_NOR_BOOT_CFG
  CONFIG_SYS_EEPROM_BUS_NUM
--CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
  CONFIG_SYS_EEPROM_WREN
--CONFIG_SYS_ENET_BD_BASE
  CONFIG_SYS_ENV_SECT_SIZE
  CONFIG_SYS_ETHOC_BASE
  CONFIG_SYS_ETHOC_BUFFER_ADDR
  CONFIG_SYS_EXCEPTION_VECTORS_HIGH
  CONFIG_SYS_FAST_CLK
  CONFIG_SYS_FDT_PAD
--CONFIG_SYS_FECI2C
  CONFIG_SYS_FEC_BUF_USE_SRAM
  CONFIG_SYS_FLASH0
  CONFIG_SYS_FLASH1
@@@ -690,24 -690,24 +659,10 @@@ CONFIG_SYS_FLASH1_BASE_PHYS_EARL
  CONFIG_SYS_FLASH_BANKS_LIST
  CONFIG_SYS_FLASH_BANKS_SIZES
  CONFIG_SYS_FLASH_BASE
--CONFIG_SYS_FLASH_BASE0
--CONFIG_SYS_FLASH_BASE1
  CONFIG_SYS_FLASH_BASE_PHYS
  CONFIG_SYS_FLASH_BASE_PHYS_EARLY
--CONFIG_SYS_FLASH_BR_PRELIM
--CONFIG_SYS_FLASH_CFI_NONBLOCK
--CONFIG_SYS_FLASH_CHECKSUM
--CONFIG_SYS_FLASH_EMPTY_INFO
--CONFIG_SYS_FLASH_ERASE_TOUT
--CONFIG_SYS_FLASH_LOCK_TOUT
--CONFIG_SYS_FLASH_OR_PRELIM
  CONFIG_SYS_FLASH_PARMSECT_SZ
--CONFIG_SYS_FLASH_QUIET_TEST
--CONFIG_SYS_FLASH_SECT_SIZE
--CONFIG_SYS_FLASH_SECT_SZ
  CONFIG_SYS_FLASH_SIZE
--CONFIG_SYS_FLASH_UNLOCK_TOUT
--CONFIG_SYS_FLASH_WRITE_TOUT
  CONFIG_SYS_FM1_10GEC1_PHY_ADDR
  CONFIG_SYS_FM1_CLK
  CONFIG_SYS_FM1_DTSEC1_PHY_ADDR
@@@ -727,9 -727,9 +682,7 @@@ CONFIG_SYS_FM2_DTSEC1_PHY_ADD
  CONFIG_SYS_FM2_DTSEC2_PHY_ADDR
  CONFIG_SYS_FM2_DTSEC3_PHY_ADDR
  CONFIG_SYS_FM2_DTSEC4_PHY_ADDR
--CONFIG_SYS_FMAN_V3
  CONFIG_SYS_FM_MURAM_SIZE
--CONFIG_SYS_FPGAREG_DATE
  CONFIG_SYS_FPGAREG_DIPSW
  CONFIG_SYS_FPGAREG_FREQ
  CONFIG_SYS_FPGAREG_RESET
@@@ -747,10 -747,10 +700,6 @@@ CONFIG_SYS_FPGA_SIZ
  CONFIG_SYS_FPGA_WAIT
  CONFIG_SYS_FSL_BMAN_ADDR
  CONFIG_SYS_FSL_BMAN_OFFSET
--CONFIG_SYS_FSL_CCSR_GUR_BE
--CONFIG_SYS_FSL_CCSR_GUR_LE
--CONFIG_SYS_FSL_CCSR_SCFG_BE
--CONFIG_SYS_FSL_CCSR_SCFG_LE
  CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR
  CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR
  CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR
@@@ -781,7 -781,7 +730,6 @@@ CONFIG_SYS_FSL_CORENET_SERDES4_OFFSE
  CONFIG_SYS_FSL_CORENET_SERDES_ADDR
  CONFIG_SYS_FSL_CORENET_SERDES_OFFSET
  CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
--CONFIG_SYS_FSL_CORES_PER_CLUSTER
  CONFIG_SYS_FSL_CPC_ADDR
  CONFIG_SYS_FSL_CPC_OFFSET
  CONFIG_SYS_FSL_CSU_ADDR
@@@ -791,7 -791,7 +739,6 @@@ CONFIG_SYS_FSL_DCSR_DDR_ADD
  CONFIG_SYS_FSL_DDR2_ADDR
  CONFIG_SYS_FSL_DDR3_ADDR
  CONFIG_SYS_FSL_DDR_ADDR
--CONFIG_SYS_FSL_DDR_INTLV_256B
  CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
  CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
  CONFIG_SYS_FSL_DSPI_BE
@@@ -803,10 -803,10 +750,8 @@@ CONFIG_SYS_FSL_DSP_M2_RAM_ADD
  CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
  CONFIG_SYS_FSL_ERRATUM_A008751
  CONFIG_SYS_FSL_ESDHC_ADDR
--CONFIG_SYS_FSL_ESDHC_BE
  CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
  CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
--CONFIG_SYS_FSL_ESDHC_LE
  CONFIG_SYS_FSL_ESDHC_NUM
  CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
  CONFIG_SYS_FSL_FM
@@@ -833,8 -833,8 +778,6 @@@ CONFIG_SYS_FSL_FM2_RX3_1G_OFFSE
  CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET
  CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET
  CONFIG_SYS_FSL_GUTS_ADDR
--CONFIG_SYS_FSL_IFC_BE
--CONFIG_SYS_FSL_IFC_LE
  CONFIG_SYS_FSL_ISBC_VER
  CONFIG_SYS_FSL_JR0_ADDR
  CONFIG_SYS_FSL_JR0_OFFSET
@@@ -848,8 -848,8 +791,6 @@@ CONFIG_SYS_FSL_OCRAM_SIZ
  CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
  CONFIG_SYS_FSL_PAMU_OFFSET
  CONFIG_SYS_FSL_PCIE_COMPAT
--CONFIG_SYS_FSL_PEX_LUT_BE
--CONFIG_SYS_FSL_PEX_LUT_LE
  CONFIG_SYS_FSL_PMIC_I2C_ADDR
  CONFIG_SYS_FSL_PMU_ADDR
  CONFIG_SYS_FSL_PMU_CLTBENR
@@@ -1003,7 -1003,7 +944,6 @@@ CONFIG_SYS_MAM
  CONFIG_SYS_MASTER_CLOCK
  CONFIG_SYS_MATRIX_EBI0CSA_VAL
  CONFIG_SYS_MATRIX_EBICSA_VAL
--CONFIG_SYS_MAX_FLASH_SECT
  CONFIG_SYS_MAX_I2C_BUS
  CONFIG_SYS_MAX_NAND_CHIPS
  CONFIG_SYS_MAX_NAND_DEVICE
@@@ -1015,11 -1015,11 +955,8 @@@ CONFIG_SYS_MCKR1_VA
  CONFIG_SYS_MCKR2_VAL
  CONFIG_SYS_MCKR_CSS
  CONFIG_SYS_MDIO1_OFFSET
--CONFIG_SYS_MEMAC_LITTLE_ENDIAN
  CONFIG_SYS_MEMORY_BASE
--CONFIG_SYS_MEMORY_SIZE
  CONFIG_SYS_MEM_RESERVE_SECURE
--CONFIG_SYS_MEM_SIZE
  CONFIG_SYS_MFD
  CONFIG_SYS_MHZ
  CONFIG_SYS_MIPS_TIMER_FREQ
@@@ -1183,7 -1183,7 +1120,6 @@@ CONFIG_SYS_OBI
  CONFIG_SYS_OMAP_ABE_SYSCK
  CONFIG_SYS_ONENAND_BASE
  CONFIG_SYS_ONENAND_BLOCK_SIZE
--CONFIG_SYS_OR_TIMING_MRAM
  CONFIG_SYS_OSCIN_FREQ
  CONFIG_SYS_OSPR_OFFSET
  CONFIG_SYS_PACNT