riscv: dts: jh7110: Add clkgen for use sbi

Change-Id: Ic9a03831c89f65b05a5b339859fad466f0efe36c
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>

diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index 9efe3d6..e16283a 100644 (file)
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -497,7 +497,7 @@
                };
 
                syscrg: clock-controller@13020000 {
-                       compatible = "starfive,jh7110-syscrg";
+                       compatible = "starfive,jh7110-syscrg", "starfive,jh7110-clkgen";
                        reg = <0x0 0x13020000 0x0 0x10000>;
                        clocks = <&osc>, <&gmac1_rmii_refin>,
                                 <&gmac1_rgmii_rxin>,