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riscv: dts: jh7110: Add pmu for JH7110 SoC
author
Hoegeun Kwon
<hoegeun.kwon@samsung.com>
Wed, 1 Nov 2023 10:34:29 +0000
(19:34 +0900)
committer
Hoegeun Kwon
<hoegeun.kwon@samsung.com>
Fri, 3 Nov 2023 05:01:31 +0000
(14:01 +0900)
Change-Id: I171649219a90f75ad98d88ffe382f7ffd00d1bd7
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
arch/riscv/dts/jh7110.dtsi
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diff --git
a/arch/riscv/dts/jh7110.dtsi
b/arch/riscv/dts/jh7110.dtsi
index
ec237a4
..
9efe3d6
100644
(file)
--- a/
arch/riscv/dts/jh7110.dtsi
+++ b/
arch/riscv/dts/jh7110.dtsi
@@
-293,6
+293,13
@@
cache-unified;
};
+ pmu: pmu@17030000 {
+ compatible = "starfive,jh7110-pmu";
+ reg = <0x0 0x17030000 0x0 0x10000>;
+ interrupts = <111>;
+ status = "okay";
+ };
+
uart0: serial@10000000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x10000000 0x0 0x10000>;