T104xRDB: Remove non-TARGET_T1042D4RDB variants

At this point only the TARGET_T1042D4RDB variant of this is supported in
tree, so remove the remaining parts of the other platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 03373bf..3275d4f 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -200,14 +200,6 @@ config TARGET_T1024RDB
        imply CMD_EEPROM
        imply PANIC_HANG
 
-config TARGET_T1042RDB
-       bool "Support T1042RDB"
-       select ARCH_T1042
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select PHYS_64BIT
-       select SYS_L3_SIZE_256KB
-
 config TARGET_T1042D4RDB
        bool "Support T1042D4RDB"
        select ARCH_T1042
@@ -217,15 +209,6 @@ config TARGET_T1042D4RDB
        select SYS_L3_SIZE_256KB
        imply PANIC_HANG
 
-config TARGET_T1042RDB_PI
-       bool "Support T1042RDB_PI"
-       select ARCH_T1042
-       select BOARD_LATE_INIT if CHAIN_OF_TRUST
-       select SUPPORT_SPL
-       select PHYS_64BIT
-       select SYS_L3_SIZE_256KB
-       imply PANIC_HANG
-
 config TARGET_T2080QDS
        bool "Support T2080QDS"
        select ARCH_T2080

diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index 09f37ec..236098e 100644 (file)
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -17,9 +17,7 @@
 
 #if defined(CONFIG_TARGET_T2080QDS) || \
        defined(CONFIG_TARGET_T2080RDB) || \
-       defined(CONFIG_TARGET_T1042RDB) || \
        defined(CONFIG_TARGET_T1042D4RDB) || \
-       defined(CONFIG_TARGET_T1042RDB_PI) || \
        defined(CONFIG_ARCH_T1024)
 #undef CFG_SYS_INIT_L3_ADDR
 #define CFG_SYS_INIT_L3_ADDR                   0xbff00000

diff --git a/board/freescale/t104xrdb/Kconfig b/board/freescale/t104xrdb/Kconfig
index e33d317..e481491 100644 (file)
--- a/board/freescale/t104xrdb/Kconfig
+++ b/board/freescale/t104xrdb/Kconfig
@@ -1,6 +1,4 @@
-if TARGET_T1040RDB || TARGET_T1040D4RDB || \
-       TARGET_T1042RDB || TARGET_T1042D4RDB || \
-       TARGET_T1042RDB_PI
+if TARGET_T1042D4RDB
 
 config SYS_BOARD
        default "t104xrdb"

diff --git a/board/freescale/t104xrdb/cpld.h b/board/freescale/t104xrdb/cpld.h
index 769883f..0384202 100644 (file)
--- a/board/freescale/t104xrdb/cpld.h
+++ b/board/freescale/t104xrdb/cpld.h
@@ -20,7 +20,7 @@ struct cpld_data {
        u8 int_status;          /* 0x12 - Interrupt status Register */
        u8 flash_ctl_status;    /* 0x13 - Flash control and status register */
        u8 fan_ctl_status;      /* 0x14 - Fan control and status register  */
-#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
+#if defined(CONFIG_TARGET_T1042D4RDB)
        u8 int_mask;            /* 0x15 - Interrupt mask Register */
 #else
        u8 led_ctl_status;      /* 0x15 - LED control and status register */

diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
index c011aa9..3906c83 100644 (file)
--- a/board/freescale/t104xrdb/eth.c
+++ b/board/freescale/t104xrdb/eth.c
@@ -39,25 +39,6 @@ int board_eth_init(struct bd_info *bis)
                int idx = i - FM1_DTSEC1;
 
                switch (fm_info_get_enet_if(i)) {
-#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB)
-               case PHY_INTERFACE_MODE_SGMII:
-                       /* T1040RDB & T1040D4RDB only supports SGMII on
-                        * DTSEC3
-                        */
-                       fm_info_set_phy_address(FM1_DTSEC3,
-                                               CFG_SYS_SGMII1_PHY_ADDR);
-                       break;
-#endif
-#ifdef CONFIG_TARGET_T1042RDB
-               case PHY_INTERFACE_MODE_SGMII:
-                       /* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */
-                       if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i))
-                               fm_info_set_phy_address(i, 0);
-                       /* T1042RDB only supports SGMII on DTSEC3 */
-                       fm_info_set_phy_address(FM1_DTSEC3,
-                                               CFG_SYS_SGMII1_PHY_ADDR);
-                       break;
-#endif
 #ifdef CONFIG_TARGET_T1042D4RDB
                case PHY_INTERFACE_MODE_SGMII:
                        /* T1042D4RDB supports SGMII on DTSEC1, DTSEC2

diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index 45ebdd3..8cec712 100644 (file)
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -34,7 +34,7 @@ int checkboard(void)
        struct cpu_type *cpu = gd->arch.cpu;
        u8 sw;
 
-#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
+#if defined(CONFIG_TARGET_T1042D4RDB)
        printf("Board: %sD4RDB\n", cpu->name);
 #else
        printf("Board: %sRDB\n", cpu->name);
@@ -110,23 +110,6 @@ int misc_init_r(void)
                CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
                                         MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL);
 
-#if defined(CONFIG_TARGET_T1040D4RDB)
-       if (hwconfig("qe-tdm")) {
-               CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) |
-                          MISC_MUX_QE_TDM);
-               printf("QECSR : 0x%02x, mux to qe-tdm\n",
-                      CPLD_READ(sfp_ctl_status));
-       }
-       /* Mask all CPLD interrupt sources, except QSGMII interrupts */
-       if (CPLD_READ(sw_ver) < 0x03) {
-               debug("CPLD SW version 0x%02x doesn't support int_mask\n",
-                     CPLD_READ(sw_ver));
-       } else {
-               CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL &
-                          ~(CPLD_INT_MASK_QSGMII1 | CPLD_INT_MASK_QSGMII2));
-       }
-#endif
-
        return 0;
 }
 

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 7a5bf93..cfde8ec 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -127,24 +127,10 @@
 #define CPLD_LBMAP_RESET               0xFF
 #define CPLD_LBMAP_SHIFT               0x03
 
-#if defined(CONFIG_TARGET_T1042RDB_PI)
-#define CPLD_DIU_SEL_DFP               0x80
-#elif defined(CONFIG_TARGET_T1042D4RDB)
+#if defined(CONFIG_TARGET_T1042D4RDB)
 #define CPLD_DIU_SEL_DFP               0xc0
 #endif
 
-#if defined(CONFIG_TARGET_T1040D4RDB)
-#define CPLD_INT_MASK_ALL              0xFF
-#define CPLD_INT_MASK_THERM            0x80
-#define CPLD_INT_MASK_DVI_DFP          0x40
-#define CPLD_INT_MASK_QSGMII1          0x20
-#define CPLD_INT_MASK_QSGMII2          0x10
-#define CPLD_INT_MASK_SGMI1            0x08
-#define CPLD_INT_MASK_SGMI2            0x04
-#define CPLD_INT_MASK_TDMR1            0x02
-#define CPLD_INT_MASK_TDMR2            0x01
-#endif
-
 #define CFG_SYS_CPLD_BASE      0xffdf0000
 #define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE)
 #define CFG_SYS_CSPR2_EXT      (0xf)
@@ -266,9 +252,7 @@
 #define I2C_MUX_PCA_ADDR                0x70
 #define I2C_MUX_CH_DEFAULT      0x8
 
-#if defined(CONFIG_TARGET_T1042RDB_PI) || \
-       defined(CONFIG_TARGET_T1040D4RDB)       || \
-       defined(CONFIG_TARGET_T1042D4RDB)
+#if defined(CONFIG_TARGET_T1042D4RDB)
 /*
  * RTC configuration
  */
@@ -350,36 +334,16 @@
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_FMAN_ENET
-#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB)
-#define CFG_SYS_SGMII1_PHY_ADDR             0x03
-#elif defined(CONFIG_TARGET_T1040D4RDB)
-#define CFG_SYS_SGMII1_PHY_ADDR             0x01
-#elif defined(CONFIG_TARGET_T1042D4RDB)
+#if defined(CONFIG_TARGET_T1042D4RDB)
 #define CFG_SYS_SGMII1_PHY_ADDR             0x02
 #define CFG_SYS_SGMII2_PHY_ADDR             0x03
 #define CFG_SYS_SGMII3_PHY_ADDR             0x01
 #endif
 
-#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
-#define CFG_SYS_RGMII1_PHY_ADDR             0x04
-#define CFG_SYS_RGMII2_PHY_ADDR             0x05
-#else
 #define CFG_SYS_RGMII1_PHY_ADDR             0x01
 #define CFG_SYS_RGMII2_PHY_ADDR             0x02
 #endif
 
-/* Enable VSC9953 L2 Switch driver on T1040 SoC */
-#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB)
-#ifdef CONFIG_TARGET_T1040RDB
-#define CFG_SYS_FM1_QSGMII11_PHY_ADDR  0x04
-#define CFG_SYS_FM1_QSGMII21_PHY_ADDR  0x08
-#else
-#define CFG_SYS_FM1_QSGMII11_PHY_ADDR  0x08
-#define CFG_SYS_FM1_QSGMII21_PHY_ADDR  0x0c
-#endif
-#endif
-#endif
-
 /*
  * Miscellaneous configurable options
  */
@@ -402,15 +366,7 @@
 #define __USB_PHY_TYPE utmi
 #define RAMDISKFILE    "t104xrdb/ramdisk.uboot"
 
-#ifdef CONFIG_TARGET_T1040RDB
-#define FDTFILE                "t1040rdb/t1040rdb.dtb"
-#elif defined(CONFIG_TARGET_T1042RDB_PI)
-#define FDTFILE                "t1042rdb_pi/t1042rdb_pi.dtb"
-#elif defined(CONFIG_TARGET_T1042RDB)
-#define FDTFILE                "t1042rdb/t1042rdb.dtb"
-#elif defined(CONFIG_TARGET_T1040D4RDB)
-#define FDTFILE                "t1042rdb/t1040d4rdb.dtb"
-#elif defined(CONFIG_TARGET_T1042D4RDB)
+#if defined(CONFIG_TARGET_T1042D4RDB)
 #define FDTFILE                "t1042rdb/t1042d4rdb.dtb"
 #endif