board/freescale/t104xrdb/eth.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2014 Freescale Semiconductor, Inc.
   4  */
   5
   6 #include <common.h>
   7 #include <net.h>
   8 #include <netdev.h>
   9 #include <asm/fsl_serdes.h>
  10 #include <asm/immap_85xx.h>
  11 #include <fm_eth.h>
  12 #include <fsl_mdio.h>
  13 #include <malloc.h>
  14 #include <fsl_dtsec.h>
  15 #include <vsc9953.h>
  16
  17 #include "../common/fman.h"
  18
  19 int board_eth_init(struct bd_info *bis)
  20 {
  21 #ifdef CONFIG_FMAN_ENET
  22         struct memac_mdio_info memac_mdio_info;
  23         unsigned int i;
  24         int phy_addr = 0;
  25
  26         printf("Initializing Fman\n");
  27
  28         memac_mdio_info.regs =
  29                 (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
  30         memac_mdio_info.name = DEFAULT_FM_MDIO_NAME;
  31
  32         /* Register the real 1G MDIO bus */
  33         fm_memac_mdio_init(bis, &memac_mdio_info);
  34
  35         /*
  36          * Program on board RGMII, SGMII PHY addresses.
  37          */
  38         for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CFG_SYS_NUM_FM1_DTSEC; i++) {
  39                 int idx = i - FM1_DTSEC1;
  40
  41                 switch (fm_info_get_enet_if(i)) {
  42 #ifdef CONFIG_TARGET_T1042D4RDB
  43                 case PHY_INTERFACE_MODE_SGMII:
  44                         /* T1042D4RDB supports SGMII on DTSEC1, DTSEC2
  45                          *  & DTSEC3
  46                          */
  47                         if (FM1_DTSEC1 == i)
  48                                 phy_addr = CFG_SYS_SGMII1_PHY_ADDR;
  49                         if (FM1_DTSEC2 == i)
  50                                 phy_addr = CFG_SYS_SGMII2_PHY_ADDR;
  51                         if (FM1_DTSEC3 == i)
  52                                 phy_addr = CFG_SYS_SGMII3_PHY_ADDR;
  53                         fm_info_set_phy_address(i, phy_addr);
  54                         break;
  55 #endif
  56                 case PHY_INTERFACE_MODE_RGMII:
  57                 case PHY_INTERFACE_MODE_RGMII_TXID:
  58                 case PHY_INTERFACE_MODE_RGMII_RXID:
  59                 case PHY_INTERFACE_MODE_RGMII_ID:
  60                         if (FM1_DTSEC4 == i)
  61                                 phy_addr = CFG_SYS_RGMII1_PHY_ADDR;
  62                         if (FM1_DTSEC5 == i)
  63                                 phy_addr = CFG_SYS_RGMII2_PHY_ADDR;
  64                         fm_info_set_phy_address(i, phy_addr);
  65                         break;
  66                 case PHY_INTERFACE_MODE_QSGMII:
  67                         fm_info_set_phy_address(i, 0);
  68                         break;
  69                 case PHY_INTERFACE_MODE_NA:
  70                         fm_info_set_phy_address(i, 0);
  71                         break;
  72                 default:
  73                         printf("Fman1: DTSEC%u set to unknown interface %i\n",
  74                                idx + 1, fm_info_get_enet_if(i));
  75                         fm_info_set_phy_address(i, 0);
  76                         break;
  77                 }
  78                 if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_QSGMII ||
  79                     fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_NA)
  80                         fm_info_set_mdio(i, NULL);
  81                 else
  82                         fm_info_set_mdio(i,
  83                                          miiphy_get_dev_by_name(
  84                                                         DEFAULT_FM_MDIO_NAME));
  85         }
  86
  87
  88         cpu_eth_init(bis);
  89 #endif
  90
  91         return pci_eth_init(bis);
  92 }