Merge with http://www.denx.de/git/u-boot.git
authorMarkus Klotzbuecher <mk@denx.de>
Fri, 24 Mar 2006 14:43:16 +0000 (15:43 +0100)
committerMarkus Klotzbücher <mk@pollux.denx.de>
Fri, 24 Mar 2006 14:43:16 +0000 (15:43 +0100)
1  2 
README
board/delta/nand.c
common/env_nand.c

diff --combined README
--- 1/README
--- 2/README
+++ b/README
@@@ -246,7 -246,6 +246,7 @@@ The following options need to be config
                CONFIG_SA1110
                CONFIG_ARM7
                CONFIG_PXA250
 +              CONFIG_CPU_MONAHANS
  
                MicroBlaze based CPUs:
                ----------------------
                PowerPC based boards:
                ---------------------
  
-               CONFIG_ADCIOP           CONFIG_GEN860T          CONFIG_PCIPPC2
-               CONFIG_ADS860           CONFIG_GENIETV          CONFIG_PCIPPC6
-               CONFIG_AMX860           CONFIG_GTH              CONFIG_pcu_e
-               CONFIG_AP1000           CONFIG_gw8260           CONFIG_PIP405
-               CONFIG_AR405            CONFIG_hermes           CONFIG_PM826
-               CONFIG_BAB7xx           CONFIG_hymod            CONFIG_ppmc8260
-               CONFIG_c2mon            CONFIG_IAD210           CONFIG_QS823
-               CONFIG_CANBT            CONFIG_ICU862           CONFIG_QS850
-               CONFIG_CCM              CONFIG_IP860            CONFIG_QS860T
-               CONFIG_CMI              CONFIG_IPHASE4539       CONFIG_RBC823
-               CONFIG_cogent_mpc8260   CONFIG_IVML24           CONFIG_RPXClassic
-               CONFIG_cogent_mpc8xx    CONFIG_IVML24_128       CONFIG_RPXlite
-               CONFIG_CPCI405          CONFIG_IVML24_256       CONFIG_RPXsuper
-               CONFIG_CPCI4052         CONFIG_IVMS8            CONFIG_rsdproto
-               CONFIG_CPCIISER4        CONFIG_IVMS8_128        CONFIG_sacsng
-               CONFIG_CPU86            CONFIG_IVMS8_256        CONFIG_Sandpoint8240
-               CONFIG_CRAYL1           CONFIG_JSE              CONFIG_Sandpoint8245
-               CONFIG_CSB272           CONFIG_LANTEC           CONFIG_sbc8260
-               CONFIG_CU824            CONFIG_lwmon            CONFIG_sbc8560
-               CONFIG_DASA_SIM         CONFIG_MBX              CONFIG_SM850
-               CONFIG_DB64360          CONFIG_MBX860T          CONFIG_SPD823TS
-               CONFIG_DB64460          CONFIG_MHPC             CONFIG_STXGP3
-               CONFIG_DU405            CONFIG_MIP405           CONFIG_SXNI855T
-               CONFIG_DUET_ADS         CONFIG_MOUSSE           CONFIG_TQM823L
-               CONFIG_EBONY            CONFIG_MPC8260ADS       CONFIG_TQM8260
-               CONFIG_ELPPC            CONFIG_MPC8540ADS       CONFIG_TQM850L
-               CONFIG_ELPT860          CONFIG_MPC8540EVAL      CONFIG_TQM855L
-               CONFIG_ep8260           CONFIG_MPC8560ADS       CONFIG_TQM860L
-               CONFIG_ERIC             CONFIG_MUSENKI          CONFIG_TTTech
-               CONFIG_ESTEEM192E       CONFIG_MVS1             CONFIG_UTX8245
-               CONFIG_ETX094           CONFIG_NETPHONE         CONFIG_V37
-               CONFIG_EVB64260         CONFIG_NETTA            CONFIG_W7OLMC
-               CONFIG_FADS823          CONFIG_NETVIA           CONFIG_W7OLMG
-               CONFIG_FADS850SAR       CONFIG_NX823            CONFIG_WALNUT
-               CONFIG_FADS860T         CONFIG_OCRTC            CONFIG_ZPC1900
-               CONFIG_FLAGADM          CONFIG_ORSG             CONFIG_ZUMA
-               CONFIG_FPS850L          CONFIG_OXC
-               CONFIG_FPS860L          CONFIG_PCI405
+               CONFIG_ADCIOP           CONFIG_GEN860T          CONFIG_PCI405
+               CONFIG_ADS860           CONFIG_GENIETV          CONFIG_PCIPPC2
+               CONFIG_AMX860           CONFIG_GTH              CONFIG_PCIPPC6
+               CONFIG_AP1000           CONFIG_gw8260           CONFIG_pcu_e
+               CONFIG_AR405            CONFIG_hermes           CONFIG_PIP405
+               CONFIG_BAB7xx           CONFIG_hymod            CONFIG_PM826
+               CONFIG_c2mon            CONFIG_IAD210           CONFIG_ppmc8260
+               CONFIG_CANBT            CONFIG_ICU862           CONFIG_QS823
+               CONFIG_CCM              CONFIG_IP860            CONFIG_QS850
+               CONFIG_CMI              CONFIG_IPHASE4539       CONFIG_QS860T
+               CONFIG_cogent_mpc8260   CONFIG_IVML24           CONFIG_RBC823
+               CONFIG_cogent_mpc8xx    CONFIG_IVML24_128       CONFIG_RPXClassic
+               CONFIG_CPCI405          CONFIG_IVML24_256       CONFIG_RPXlite
+               CONFIG_CPCI4052         CONFIG_IVMS8            CONFIG_RPXsuper
+               CONFIG_CPCIISER4        CONFIG_IVMS8_128        CONFIG_rsdproto
+               CONFIG_CPU86            CONFIG_IVMS8_256        CONFIG_sacsng
+               CONFIG_CRAYL1           CONFIG_JSE              CONFIG_Sandpoint8240
+               CONFIG_CSB272           CONFIG_LANTEC           CONFIG_Sandpoint8245
+               CONFIG_CU824            CONFIG_LITE5200B        CONFIG_sbc8260
+               CONFIG_DASA_SIM         CONFIG_lwmon            CONFIG_sbc8560
+               CONFIG_DB64360          CONFIG_MBX              CONFIG_SM850
+               CONFIG_DB64460          CONFIG_MBX860T          CONFIG_SPD823TS
+               CONFIG_DU405            CONFIG_MHPC             CONFIG_STXGP3
+               CONFIG_DUET_ADS         CONFIG_MIP405           CONFIG_SXNI855T
+               CONFIG_EBONY            CONFIG_MOUSSE           CONFIG_TQM823L
+               CONFIG_ELPPC            CONFIG_MPC8260ADS       CONFIG_TQM8260
+               CONFIG_ELPT860          CONFIG_MPC8540ADS       CONFIG_TQM850L
+               CONFIG_ep8260           CONFIG_MPC8540EVAL      CONFIG_TQM855L
+               CONFIG_ERIC             CONFIG_MPC8560ADS       CONFIG_TQM860L
+               CONFIG_ESTEEM192E       CONFIG_MUSENKI          CONFIG_TTTech
+               CONFIG_ETX094           CONFIG_MVS1             CONFIG_UTX8245
+               CONFIG_EVB64260         CONFIG_NETPHONE         CONFIG_V37
+               CONFIG_FADS823          CONFIG_NETTA            CONFIG_W7OLMC
+               CONFIG_FADS850SAR       CONFIG_NETVIA           CONFIG_W7OLMG
+               CONFIG_FADS860T         CONFIG_NX823            CONFIG_WALNUT
+               CONFIG_FLAGADM          CONFIG_OCRTC            CONFIG_ZPC1900
+               CONFIG_FPS850L          CONFIG_ORSG             CONFIG_ZUMA
+               CONFIG_FPS860L          CONFIG_OXC
  
                ARM based boards:
                -----------------
  
                CONFIG_ARMADILLO,       CONFIG_AT91RM9200DK,    CONFIG_CERF250,
 -              CONFIG_CSB637,          CONFIG_DNP1110,         CONFIG_EP7312,
 -              CONFIG_H2_OMAP1610,     CONFIG_HHP_CRADLE,      CONFIG_IMPA7,
 -              CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, CONFIG_KB9202,
 -              CONFIG_LART,            CONFIG_LPD7A400,        CONFIG_LUBBOCK,
 -              CONFIG_OSK_OMAP5912,    CONFIG_OMAP2420H4,      CONFIG_SHANNON,
 -              CONFIG_P2_OMAP730,      CONFIG_SMDK2400,        CONFIG_SMDK2410,
 -              CONFIG_TRAB,            CONFIG_VCMA9
 +              CONFIG_CSB637,          CONFIG_DELTA,           CONFIG_DNP1110,
 +              CONFIG_EP7312,          CONFIG_H2_OMAP1610,     CONFIG_HHP_CRADLE,
 +              CONFIG_IMPA7,           CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, 
 +              CONFIG_KB9202,          CONFIG_LART,            CONFIG_LPD7A400,
 +              CONFIG_LUBBOCK,         CONFIG_OSK_OMAP5912,    CONFIG_OMAP2420H4,
 +              CONFIG_SHANNON,         CONFIG_P2_OMAP730,      CONFIG_SMDK2400,
 +              CONFIG_SMDK2410,        CONFIG_TRAB,            CONFIG_VCMA9
  
                MicroBlaze based boards:
                ------------------------
                that this requires a (stable) reference clock (32 kHz
                RTC clock or CFG_8XX_XIN)
  
 +- Intel Monahans options:
 +              CFG_MONAHANS_RUN_MODE_OSC_RATIO
 +
 +              Defines the Monahans run mode to oscillator
 +              ratio. Valid values are 8, 16, 24, 31. The core
 +              frequency is this value multiplied by 13 MHz.
 +
 +              CFG_MONAHANS_TURBO_RUN_MODE_RATIO
 +              
 +              Defines the Monahans turbo mode to oscillator
 +              ratio. Valid values are 1 (default if undefined) and
 +              2. The core frequency as calculated above is multiplied 
 +              by this value.
 +              
  - Linux Kernel Interface:
                CONFIG_CLOCKS_IN_MHZ
  
                The maximum size of the constructed OF tree.
  
                OF_CPU - The proper name of the cpus node.
+               OF_SOC - The proper name of the soc node.
                OF_TBCLK - The timebase frequency.
+               OF_STDOUT_PATH - The path to the console device
+               CONFIG_OF_HAS_BD_T
+               The resulting flat device tree will have a copy of the bd_t.
+               Space should be pre-allocated in the dts for the bd_t.
+               CONFIG_OF_HAS_UBOOT_ENV
+               The resulting flat device tree will have a copy of u-boot's
+               environment variables
+               CONFIG_OF_BOARD_SETUP
+               Board code has addition modification that it wants to make
+               to the flat device tree before handing it off to the kernel
  
  - Serial Ports:
                CFG_PL010_SERIAL
                CFG_CMD_DIAG    * Diagnostics
                CFG_CMD_DOC     * Disk-On-Chip Support
                CFG_CMD_DTT     * Digital Therm and Thermostat
-               CFG_CMD_ECHO    * echo arguments
+               CFG_CMD_ECHO      echo arguments
                CFG_CMD_EEPROM  * EEPROM read/write support
                CFG_CMD_ELF     * bootelf, bootvx
                CFG_CMD_ENV       saveenv
@@@ -1732,6 -1734,12 +1749,12 @@@ Configuration Settings
  - CFG_MALLOC_LEN:
                Size of DRAM reserved for malloc() use.
  
+ - CFG_BOOTM_LEN:
+               Normally compressed uImages are limited to an
+               uncompressed size of 8 MBytes. If this is not enough,
+               you can define CFG_BOOTM_LEN in your board config file
+               to adjust this setting to your needs.
  - CFG_BOOTMAPSZ:
                Maximum size of memory mapped by the startup code of
                the Linux kernel; all data that must be processed by
@@@ -1961,17 -1969,6 +1984,17 @@@ to save the current settings
          These two #defines specify the offset and size of the environment
          area within the first NAND device.
  
 +      - CFG_ENV_OFFSET_REDUND
 +
 +        This setting describes a second storage area of CFG_ENV_SIZE
 +        size used to hold a redundant copy of the environment data,
 +        so that there is a valid backup copy in case there is a
 +        power failure during a "saveenv" operation.
 +
 +      Note: CFG_ENV_OFFSET and CFG_ENV_OFFSET_REDUND must be aligned
 +      to a block boundary, and CFG_ENV_SIZE must be a multiple of
 +      the NAND devices block size.
 +
  - CFG_SPI_INIT_OFFSET
  
        Defines offset to the initial SPI buffer area in DPRAM. The
diff --combined board/delta/nand.c
@@@ -229,7 -229,7 +229,7 @@@ static void wait_us(unsigned long us
        }
  }
  
- static void dfc_clear_nddb()
+ static void dfc_clear_nddb(void)
  {
        NDCR &= ~NDCR_ND_RUN;
        wait_us(CFG_NAND_OTHER_TO);
@@@ -263,7 -263,7 +263,7 @@@ static unsigned long dfc_wait_event(uns
  }
  
  /* we don't always wan't to do this */
- static void dfc_new_cmd()
+ static void dfc_new_cmd(void)
  {
        int retry = 0;
        unsigned long status;
@@@ -293,6 -293,11 +293,6 @@@ static int dfc_wait(struct mtd_info *mt
  {
        unsigned long ndsr=0, event=0;
  
 -      /* mk@tbd set appropriate timeouts */
 -      /*      if (state == FL_ERASING) */
 -      /*              timeo = CFG_HZ * 400; */
 -      /*      else */
 -      /*              timeo = CFG_HZ * 20; */
        if(state == FL_WRITING) {
                event = NDSR_CS0_CMDD | NDSR_CS0_BBD;
        } else if(state == FL_ERASING) {
@@@ -393,7 -398,7 +393,7 @@@ static void dfc_cmdfunc(struct mtd_inf
        return;
  }
  
- static void dfc_gpio_init()
+ static void dfc_gpio_init(void)
  {
        DFC_DEBUG2("Setting up DFC GPIO's.\n");
  
@@@ -558,12 -563,13 +558,12 @@@ void board_nand_init(struct nand_chip *
  
  
        /* wait 10 us due to cmd buffer clear reset */
 -      /*      wait(10); */
 +      /*      wait(10); */
  
  
        nand->hwcontrol = dfc_hwcontrol;
 -/*    nand->dev_ready = dfc_device_ready; */
 +/*    nand->dev_ready = dfc_device_ready; */
        nand->eccmode = NAND_ECC_SOFT;
 -      nand->chip_delay = NAND_DELAY_US;
        nand->options = NAND_BUSWIDTH_16;
        nand->waitfunc = dfc_wait;
        nand->read_byte = dfc_read_byte;
diff --combined common/env_nand.c
  #include <command.h>
  #include <environment.h>
  #include <linux/stddef.h>
 +#include <malloc.h>
  #include <nand.h>
  
  #if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_NAND)) == (CFG_CMD_ENV|CFG_CMD_NAND))
  #define CMD_SAVEENV
 +#elif defined(CFG_ENV_OFFSET_REDUND)
 +#error Cannot use CFG_ENV_OFFSET_REDUND without CFG_CMD_ENV & CFG_CMD_NAND
  #endif
  
 -#if defined(CFG_ENV_SIZE_REDUND)
 -#error CFG_ENV_SIZE_REDUND  not supported yet
 +#if defined(CFG_ENV_SIZE_REDUND) && (CFG_ENV_SIZE_REDUND != CFG_ENV_SIZE)
 +#error CFG_ENV_SIZE_REDUND should be the same as CFG_ENV_SIZE
  #endif
  
 -#if defined(CFG_ENV_ADDR_REDUND)
 -#error CFG_ENV_ADDR_REDUND and CFG_ENV_IS_IN_NAND not supported yet
 -#endif
 -
 -
  #ifdef CONFIG_INFERNO
  #error CONFIG_INFERNO not supported yet
  #endif
@@@ -97,7 -99,7 +97,7 @@@ int env_init(void
  {
        DECLARE_GLOBAL_DATA_PTR;
  
 -      gd->env_addr  = (ulong)&default_environment[0];
 +      gd->env_addr  = (ulong)&default_environment[0];
        gd->env_valid = 1;
  
        return (0);
   * The legacy NAND code saved the environment in the first NAND device i.e.,
   * nand_dev_desc + 0. This is also the behaviour using the new NAND code.
   */
-       int total, ret = 0;
 +#ifdef CFG_ENV_OFFSET_REDUND
 +int saveenv(void)
 +{
++      ulong total;
++      int ret = 0;
 +
 +      DECLARE_GLOBAL_DATA_PTR;
 +
 +      env_ptr->flags++;
 +      total = CFG_ENV_SIZE;
 +
 +      if(gd->env_valid == 1) {
 +              puts ("Erasing redundant Nand...");
 +              if (nand_erase(&nand_info[0],
 +                             CFG_ENV_OFFSET_REDUND, CFG_ENV_SIZE))
 +                      return 1;
 +              puts ("Writing to redundant Nand... ");
 +              ret = nand_write(&nand_info[0], CFG_ENV_OFFSET_REDUND, &total,
 +                               (u_char*) env_ptr);
 +      } else {
 +              puts ("Erasing Nand...");
 +              if (nand_erase(&nand_info[0],
 +                             CFG_ENV_OFFSET, CFG_ENV_SIZE))
 +                      return 1;
 +
 +              puts ("Writing to Nand... ");
 +              ret = nand_write(&nand_info[0], CFG_ENV_OFFSET, &total,
 +                               (u_char*) env_ptr);
 +      }
 +      if (ret || total != CFG_ENV_SIZE)
 +              return 1;
 +
 +      puts ("done\n");
 +      gd->env_valid = (gd->env_valid == 2 ? 1 : 2);
 +      return ret;
 +}
 +#else /* ! CFG_ENV_OFFSET_REDUND */
  int saveenv(void)
  {
-       int total, ret = 0;
+       ulong total;
+       int ret = 0;
  
        puts ("Erasing Nand...");
        if (nand_erase(&nand_info[0], CFG_ENV_OFFSET, CFG_ENV_SIZE))
  
        puts ("Writing to Nand... ");
        total = CFG_ENV_SIZE;
-       ret = nand_write(&nand_info[0], CFG_ENV_OFFSET, &total,
-                       (u_char*) env_ptr);
+       ret = nand_write(&nand_info[0], CFG_ENV_OFFSET, &total, (u_char*)env_ptr);
        if (ret || total != CFG_ENV_SIZE)
                return 1;
  
        puts ("done\n");
        return ret;
  }
 +#endif /* CFG_ENV_OFFSET_REDUND */
  #endif /* CMD_SAVEENV */
  
-       int crc1_ok = 0, crc2_ok = 0, total;
 +#ifdef CFG_ENV_OFFSET_REDUND
 +void env_relocate_spec (void)
 +{
 +#if !defined(ENV_IS_EMBEDDED)
++      ulong total;
++      int crc1_ok = 0, crc2_ok = 0;
 +      env_t *tmp_env1, *tmp_env2;
 +
 +      DECLARE_GLOBAL_DATA_PTR;
 +
 +      total = CFG_ENV_SIZE;
 +
 +      tmp_env1 = (env_t *) malloc(CFG_ENV_SIZE);
 +      tmp_env2 = (env_t *) malloc(CFG_ENV_SIZE);
 +
 +      nand_read(&nand_info[0], CFG_ENV_OFFSET, &total,
 +                (u_char*) tmp_env1);
 +      nand_read(&nand_info[0], CFG_ENV_OFFSET_REDUND, &total,
 +                (u_char*) tmp_env2);
 +
 +      crc1_ok = (crc32(0, tmp_env1->data, ENV_SIZE) == tmp_env1->crc);
 +      crc2_ok = (crc32(0, tmp_env2->data, ENV_SIZE) == tmp_env2->crc);
  
 +      if(!crc1_ok && !crc2_ok)
 +              return use_default();
 +      else if(crc1_ok && !crc2_ok)
 +              gd->env_valid = 1;
 +      else if(!crc1_ok && crc2_ok)
 +              gd->env_valid = 2;
 +      else {
 +              /* both ok - check serial */
 +              if(tmp_env1->flags == 255 && tmp_env2->flags == 0)
 +                      gd->env_valid = 2;
 +              else if(tmp_env2->flags == 255 && tmp_env1->flags == 0)
 +                      gd->env_valid = 1;
 +              else if(tmp_env1->flags > tmp_env2->flags)
 +                      gd->env_valid = 1;
 +              else if(tmp_env2->flags > tmp_env1->flags)
 +                      gd->env_valid = 2;
 +              else /* flags are equal - almost impossible */
 +                      gd->env_valid = 1;
 +
 +      }
 +
 +      free(env_ptr);
 +      if(gd->env_valid == 1) {
 +              env_ptr = tmp_env1;
 +              free(tmp_env2);
 +      } else {
 +              env_ptr = tmp_env2;
 +              free(tmp_env1);
 +      }
 +
 +#endif /* ! ENV_IS_EMBEDDED */
 +}
 +#else /* ! CFG_ENV_OFFSET_REDUND */
  /*
   * The legacy NAND code saved the environment in the first NAND device i.e.,
   * nand_dev_desc + 0. This is also the behaviour using the new NAND code.
  void env_relocate_spec (void)
  {
  #if !defined(ENV_IS_EMBEDDED)
-       int ret, total;
+       ulong total;
+       int ret;
  
        total = CFG_ENV_SIZE;
-       ret = nand_read(&nand_info[0], CFG_ENV_OFFSET, &total,
-                       (u_char*) env_ptr);
-       if (ret || total != CFG_ENV_SIZE)
+       ret = nand_read(&nand_info[0], CFG_ENV_OFFSET, &total, (u_char*)env_ptr);
+       if (ret || total != CFG_ENV_SIZE)
                return use_default();
  
        if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc)
                return use_default();
  #endif /* ! ENV_IS_EMBEDDED */
 -
  }
 +#endif /* CFG_ENV_OFFSET_REDUND */
  
  static void use_default()
  {
  
        puts ("*** Warning - bad CRC or NAND, using default environment\n\n");
  
 -      if (default_environment_size > CFG_ENV_SIZE){
 +      if (default_environment_size > CFG_ENV_SIZE){
                puts ("*** Error - default environment is too large\n\n");
                return;
        }
                        default_environment,
                        default_environment_size);
        env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE);
 -      gd->env_valid = 1;
 +      gd->env_valid = 1;
  
  }