include/configs/devkit3250.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Embest/Timll DevKit3250 board configuration file
   4  *
   5  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
   6  */
   7
   8 #ifndef __CONFIG_DEVKIT3250_H__
   9 #define __CONFIG_DEVKIT3250_H__
  10
  11 /* SoC and board defines */
  12 #include <linux/sizes.h>
  13 #include <asm/arch/cpu.h>
  14
  15 /*
  16  * Memory configurations
  17  */
  18 #define CONFIG_SYS_SDRAM_BASE           EMC_DYCS0_BASE
  19 #define CONFIG_SYS_SDRAM_SIZE           SZ_64M
  20
  21 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + SZ_4K \
  22                                          - GENERATED_GBL_DATA_SIZE)
  23
  24 /*
  25  * DMA
  26  */
  27
  28 /*
  29  * GPIO
  30  */
  31 #define CONFIG_LPC32XX_GPIO
  32
  33 /*
  34  * Ethernet
  35  */
  36 #define CONFIG_RMII
  37 #define CONFIG_LPC32XX_ETH
  38 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  39
  40 /*
  41  * NOR Flash
  42  */
  43 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  44 #define CONFIG_SYS_MAX_FLASH_SECT       71
  45 #define CONFIG_SYS_FLASH_BASE           EMC_CS0_BASE
  46 #define CONFIG_SYS_FLASH_SIZE           SZ_4M
  47
  48 /*
  49  * NAND controller
  50  */
  51 #define CONFIG_SYS_NAND_BASE            SLC_NAND_BASE
  52 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  53 #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
  54
  55 /*
  56  * NAND chip timings
  57  */
  58 #define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS        14
  59 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH          66666666
  60 #define CONFIG_LPC32XX_NAND_SLC_WHOLD           200000000
  61 #define CONFIG_LPC32XX_NAND_SLC_WSETUP          50000000
  62 #define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS        14
  63 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH          66666666
  64 #define CONFIG_LPC32XX_NAND_SLC_RHOLD           200000000
  65 #define CONFIG_LPC32XX_NAND_SLC_RSETUP          50000000
  66
  67 #define CONFIG_SYS_NAND_BLOCK_SIZE              0x20000
  68 #define CONFIG_SYS_NAND_PAGE_SIZE               NAND_LARGE_BLOCK_PAGE_SIZE
  69
  70 /*
  71  * USB
  72  */
  73 #define CONFIG_USB_OHCI_LPC32XX
  74 #define CONFIG_USB_ISP1301_I2C_ADDR             0x2d
  75
  76 /*
  77  * U-Boot General Configurations
  78  */
  79 #define CONFIG_SYS_CBSIZE               1024
  80 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  81
  82 /*
  83  * Pass open firmware flat tree
  84  */
  85
  86 /*
  87  * Environment
  88  */
  89
  90 #define CONFIG_BOOTCOMMAND                      \
  91         "dhcp; "                                \
  92         "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; "         \
  93         "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; "       \
  94         "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; "     \
  95         "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; "                  \
  96         "bootm ${loadaddr} - ${dtbaddr}"
  97
  98 #define CONFIG_EXTRA_ENV_SETTINGS               \
  99         "autoload=no\0"                         \
 100         "ethaddr=00:01:90:00:C0:81\0"           \
 101         "dtbaddr=0x81000000\0"                  \
 102         "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0"  \
 103         "tftpdir=vladimir/oe/devkit3250\0"      \
 104         "userargs=oops=panic\0"
 105
 106 /*
 107  * U-Boot Commands
 108  */
 109
 110 #define CONFIG_BOOTFILE                 "uImage"
 111
 112 /*
 113  * SPL specific defines
 114  */
 115 /* SPL will be executed at offset 0 */
 116
 117 /* SPL will use SRAM as stack */
 118 #define CONFIG_SPL_STACK                0x0000FFF8
 119
 120 /* Use the framework and generic lib */
 121
 122 /* SPL will use serial */
 123
 124 /* SPL loads an image from NAND */
 125 #define CONFIG_SPL_NAND_RAW_ONLY
 126
 127 #define CONFIG_SPL_NAND_SOFTECC
 128
 129 #define CONFIG_SPL_MAX_SIZE             0x20000
 130 #define CONFIG_SPL_PAD_TO               CONFIG_SPL_MAX_SIZE
 131
 132 /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
 133 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 134 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x60000
 135
 136 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 137 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 138
 139 /* See common/spl/spl.c  spl_set_header_raw_uboot() */
 140 #define CONFIG_SYS_MONITOR_LEN          CONFIG_SYS_NAND_U_BOOT_SIZE
 141
 142 /*
 143  * Include SoC specific configuration
 144  */
 145 #include <asm/arch/config.h>
 146
 147 #endif  /* __CONFIG_DEVKIT3250_H__*/