2 * (C) Copyright 2002, 2003
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
8 * Configuation settings for the MPL VCMA9 board.
10 * SPDX-License-Identifier: GPL-2.0+
16 #define MACH_TYPE_MPL_VCMA9 227
19 * High Level Configuration Options
22 #define CONFIG_SYS_THUMB_BUILD
24 #define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */
25 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
26 #define CONFIG_VCMA9 /* on a MPL VCMA9 Board */
27 #define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */
29 #define CONFIG_SYS_TEXT_BASE 0x0
31 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
33 /* input clock of PLL (VCMA9 has 12MHz input clock) */
34 #define CONFIG_SYS_CLK_FREQ 12000000
36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
43 #define CONFIG_BOOTP_BOOTFILESIZE
44 #define CONFIG_BOOTP_BOOTPATH
45 #define CONFIG_BOOTP_GATEWAY
46 #define CONFIG_BOOTP_HOSTNAME
49 * Command line configuration.
51 #define CONFIG_CMD_CACHE
52 #define CONFIG_CMD_EEPROM
53 #define CONFIG_CMD_REGINFO
54 #define CONFIG_CMD_DATE
55 #define CONFIG_CMD_BSP
56 #define CONFIG_CMD_NAND
58 #define CONFIG_BOARD_LATE_INIT
60 #define CONFIG_CMDLINE_EDITING
64 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
65 * address 0x50 with 16bit addressing
67 #define CONFIG_SYS_I2C
69 /* we use the built-in I2C controller */
70 #define CONFIG_SYS_I2C_S3C24X0
71 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */
72 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */
74 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
75 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
76 /* use EEPROM for environment vars */
77 #define CONFIG_ENV_IS_IN_EEPROM 1
78 /* environment starts at offset 0 */
79 #define CONFIG_ENV_OFFSET 0x000
80 /* 2KB should be more than enough */
81 #define CONFIG_ENV_SIZE 0x800
83 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
84 /* 64 bytes page write mode on 24C256 */
85 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
86 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
91 #define CONFIG_CS8900 /* we have a CS8900 on-board */
92 #define CONFIG_CS8900_BASE 0x20000300
93 #define CONFIG_CS8900_BUS16
96 * select serial console configuration
98 #define CONFIG_S3C24X0_SERIAL
99 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
101 /* USB support (currently only works with D-cache off) */
102 #define CONFIG_USB_OHCI
103 #define CONFIG_USB_OHCI_S3C24XX
104 #define CONFIG_USB_KEYBOARD
105 #define CONFIG_USB_STORAGE
106 #define CONFIG_DOS_PARTITION
108 /* Enable needed helper functions */
109 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
112 #define CONFIG_RTC_S3C24X0
114 /* allow to overwrite serial and ethaddr */
115 #define CONFIG_ENV_OVERWRITE
117 #define CONFIG_BAUDRATE 9600
119 #define CONFIG_BOOTDELAY 5
120 #define CONFIG_BOOT_RETRY_TIME -1
121 #define CONFIG_RESET_TO_RETRY
122 #define CONFIG_ZERO_BOOTDELAY_CHECK
124 #define CONFIG_NETMASK 255.255.255.0
125 #define CONFIG_IPADDR 10.0.0.110
126 #define CONFIG_SERVERIP 10.0.0.1
128 #if defined(CONFIG_CMD_KGDB)
129 /* speed to run kgdb serial port */
130 #define CONFIG_KGDB_BAUDRATE 115200
133 /* Miscellaneous configurable options */
134 #define CONFIG_SYS_LONGHELP /* undef to save memory */
135 #define CONFIG_SYS_CBSIZE 256
136 /* Print Buffer Size */
137 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
138 #define CONFIG_SYS_MAXARGS 16
139 /* Boot Argument Buffer Size */
140 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
142 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
143 #define CONFIG_DISPLAY_BOARDINFO /* Display board info */
145 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
146 #define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */
148 #define CONFIG_SYS_ALT_MEMTEST
149 #define CONFIG_SYS_LOAD_ADDR 0x30800000
151 /* we configure PWM Timer 4 to 1ms 1000Hz */
153 /* support additional compression methods */
159 /*#define VERSION_TAG "released"*/
160 #define VERSION_TAG "unstable"
161 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
162 "MEV-10080-001 " VERSION_TAG
164 /* Physical Memory Map */
165 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
166 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
167 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
169 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
171 /* FLASH and environment organization */
173 #define CONFIG_SYS_FLASH_CFI
174 #define CONFIG_FLASH_CFI_DRIVER
175 #define CONFIG_FLASH_CFI_LEGACY
176 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
177 #define CONFIG_FLASH_SHOW_PROGRESS 45
178 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
179 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
180 #define CONFIG_SYS_MAX_FLASH_SECT (19)
183 * Size of malloc() pool
184 * BZIP2 / LZO / LZMA need a lot of RAM
186 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
187 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
188 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
190 /* NAND configuration */
191 #ifdef CONFIG_CMD_NAND
192 #define CONFIG_NAND_S3C2410
193 #define CONFIG_SYS_S3C2410_NAND_HWECC
194 #define CONFIG_SYS_MAX_NAND_DEVICE 1
195 #define CONFIG_SYS_NAND_BASE 0x4E000000
196 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
197 #define CONFIG_S3C24XX_TACLS 1
198 #define CONFIG_S3C24XX_TWRPH0 5
199 #define CONFIG_S3C24XX_TWRPH1 3
202 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
205 #define CONFIG_CMD_FAT
206 #define CONFIG_CMD_UBI
207 #define CONFIG_CMD_UBIFS
208 #define CONFIG_CMD_JFFS2
209 #define CONFIG_YAFFS2
210 #define CONFIG_RBTREE
211 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
212 #define CONFIG_MTD_PARTITIONS
213 #define CONFIG_CMD_MTDPARTS
216 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
217 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
218 GENERATED_GBL_DATA_SIZE)
220 #define CONFIG_BOARD_EARLY_INIT_F
222 #endif /* __CONFIG_H */