1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
6 * Copyright 2010-2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
11 #include <asm-offsets.h>
13 #include <timestamp.h>
15 #include <asm/cache.h>
21 move.w #0x2700,%sr; /* disable intrs */ \
22 subl #60,%sp; /* space for 15 regs */ \
23 moveml %d0-%d7/%a0-%a6,%sp@;
26 moveml %sp@,%d0-%d7/%a0-%a6; \
27 addl #60,%sp; /* space for 15 regs */ \
30 #if defined(CONFIG_SERIAL_BOOT)
31 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
32 CONFIG_SYS_INIT_RAM_ADDR)
33 #define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
34 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
35 CONFIG_SYS_INIT_RAM_ADDR)
41 * Vector table. This is used for initial platform startup.
42 * These vectors are to catch any un-intended traps.
45 #if defined(CONFIG_SERIAL_BOOT)
47 INITSP: .long 0 /* Initial SP */
49 INITPC: .long ASM_DRAMINIT /* Initial PC */
51 #ifdef CONFIG_SYS_NAND_BOOT
52 INITPC: .long ASM_DRAMINIT_N /* Initial PC */
57 INITSP: .long 0 /* Initial SP */
58 INITPC: .long _START /* Initial PC */
63 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
64 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73 #if !defined(CONFIG_SERIAL_BOOT)
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
103 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116 #if defined(CONFIG_SERIAL_BOOT)
117 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
119 .long 0x00000000 /* checksum, not yet implemented */
120 .long 0x00040000 /* image length */
121 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
124 move.w #0x2700,%sr /* Mask off Interrupt */
126 #ifdef CONFIG_SYS_NAND_BOOT
127 /* for assembly stack */
128 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
131 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
136 move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
139 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
142 /* initialize general use internal ram */
144 move.l #(ICACHE_STATUS), %a1 /* icache */
145 move.l #(DCACHE_STATUS), %a2 /* dcache */
149 /* invalidate and disable cache */
150 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
151 movec %d0, %CACR /* Invalidate cache */
158 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
161 #ifdef CONFIG_SYS_CS0_BASE
162 /* Must disable global address */
163 move.l #0xFC008000, %a1
164 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
165 move.l #0xFC008008, %a1
166 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
167 move.l #0xFC008004, %a1
168 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
170 #endif /* CONFIG_CF_SBF */
172 #ifdef CONFIG_MCF5441x
173 /* TC: enable all peripherals,
174 in the future only enable certain peripherals */
175 move.l #0xFC04002D, %a1
177 #if defined(CONFIG_CF_SBF)
178 move.b #23, (%a1) /* dspi */
180 #endif /* CONFIG_MCF5441x */
182 /* mandatory board level ddr-sdram init,
183 * for both 5441x and 5445x
189 * DSPI Initialization
190 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
196 /* Enable pins for DSPI mode - chip-selects are enabled later */
198 #ifdef CONFIG_MCF5441x
199 move.l #0xEC09404E, %a1
200 move.l #0xEC09404F, %a2
205 /* Configure DSPI module */
206 move.l #0xFC05C000, %a0
207 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
209 move.l #0xFC05C00C, %a0
210 #ifdef CONFIG_MCF5441x
211 move.l #0x3E000016, (%a0)
214 move.l #0xFC05C034, %a2 /* dtfr */
215 move.l #0xFC05C03B, %a3 /* drfr */
217 move.l #(ASM_SBF_IMG_HDR + 4), %a1
221 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
222 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
224 move.l #0xFC05C02C, %a1 /* dspi status */
226 /* Issue commands and address */
227 move.l #0x8002000B, %d2 /* Fast Read Cmd */
228 jsr asm_dspi_wr_status
229 jsr asm_dspi_rd_status
231 move.l #0x80020000, %d2 /* Address byte 2 */
232 jsr asm_dspi_wr_status
233 jsr asm_dspi_rd_status
235 move.l #0x80020000, %d2 /* Address byte 1 */
236 jsr asm_dspi_wr_status
237 jsr asm_dspi_rd_status
239 move.l #0x80020000, %d2 /* Address byte 0 */
240 jsr asm_dspi_wr_status
241 jsr asm_dspi_rd_status
243 move.l #0x80020000, %d2 /* Dummy Wr and Rd */
244 jsr asm_dspi_wr_status
245 jsr asm_dspi_rd_status
247 /* Transfer serial boot header to sram */
249 move.l #0x80020000, %d2
250 jsr asm_dspi_wr_status
251 jsr asm_dspi_rd_status
253 move.b %d1, (%a0) /* read, copy to dst */
255 add.l #1, %a0 /* inc dst by 1 */
256 sub.l #1, %d4 /* dec cnt by 1 */
257 bne asm_dspi_rd_loop1
259 /* Transfer u-boot from serial flash to memory */
261 move.l #0x80020000, %d2
262 jsr asm_dspi_wr_status
263 jsr asm_dspi_rd_status
265 move.b %d1, (%a4) /* read, copy to dst */
267 add.l #1, %a4 /* inc dst by 1 */
268 sub.l #1, %d5 /* dec cnt by 1 */
269 bne asm_dspi_rd_loop2
271 move.l #0x00020000, %d2 /* Terminate */
272 jsr asm_dspi_wr_status
273 jsr asm_dspi_rd_status
275 /* jump to memory and execute */
276 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
280 move.l (%a1), %d0 /* status */
281 and.l #0x0000F000, %d0
282 cmp.l #0x00003000, %d0
283 bgt asm_dspi_wr_status
289 move.l (%a1), %d0 /* status */
290 and.l #0x000000F0, %d0
293 beq asm_dspi_rd_status
297 #endif /* CONFIG_CF_SBF */
299 #ifdef CONFIG_SYS_NAND_BOOT
300 /* copy 4 boot pages to dram as soon as possible */
301 /* each page is 996 bytes (1056 total with 60 ECC bytes */
302 move.l #0x00000000, %a1 /* src */
303 move.l #CONFIG_SYS_TEXT_BASE, %a2 /* dst */
304 move.l #0x3E0, %d0 /* sz in long */
307 move.l (%a1)+, (%a2)+
309 bne asm_boot_nand_copy
311 /* jump to memory and execute */
312 move.l #(asm_nand_init), %a0
316 /* exit nand boot-mode */
317 move.l #0xFC0FFF30, %a1
318 or.l #0x00000040, %d1
321 /* initialize general use internal ram */
323 move.l #(CACR_STATUS), %a1 /* CACR */
324 move.l #(ICACHE_STATUS), %a2 /* icache */
325 move.l #(DCACHE_STATUS), %a3 /* dcache */
330 /* invalidate and disable cache */
331 move.l #0x01004100, %d0 /* Invalidate cache cmd */
332 movec %d0, %CACR /* Invalidate cache */
339 #ifdef CONFIG_SYS_CS0_BASE
340 /* Must disable global address */
341 move.l #0xFC008000, %a1
342 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
343 move.l #0xFC008008, %a1
344 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
345 move.l #0xFC008004, %a1
346 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
349 /* NAND port configuration */
350 move.l #0xEC094048, %a1
356 move.l #0xFC0FFF38, %a1 /* isr */
357 move.l #0x000e0000, (%a1)
358 move.l #0xFC0FFF08, %a2
359 move.l #0x00000000, (%a2)+ /* car */
360 move.l #0x11000000, (%a2)+ /* rar */
361 move.l #0x00000000, (%a2)+ /* rpt */
362 move.l #0x00000000, (%a2)+ /* rai */
363 move.l #0xFC0FFF2c, %a2 /* cfg */
364 move.l #0x00000000, (%a2)+ /* secsz */
365 move.l #0x000e0681, (%a2)+
366 move.l #0xFC0FFF04, %a2 /* cmd2 */
367 move.l #0xFF404001, (%a2)
368 move.l #0x000e0000, (%a1)
374 move.l #0xFC0FFF00, %a1
375 move.l #0x30700000, (%a1)+ /* cmd1 */
376 move.l #0x007EF000, (%a1)+ /* cmd2 */
378 move.l #0xFC0FFF2C, %a1
379 move.l #0x00000841, (%a1)+ /* secsz */
380 move.l #0x000e0681, (%a1)+ /* cfg */
382 move.l #100, %d4 /* 100 pages ~200KB */
383 move.l #4, %d2 /* start at 4 */
384 move.l #0xFC0FFF04, %a0 /* cmd2 */
385 move.l #0xFC0FFF0C, %a1 /* rar */
386 move.l #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
389 move.l #0x11000000, %d0 /* rar */
394 move.l (%a0), %d0 /* cmd2 */
402 move.l #0xFC0FFF38, %a4 /* isr */
404 and.l #0x40000000, %d0
406 beq asm_nand_chk_status
408 move.l #0xFC0FFF38, %a4 /* isr */
410 or.l #0x000E0000, %d0
414 move.l #0xFC0FC000, %a3 /* buf 1 */
416 move.l (%a3)+, (%a2)+
423 /* jump to memory and execute */
424 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
427 #endif /* CONFIG_SYS_NAND_BOOT */
435 #endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
441 #if !defined(CONFIG_SERIAL_BOOT)
444 move.w #0x2700,%sr /* Mask off Interrupt */
446 /* Set vector base register at the beginning of the Flash */
447 move.l #CONFIG_SYS_FLASH_BASE, %d0
450 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
453 /* initialize general use internal ram */
455 move.l #(ICACHE_STATUS), %a1 /* icache */
456 move.l #(DCACHE_STATUS), %a2 /* dcache */
460 /* invalidate and disable cache */
461 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
462 movec %d0, %CACR /* Invalidate cache */
469 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
473 /* put relocation table address to a5 */
474 move.l #__got_start, %a5
476 /* setup stack initially on top of internal static ram */
477 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
480 * if configured, malloc_f arena will be reserved first,
481 * then (and always) gd struct space will be reserved
484 move.l #board_init_f_alloc_reserve, %a1
487 /* update stack and frame-pointers */
491 /* initialize reserved area */
493 move.l #board_init_f_init_reserve, %a1
496 /* run low-level CPU init code (from flash) */
497 move.l #cpu_init_f, %a1
500 /* run low-level board init code (from flash) */
502 move.l #board_init_f, %a1
505 /* board_init_f() does not return */
507 /******************************************************************************/
510 * void relocate_code(addr_sp, gd, addr_moni)
512 * This "function" does not return, instead it continues in RAM
513 * after relocating the monitor code.
517 * r5 = length in bytes
523 move.l 8(%a6), %sp /* set new stack pointer */
525 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
526 move.l 16(%a6), %a0 /* Save copy of Destination Address */
528 move.l #CONFIG_SYS_MONITOR_BASE, %a1
529 move.l #__init_end, %a2
532 /* copy the code to RAM */
534 move.l (%a1)+, (%a3)+
539 * We are done. Do not return, instead branch to second part of board
540 * initialization, now running from RAM.
543 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
550 * Now clear BSS segment
553 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
555 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
562 * fix got table in RAM
565 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
566 move.l %a1,%a5 /* fix got pointer register a5 */
569 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
579 /* calculate relative jump to board_init_r in ram */
581 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
583 /* set parameters for board_init_r */
584 move.l %a0,-(%sp) /* dest_addr */
585 move.l %d0,-(%sp) /* gd */
588 /******************************************************************************/
611 /******************************************************************************/
613 .globl version_string
615 .ascii U_BOOT_VERSION_STRING, "\0"