Begin and End addresses of the area used by the
simple memory test.
-- CONFIG_SYS_MEMTEST_SCRATCH:
- Scratch address used by the alternate memory test
- You only need to set this if address zero isn't writeable
-
- CONFIG_SYS_MEM_RESERVE_SECURE
Only implemented for ARMv8 for now.
If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_SYS_MEMTEST_SCRATCH
-#define CONFIG_SYS_MEMTEST_SCRATCH 0
-#endif
-
static int mod_mem(cmd_tbl_t *, int, int, int, char * const []);
/* Display values from last command.
char * const argv[])
{
ulong start, end;
- vu_long *buf, *dummy;
+ vu_long scratch_space;
+ vu_long *buf, *dummy = &scratch_space;
ulong iteration_limit = 0;
ulong count = 0;
ulong errs = 0; /* number of errors, or -1 if interrupted */
start, end);
buf = map_sysmem(start, end - start);
- dummy = map_sysmem(CONFIG_SYS_MEMTEST_SCRATCH, sizeof(vu_long));
for (iteration = 0;
!iteration_limit || iteration < iteration_limit;
iteration++) {
}
unmap_sysmem((void *)buf);
- unmap_sysmem((void *)dummy);
if (errs == -1UL) {
/* Memory test was aborted - write a newline to finish off */
/* Enable alternate, more extensive, memory test */
/* Scratch address used by the alternate memory test */
-#undef CONFIG_SYS_MEMTEST_SCRATCH
/* Enable temporary baudrate change while serial download */
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
504 * 1024 * 1024)
-#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
-#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
/* FLASH */
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x20000000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Environment */
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10800000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Memory configuration */
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END \
(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define GICD_BASE 0xf7011000
#define GICC_BASE 0xf7012000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x00100000
#define CONFIG_SYS_MEMTEST_START 0x05000000
#define CONFIG_SYS_MEMTEST_END 0x0D000000
#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
480 * 1024 * 1024)
-#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
480 * 1024 * 1024)
-#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_START (SH7757LCR_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
224 * 1024 * 1024)
-#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_SYS_SDRAM_BASE (SH7757LCR_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_START STM32_DDR_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_64M)
-#define CONFIG_SYS_MEMTEST_SCRATCH (CONFIG_SYS_MEMTEST_END + 4)
/*MMC SD*/
#define CONFIG_SYS_MMC_MAX_DEVICE 3
#define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */
/* defaults */
#define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */
-#define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
/* load address */
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
-#define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
#endif /* __CONFIG_H */
#define GICD_BASE 0xF9000000
#define GICR_BASE 0xF9080000
-#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
#define CONFIG_SYS_MEMTEST_START 0
#define CONFIG_SYS_MEMTEST_END 1000
#ifndef __CONFIG_VERSAL_MINI_H
#define __CONFIG_VERSAL_MINI_H
-#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
#define CONFIG_EXTRA_ENV_SETTINGS
#define GICD_BASE 0xF9010000
#define GICC_BASE 0xF9020000
-#ifndef CONFIG_SYS_MEMTEST_SCRATCH
-# define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
-#endif
-
#define CONFIG_SYS_MEMTEST_START 0
#define CONFIG_SYS_MEMTEST_END 1000
#ifndef __CONFIG_ZYNQMP_MINI_H
#define __CONFIG_ZYNQMP_MINI_H
-#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
#define CONFIG_EXTRA_ENV_SETTINGS
/* 0x0 - 0x40 is used for placing exception vectors */
#define CONFIG_SYS_MEMTEST_START 0x40
#define CONFIG_SYS_MEMTEST_END 0x100
-#define CONFIG_SYS_MEMTEST_SCRATCH 0
#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */
CONFIG_SYS_MEMORY_BASE
CONFIG_SYS_MEMORY_SIZE
CONFIG_SYS_MEMTEST_END
-CONFIG_SYS_MEMTEST_SCRATCH
CONFIG_SYS_MEMTEST_START
CONFIG_SYS_MEM_MAP
CONFIG_SYS_MEM_RESERVE_SECURE