#define VLX_TAG_ADDR 0x82000100
#define DT_ADR 0x85400000
#define RAMDISK_ADR 0x85500000
+#define RAMDISK_SIZE_MB 8
#if defined (CONFIG_SPX30G)
#define COOPERATE_PROCESSOR_RESET_ADDR 0x402b00b0
debugf("%s:dt load error!\n", __FUNCTION__);
return 0;
}
+
+
+#ifdef CONFIG_TIZEN
+#ifdef CONFIG_RAMDISK_BOOT
+ {
+ load_ramdisk(PARTS_RAMDISK, RAMDISK_ADR, RAMDISK_SIZE_MB * 1024 * 1024);
+ }
+#endif /* CONFIG_RAMDISK_BOOT */
+#else /* CONFIG_TIZEN */
#ifdef CONFIG_SDRAMDISK
{
int sd_ramdisk_size = 0;
hdr->ramdisk_size = sd_ramdisk_size;
}
#endif
+#endif /* CONFIG_TIZEN */
return 1;
}
/* Tizen default cmdline: mem */
ptr += sprintf(ptr, CMDLINE_DEFAULT_TIZEN);
+#ifdef CONFIG_RAMDISK_BOOT
+ ptr += sprintf(ptr, " root=/dev/ram0 rw initrd=0x%x,%dM",
+ RAMDISK_ADR, RAMDISK_SIZE_MB);
+#else
val = tizen_get_part_num(PARTS_ROOTFS);
ptr += sprintf(ptr, " root=/dev/mmcblk0p%d ro rootfstype=ext4 rootwait", val);
+ ptr += sprintf(ptr, " initrd=0x%x,0x%x", RAMDISK_ADR, 0);
+#endif
ptr += sprintf(ptr, " lcd_id=ID%06x", load_lcd_id_to_kernel());
ptr += sprintf(ptr, " lcd_base=%x", CONFIG_FB_RAM_BASE);
- /* check ramdisk_size */
- ptr += sprintf(ptr, " initrd=0x%x,0x%x", RAMDISK_ADR, 0);
-
ptr += sprintf(ptr, " mtp_offset=%s", load_mtp_offset_to_kernel());
ptr += sprintf(ptr, " elvss_offset=0x%x", load_elvss_offset_to_kernel());
ptr += sprintf(ptr, " hbm_offset=%s", load_hbm_offset_to_kernel());
break;
case PM_STATE_NORMAL:
default:
+#ifdef CONFIG_RAMDISK_BOOT
+ ptr += sprintf(ptr, " bootmode=ramdisk");
+#else
ptr += sprintf(ptr, " bootmode=normal");
+#endif
}
thor_save_env("normal");
return 0;
}
+int load_ramdisk(char *name, unsigned int base_addr, unsigned int size)
+{
+ return load_binary_to_addr(name, base_addr, size);
+}
+
int check_board_signature(char *fname, unsigned int dn_addr, unsigned int size)
{
struct sig_header bh_target;