\r
\r
\r
-/* bits definitions for register REG_GPU_APB_RF_APB_RST */\r
-#define BIT_GPU_SOFT_RST ( BIT(0) )\r
-\r
/* bits definitions for register REG_GPU_APB_RF_APB_CLK_CTRL */\r
#define BITS_CLK_GPU_DIV(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)) )\r
#define BITS_CLK_GPU_SEL(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)) )\r