drivers/video/sprdfb/dsi_1_10a/mipi_dsih_local.h

   1                                                                                        \r
   2 /*                                                                                     \r
   3     The Synopsys Software Driver and documentation (hereinafter "Software")            \r
   4     is an unsupported proprietary work of Synopsys, Inc. unless otherwise              \r
   5     expressly agreed to in writing between  Synopsys and you.                          \r
   6                                                                                        \r
   7     The Software IS NOT an item of Licensed Software or Licensed Product under         \r
   8     any End User Software License Agreement or Agreement for Licensed Product          \r
   9     with Synopsys or any supplement thereto.  Permission is hereby granted,            \r
  10     free of charge, to any person obtaining a copy of this software annotated          \r
  11     with this license and the Software, to deal in the Software without                \r
  12     restriction, including without limitation the rights to use, copy, modify,         \r
  13     merge, publish, distribute, sublicense, and/or sell copies of the Software,        \r
  14     and to permit persons to whom the Software is furnished to do so, subject          \r
  15     to the following conditions:                                                       \r
  16                                                                                        \r
  17     The above copyright notice and this permission notice shall be included in         \r
  18     all copies or substantial portions of the Software.                                \r
  19                                                                                        \r
  20     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS          \r
  21     AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE          \r
  22     IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE         \r
  23     ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,        \r
  24     INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES                 \r
  25     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR                 \r
  26     SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER         \r
  27     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT                 \r
  28     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY          \r
  29     OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH        \r
  30     DAMAGE.                                                                            \r
  31  */                                                                                    \r
  32                                                                                        \r
  33 #ifndef MIPI_DSIH_LOCAL_H_                                                             \r
  34 #define MIPI_DSIH_LOCAL_H_                                                             \r
  35                                                                                        \r
  36 //#include <stdint.h>             \r
  37 #include <common.h>\r
  38 #include "../sprdfb_chip_common.h"\r
  39 \r
  40 //#define  MIPI_DEBUG\r
  41 #ifdef MIPI_DEBUG\r
  42 #define MIPI_PRINT printf\r
  43 #else
  44 #define MIPI_PRINT(...)\r
  45 #endif\r
  46 \r
  47 //typedef unsigned char   uint8_t;       \r
  48 //typedef unsigned short  uint16_t;      \r
  49 //typedef unsigned int    uint32_t; \r
  50 \r
  51 #define DSIH_PIXEL_TOLERANCE  2                                                        \r
  52 #define DSIH_FIFO_ACTIVE_WAIT 5000    /* no of tries to access the fifo*/\r
  53 #define DSIH_PHY_ACTIVE_WAIT  200                                                      \r
  54 #define ONE_MS_ACTIVE_WAIT    50000 /* 50MHz processor */                              \r
  55 #define DEFAULT_BYTE_CLOCK    864000 /* a value to start PHY PLL - random */           \r
  56                                                                                        \r
  57 /** Define D-PHY type */\r
  58 #ifdef SPRD_MIPI_DPHY_GEN1\r
  59 /** DWC_MIPI_DPHY_BIDIR_TSMC40LP 4 Lanes Gen 1 1GHz */\r
  60  #define DWC_MIPI_DPHY_BIDIR_TSMC40LP\r
  61  #endif\r
  62 #ifdef SPRD_MIPI_DPHY_GEN2\r
  63 /** DWC_MIPI_DPHY_BIDIR_TSMC40LP / GF28LP 4 Lanes Gen 2 1.5GHz */\r
  64 #define GEN_2\r
  65 #endif\r
  66 /** 4 Lanes Gen 2 1.5GHz testchips */\r
  67 //#define TESTCHIP\r
  68 /** TQL 2 Lane test chip */\r
  69 /* #define DPHY2Btql */\r
  70 typedef enum                                                                           \r
  71 {                                                                                      \r
  72     OK = 0,                                                                            \r
  73     ERR_DSI_COLOR_CODING,                                                              \r
  74     ERR_DSI_OUT_OF_BOUND,                                                              \r
  75     ERR_DSI_OVERFLOW,                                                                  \r
  76     ERR_DSI_INVALID_INSTANCE,                                                          \r
  77     ERR_DSI_INVALID_IO,                                                                \r
  78     ERR_DSI_CORE_INCOMPATIBLE,                                                         \r
  79     ERR_DSI_VIDEO_MODE,                                                                \r
  80     ERR_DSI_INVALID_COMMAND,                                                           \r
  81     ERR_DSI_INVALID_EVENT,                                                             \r
  82     ERR_DSI_INVALID_HANDLE,                                                            \r
  83     ERR_DSI_PHY_POWERUP,                                                               \r
  84     ERR_DSI_PHY_INVALID,                                                               \r
  85     ERR_DSI_PHY_FREQ_OUT_OF_BOUND,                                                     \r
  86 #ifdef GEN_2\r
  87     ERR_DSI_PHY_PLL_NOT_LOCKED,\r
  88 #endif\r
  89     ERR_DSI_TIMEOUT                                                                    \r
  90 }                                                                                      \r
  91 dsih_error_t;                                                                          \r
  92 typedef enum                                                                           \r
  93 {                                                                                      \r
  94     VIDEO_NON_BURST_WITH_SYNC_PULSES = 0,                                              \r
  95     VIDEO_NON_BURST_WITH_SYNC_EVENTS,                                                  \r
  96     VIDEO_BURST_WITH_SYNC_PULSES                                                       \r
  97 }                                                                                      \r
  98 dsih_video_mode_t;                                                                     \r
  99 typedef enum                                                                           \r
 100 {                                                                                      \r
 101     COLOR_CODE_16BIT_CONFIG1,                                                          \r
 102     COLOR_CODE_16BIT_CONFIG2,                                                          \r
 103     COLOR_CODE_16BIT_CONFIG3,                                                          \r
 104     COLOR_CODE_18BIT_CONFIG1,                                                          \r
 105     COLOR_CODE_18BIT_CONFIG2,                                                          \r
 106     COLOR_CODE_24BIT                                                                   \r
 107 }                                                                                      \r
 108 dsih_color_coding_t;                                                                   \r
 109 typedef enum                                                                           \r
 110 {                                                                                      \r
 111     ACK_SOT_ERR = 0,                                                                   \r
 112     ACK_SOT_SYNC,                                                                      \r
 113     ACK_EOT_SYNC,                                                                      \r
 114     ACK_ESCAPE_CMD_ERR,                                                                \r
 115     ACK_LP_TX_SYNC_ERR,                                                                \r
 116     ACK_HS_RX_TIMEOUT_ERR,                                                             \r
 117     ACK_FALSE_CONTROL_ERR,                                                             \r
 118     ACK_RSVD_DEVICE_ERR_7,                                                             \r
 119     ACK_ECC_SINGLE_BIT_ERR,                                                            \r
 120     ACK_ECC_MULTI_BIT_ERR,                                                             \r
 121     ACK_CHECKSUM_ERR,                                                                  \r
 122     ACK_DSI_TYPE_NOT_RECOGNIZED_ERR,                                                   \r
 123     ACK_VC_ID_INVALID_ERR,                                                             \r
 124     ACK_INVALID_TX_LENGTH_ERR,                                                         \r
 125     ACK_RSVD_DEVICE_ERR_14,                                                            \r
 126     ACK_DSI_PROTOCOL_ERR,                                                              \r
 127                                                                                        \r
 128     DPHY_ESC_ENTRY_ERR,                                                                \r
 129     DPHY_SYNC_ESC_LP_ERR,                                                              \r
 130     DPHY_CONTROL_LANE0_ERR,                                                            \r
 131     DPHY_CONTENTION_LP0_ERR,                                                           \r
 132     DPHY_CONTENTION_LP1_ERR,                                                           \r
 133     /* start of st1*/                                                                  \r
 134     HS_CONTENTION,                                                                     \r
 135     LP_CONTENTION,                                                                     \r
 136     RX_ECC_SINGLE_ERR,                                                                 \r
 137     RX_ECC_MULTI_ERR,                                                                  \r
 138     RX_CRC_ERR,                                                                        \r
 139     RX_PKT_SIZE_ERR,                                                                   \r
 140     RX_EOTP_ERR,                                                                       \r
 141     DPI_PLD_FIFO_FULL_ERR,                                                             \r
 142     GEN_TX_CMD_FIFO_FULL_ERR,                                                          \r
 143     GEN_TX_PLD_FIFO_FULL_ERR,                                                          \r
 144     GEN_TX_PLD_FIFO_EMPTY_ERR,                                                         \r
 145     GEN_RX_PLD_FIFO_EMPTY_ERR,                                                         \r
 146     GEN_RX_PLD_FIFO_FULL_ERR,                                                          \r
 147                                                                                        \r
 148     DBI_TX_CMD_FIFO_FULL_ERR,                                                          \r
 149     DBI_TX_PLD_FIFO_FULL_ERR,                                                          \r
 150     DBI_RX_PLD_FIFO_EMPTY_ERR,                                                         \r
 151     DBI_RX_PLD_FIFO_FULL_ERR,                                                          \r
 152     DBI_ILLEGAL_CMD_ERR,                                                               \r
 153     DSI_MAX_EVENT                                                                      \r
 154 }                                                                                      \r
 155 dsih_event_t;                                                                          \r
 156 typedef enum                                                                           \r
 157 {                                                                                      \r
 158     NOT_INITIALIZED = 0,                                                               \r
 159     INITIALIZED,                                                                       \r
 160     ON,                                                                                \r
 161     OFF                                                                                \r
 162 }                                                                                      \r
 163 dsih_state_t;                                                                          \r
 164                                                                                        \r
 165 typedef struct dphy_t                                                                  \r
 166 {                                                                                      \r
 167     uint32_t address;                                                                  \r
 168     uint32_t reference_freq;                                                           \r
 169     dsih_state_t status;                                                               \r
 170     void (*bsp_pre_config)(struct dphy_t *instance, void* param);                      \r
 171     uint32_t (*core_read_function)(uint32_t addr, uint32_t offset);                    \r
 172     void (*core_write_function)(uint32_t addr, uint32_t offset, uint32_t data);        \r
 173     void (*log_error)(const char * string);                                            \r
 174     void (*log_info)(const char *fmt, ...);                                            \r
 175 }                                                                                      \r
 176 dphy_t;                                                                                \r
 177                                                                                        \r
 178 typedef struct dsih_ctrl_t                                                             \r
 179 {                                                                                      \r
 180     uint32_t address;                                                                  \r
 181     dphy_t phy_instance;                                                               \r
 182     uint32_t phy_feq;\r
 183     uint8_t max_lanes;                                                                 \r
 184     uint8_t max_hs_to_lp_cycles;                                                       \r
 185     uint8_t max_lp_to_hs_cycles;                                                       \r
 186     uint16_t max_bta_cycles;                                                           \r
 187     int color_mode_polarity;                                                           \r
 188     int shut_down_polarity;                                                            \r
 189     dsih_state_t status;                                                               \r
 190     uint32_t (*core_read_function)(uint32_t addr, uint32_t offset);                    \r
 191     void (*core_write_function)(uint32_t addr, uint32_t offset, uint32_t data);        \r
 192     void (*log_error)(const char * string);                                            \r
 193     void (*log_info)(const char *fmt, ...);                                            \r
 194     void (*event_registry[DSI_MAX_EVENT])(struct dsih_ctrl_t *instance, void *handler);\r
 195 }                                                                                      \r
 196 dsih_ctrl_t;                                                                           \r
 197 typedef struct                                                                         \r
 198 {                                                                                      \r
 199     uint8_t  no_of_lanes;                                                              \r
 200     uint8_t  virtual_channel;                                                          \r
 201     dsih_video_mode_t video_mode;                                                      \r
 202     int      receive_ack_packets;                                                      \r
 203     uint32_t byte_clock;                                                               \r
 204     uint32_t pixel_clock;                                                              \r
 205     dsih_color_coding_t color_coding;                                                  \r
 206     int      is_18_loosely;                                                            \r
 207     int      data_en_polarity;                                                         \r
 208     int      h_polarity;                                                               \r
 209     uint16_t h_active_pixels; /* hadr*/                                                \r
 210     uint16_t h_sync_pixels;                                                            \r
 211     uint16_t h_back_porch_pixels;   /* hbp */                                          \r
 212     uint16_t h_total_pixels;  /* h_total */                                            \r
 213     int      v_polarity;                                                               \r
 214     uint16_t v_active_lines; /* vadr*/                                                 \r
 215     uint16_t v_sync_lines;                                                             \r
 216     uint16_t v_back_porch_lines;   /* vbp */                                           \r
 217     uint16_t v_total_lines;  /* v_total */                                             \r
 218 }                                                                                      \r
 219 dsih_dpi_video_t;                                                                      \r
 220 typedef struct                                                                         \r
 221 {                                                                                      \r
 222     uint32_t addr;                                                                     \r
 223     uint32_t data;                                                                     \r
 224 }                                                                                      \r
 225 register_config_t;                                                                     \r
 226                                                                                        \r
 227 #endif /* MIPI_DSIH_LOCAL_H_ */                                                        \r
 228                                                                                              \r