2 * sound/soc/sprd/dai/vbc/vbc_r2p0.h
4 * SPRD SoC CPU-DAI -- SpreadTrum SOC DAI with EQ&ALC and some loop.
6 * Copyright (C) 2012 SpreadTrum Ltd.
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY ork FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
20 #include <asm/arch/sprd-audio.h>
22 #define VBC_FIFO_FRAME_NUM (160)
24 #define VBC_VERSION "vbc.r2p0"
26 #define VBC_EQ_FIRMWARE_MAGIC_LEN (4)
27 #define VBC_EQ_FIRMWARE_MAGIC_ID ("VBEQ")
28 #define VBC_EQ_PROFILE_VERSION (0x00000002) /*todo: set number */
29 #define VBC_EQ_PROFILE_CNT_MAX (50)
30 #define VBC_EQ_PROFILE_NAME_MAX (32)
31 #define VBC_EFFECT_PARAS_LEN (23+3+72*2) /*todo: set len */
52 /* VBDAPATH FM MIXER*/
59 /* VBADPATH ST INMUX*/
66 /* -------------------------- */
68 #define PHYS_VBDA0 (VBC_PHY_BASE + 0x0000) /* 0x0000 Voice band DAC0 data buffer */
69 #define PHYS_VBDA1 (VBC_PHY_BASE + 0x0004) /* 0x0004 Voice band DAC1 data buffer */
70 #define PHYS_VBAD0 (VBC_PHY_BASE + 0x0008) /* 0x0008 Voice band ADC0 data buffer */
71 #define PHYS_VBAD1 (VBC_PHY_BASE + 0x000C) /* 0x000C Voice band ADC1 data buffer */
72 #define PHYS_VBAD2 (VBC_PHY_BASE + 0x00C0) /* 0x00C0 Voice band ADC0 data buffer */
73 #define PHYS_VBAD3 (VBC_PHY_BASE + 0x00C4) /* 0x00C4 Voice band ADC1 data buffer */
75 #define ARM_VB_BASE VBC_BASE
76 #define VBDA0 (ARM_VB_BASE + 0x0000) /* Voice band DAC0 data buffer */
77 #define VBDA1 (ARM_VB_BASE + 0x0004) /* Voice band DAC1 data buffer */
78 #define VBAD0 (ARM_VB_BASE + 0x0008) /* Voice band ADC0 data buffer */
79 #define VBAD1 (ARM_VB_BASE + 0x000C) /* Voice band ADC1 data buffer */
80 #define VBBUFFSIZE (ARM_VB_BASE + 0x0010) /* Voice band buffer size */
81 #define VBADBUFFDTA (ARM_VB_BASE + 0x0014) /* Voice band AD buffer control */
82 #define VBDABUFFDTA (ARM_VB_BASE + 0x0018) /* Voice band DA buffer control */
83 #define VBADCNT (ARM_VB_BASE + 0x001C) /* Voice band AD buffer counter */
84 #define VBDACNT (ARM_VB_BASE + 0x0020) /* Voice band DA buffer counter */
85 #define VBAD23CNT (ARM_VB_BASE + 0x0024) /* Voice band AD23 buffer counter */
86 #define VBADDMA (ARM_VB_BASE + 0x0028) /* Voice band AD23 DMA control */
87 #define VBBUFFAD23 (ARM_VB_BASE + 0x002C) /* Voice band AD23 buffer size */
88 #define VBINTTYPE (ARM_VB_BASE + 0x0034)
89 #define VBDATASWT (ARM_VB_BASE + 0x0038)
90 #define VBIISSEL (ARM_VB_BASE + 0x003C)
92 #define DAPATCHCTL (ARM_VB_BASE + 0x0040)
93 #define DADGCTL (ARM_VB_BASE + 0x0044)
94 #define DAHPCTL (ARM_VB_BASE + 0x0048)
95 #define DAALCCTL0 (ARM_VB_BASE + 0x004C)
96 #define DAALCCTL1 (ARM_VB_BASE + 0x0050)
97 #define DAALCCTL2 (ARM_VB_BASE + 0x0054)
98 #define DAALCCTL3 (ARM_VB_BASE + 0x0058)
99 #define DAALCCTL4 (ARM_VB_BASE + 0x005C)
100 #define DAALCCTL5 (ARM_VB_BASE + 0x0060)
101 #define DAALCCTL6 (ARM_VB_BASE + 0x0064)
102 #define DAALCCTL7 (ARM_VB_BASE + 0x0068)
103 #define DAALCCTL8 (ARM_VB_BASE + 0x006C)
104 #define DAALCCTL9 (ARM_VB_BASE + 0x0070)
105 #define DAALCCTL10 (ARM_VB_BASE + 0x0074)
106 #define STCTL0 (ARM_VB_BASE + 0x0078)
107 #define STCTL1 (ARM_VB_BASE + 0x007C)
108 #define ADPATCHCTL (ARM_VB_BASE + 0x0080)
109 #define ADDG01CTL (ARM_VB_BASE + 0x0084)
110 #define ADDG23CTL (ARM_VB_BASE + 0x0088)
111 #define ADHPCTL (ARM_VB_BASE + 0x008C)
112 #define ADCSRCCTL (ARM_VB_BASE + 0x0090)
113 #define DACSRCCTL (ARM_VB_BASE + 0x0094)
114 #define MIXERCTL (ARM_VB_BASE + 0x0098)
116 #define STFIFOLVL (ARM_VB_BASE + 0x009C)
117 #define VBIRQEN (ARM_VB_BASE + 0x00A0)
118 #define VBIRQCLR (ARM_VB_BASE + 0x00A4)
119 #define VBIRQRAW (ARM_VB_BASE + 0x00A8)
120 #define VBIRQSTS (ARM_VB_BASE + 0x00AC)
122 #define VBNGCVTHD (ARM_VB_BASE + 0x00B0)
123 #define VBNGCTTHD (ARM_VB_BASE + 0x00B4)
124 #define VBNGCTL (ARM_VB_BASE + 0x00B8)
126 /* DA HPF EQ6 start, end */
127 #define HPCOEF0_H (ARM_VB_BASE + 0x0100)
128 #define HPCOEF0_L (ARM_VB_BASE + 0x0104)
129 #define HPCOEF42_H (ARM_VB_BASE + 0x0250)
130 #define HPCOEF42_L (ARM_VB_BASE + 0x0254)
131 /*DA HPF EQ4 start, end*/
132 #define HPCOEF43_H (ARM_VB_BASE + 0x0258)
133 #define HPCOEF43_L (ARM_VB_BASE + 0x025C)
134 #define HPCOEF71_H (ARM_VB_BASE + 0x0338)
135 #define HPCOEF71_L (ARM_VB_BASE + 0x033C)
137 /* AD01 HPF EQ6 start, end */
138 #define AD01_HPCOEF0_H (ARM_VB_BASE + 0x0400)
139 #define AD01_HPCOEF0_L (ARM_VB_BASE + 0x0404)
140 #define AD01_HPCOEF42_H (ARM_VB_BASE + 0x0550)
141 #define AD01_HPCOEF42_L (ARM_VB_BASE + 0x0554)
142 /* AD23 HPF EQ6 start, end */
143 #define AD23_HPCOEF0_H (ARM_VB_BASE + 0x0600)
144 #define AD23_HPCOEF0_L (ARM_VB_BASE + 0x0604)
145 #define AD23_HPCOEF42_H (ARM_VB_BASE + 0x0750)
146 #define AD23_HPCOEF42_L (ARM_VB_BASE + 0x0754)
148 #define ARM_VB_END (ARM_VB_BASE + 0x0754)
150 #define VBADBUFFERSIZE_SHIFT (0)
151 #define VBADBUFFERSIZE_MASK (0xFF<<VBADBUFFERSIZE_SHIFT)
152 #define VBDABUFFERSIZE_SHIFT (8)
153 #define VBDABUFFERSIZE_MASK (0xFF<<VBDABUFFERSIZE_SHIFT)
154 #define VBAD23BUFFERSIZE_SHIFT (0)
155 #define VBAD23BUFFERSIZE_MASK (0xFF<<VBAD23BUFFERSIZE_SHIFT)
157 #define VBCHNEN (ARM_VB_BASE + 0x00C8)
158 #define VBDACHEN_SHIFT (0)
159 #define VBADCHEN_SHIFT (2)
160 #define VBAD23CHEN_SHIFT (4)
162 #define VBAD2DMA_EN (0)
163 #define VBAD3DMA_EN (1)
165 #define VBIISSEL_AD01_PORT_SHIFT (0)
166 #define VBIISSEL_AD01_PORT_MASK (0x7)
167 #define VBIISSEL_AD23_PORT_SHIFT (3)
168 #define VBIISSEL_AD23_PORT_MASK (0x7<<VBIISSEL_AD23_PORT_SHIFT)
170 #define VBDAPATH_DA0_ADDFM_SHIFT (0)
171 #define VBDAPATH_DA0_ADDFM_MASK (0x3<<VBDAPATH_DA0_ADDFM_SHIFT)
172 #define VBDAPATH_DA1_ADDFM_SHIFT (2)
173 #define VBDAPATH_DA1_ADDFM_MASK (0x3<<VBDAPATH_DA1_ADDFM_SHIFT)
175 #define VBADPATH_ST0_INMUX_SHIFT (12)
176 #define VBADPATH_ST0_INMUX_MASK (0x3<<VBADPATH_ST0_INMUX_SHIFT)
177 #define VBADPATH_ST1_INMUX_SHIFT (14)
178 #define VBADPATH_ST1_INMUX_MASK (0x3<<VBADPATH_ST1_INMUX_SHIFT)
180 #define VBMIXER_DAC0_MUXIN_SEL_SHIFT (0)
181 #define VBMIXER_DAC0_MUXIN_SEL_MASK (0x7<<VBMIXER_DAC0_MUXIN_SEL_SHIFT)
182 #define VBMIXER_DAC1_MUXIN_SEL_SHIFT (3)
183 #define VBMIXER_DAC1_MUXIN_SEL_MASK (0x7<<VBMIXER_DAC1_MUXIN_SEL_SHIFT)
184 #define VBMIXER_DAC0_OUT_SEL (6)
185 #define VBMIXER_DAC1_OUT_SEL (7)
187 #define VBDACSRC_EN (0)
188 #define VBDACSRC_CLR (1)
189 #define VBDACSRC_F1F2F3_BP (3)
190 #define VBDACSRC_F1_SEL (4)
191 #define VBDACSRC_F0_BP (5)
192 #define VBDACSRC_F0_SEL (6)
205 int vbc_startup(int stream);
206 void vbc_shutdown(int stream);
207 int vbc_trigger(int stream, int enable);
208 int vbc_adc_sel_iis(int port);
209 int vbc_adc23_sel_iis(int port);
210 int vbc_dac0_fm_mixer(int mode);
211 int vbc_dac1_fm_mixer(int mode);