2 * sound/soc/sprd/codec/sprd/sprd-codec-v2.h
4 * SPRD-CODEC -- SpreadTrum Tiger intergrated codec.
6 * Copyright (C) 2013 SpreadTrum Ltd.
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY ork FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #ifndef __SPRD_CODEC_V3_H
18 #define __SPRD_CODEC_V3_H
20 #include <asm/arch/regs_adi.h>
21 #include <asm/arch/regs_global.h>
22 #include <asm/arch/sprd-audio.h>
23 #include <asm/arch/adi.h>
26 #ifndef CONFIG_SPRD_CODEC_USE_INT
27 /* #define CONFIG_SPRD_CODEC_USE_INT */
29 #ifndef CONFIG_CODEC_DAC_MUTE_WAIT
30 /* #define CONFIG_CODEC_DAC_MUTE_WAIT */
34 #define SPRD_CODEC_LDO_WAIT_TIME (5)
35 #define SPRD_CODEC_LDO_VCM_TIME (2)
36 #ifdef CONFIG_SPRD_CODEC_USE_INT
37 #define SPRD_CODEC_DAC_MUTE_TIMEOUT (600)
39 #define SPRD_CODEC_DAC_MUTE_WAIT_TIME (40)
42 #ifdef CONFIG_SPRD_CODEC_USE_INT
43 #define SPRD_CODEC_HP_POP_TIMEOUT (1000)
45 #define SPRD_CODEC_HP_POP_TIME_STEP (10)
46 #define SPRD_CODEC_HP_POP_TIME_COUNT (80) /* max 800ms will timeout */
49 #define SPRD_CODEC_RATE_8000 (10)
50 #define SPRD_CODEC_RATE_9600 ( 9)
51 #define SPRD_CODEC_RATE_11025 ( 8)
52 #define SPRD_CODEC_RATE_12000 ( 7)
53 #define SPRD_CODEC_RATE_16000 ( 6)
54 #define SPRD_CODEC_RATE_22050 ( 5)
55 #define SPRD_CODEC_RATE_24000 ( 4)
56 #define SPRD_CODEC_RATE_32000 ( 3)
57 #define SPRD_CODEC_RATE_44100 ( 2)
58 #define SPRD_CODEC_RATE_48000 ( 1)
59 #define SPRD_CODEC_RATE_96000 ( 0)
66 #define ADC_SINC_SEL (8)
67 #define ADC_SINC_SEL_MASK (0x3)
68 #define ADC1_EN_L (10)
69 #define ADC1_EN_R (11)
70 #define ADC1_SINC_SEL (14)
71 #define ADC1_SINC_SEL_MASK (0x3)
72 #define ADC1_DMIC_SEL (15)
75 #define DAC_MUTE_START (14)
76 #define DAC_MUTE_EN (15)
80 #define ADC_SRC_N_MASK (0x0f)
81 #define ADC1_SRC_N (4)
82 #define ADC1_SRC_N_MASK (0xf0)
85 #define DAC_MUTE_U_MASK (5)
86 #define DAC_MUTE_D_MASK (4)
87 #define DAC_MUTE_U_RAW (3)
88 #define DAC_MUTE_D_RAW (2)
89 #define DAC_MUTE_ST (0)
90 #define DAC_MUTE_ST_MASK (0x3)
94 #define DAC_MUTE_U (1)
95 #define DAC_MUTE_D (0)
98 #define ADC_DMIC_CLK_MODE (0)
99 #define ADC_DMIC_CLK_MODE_MASK (0x3)
100 #define ADC_DMIC_LR_SEL (2)
101 #define ADC1_DMIC_CLK_MODE (3)
102 #define ADC1_DMIC_CLK_MODE_MASK (0x3)
103 #define ADC1_DMIC_LR_SEL (5)
104 #define ADC_DMIC_EN (6)
105 #define ADC1_DMIC_EN (7)
108 #define AUDIFA_DACL_EN (0)
109 #define AUDIFA_ADCL_EN (1)
110 #define AUDIFA_DACR_EN (2)
111 #define AUDIFA_ADCR_EN (3)
112 #define AUDIFA_ADIE_LOOP_EN (5)
118 #define AUDIO_POP_IRQ (7)
121 #define PA_OCP_IRQ (4)
122 #define LOR_OCP_IRQ (3)
123 #define LOL_OCP_IRQ (2)
124 #define EAR_OCP_IRQ (1)
125 #define HP_OCP_IRQ (0)
136 #define MIC_LDO_V_21 (0)
137 #define MIC_LDO_V_19 (1)
138 #define MIC_LDO_V_23 (2)
139 #define MIC_LDO_V_25 (3)
142 #define PA_SW_EN (15)
143 #define PA_LDO_EN (14)
145 #define PAR_SW_EN (12)
146 #define PAR_LDO_EN (11)
150 #define HEADMICBIAS_EN (5)
151 #define MICBIAS_V (3)
152 #define MICBIAS_V_MASK (0x3)
153 #define MICBIAS_HV_EN (2)
154 #define HEADMIC_SLEEP_EN (1)
157 #define MICBIAS_EN (15)
158 #define AUXMICBIAS_EN (14)
160 #define VCM_V_MASK (0x7)
162 #define BG_I_MASK (0x3)
165 #define BG_IBIAS_EN (5)
167 #define VCM_BUF_EN (3)
168 #define ICM_PLUS_EN (2)
170 #define VCMI_FAST_EN (0)
173 #define PA_SWOCP_PD (15)
174 #define PA_LDOOCP_PD (14)
175 #define PA_LDO_V (11)
176 #define PA_LDO_V_MASK (0x7)
178 #define VCM_CAL_MASK (0x1F)
183 #define ADC_CLK_EN (7)
184 #define ADC_CLK_RST (6)
185 #define ADC_CLK_F (4)
186 #define ADC_CLK_F_MASK (0x3)
187 #define DAC_CLK_EN (3)
188 #define DAC_CLK_F (1)
189 #define DAC_CLK_F_MASK (0x3)
190 #define DRV_CLK_EN (0)
193 #define ADCPGAL_BYP (14)
194 #define ADCPGAL_BYP_MASK (0x3)
195 #define ADCPGAL_EN (12)
196 #define ADCPGAL_EN_MASK (0x3)
197 #define ADCPGAR_BYP (10)
198 #define ADCPGAR_BYP_MASK (0x3)
199 #define ADCPGAR_EN (8)
200 #define ADCPGAR_EN_MASK (0x3)
201 #define ADC_IBUF_PD (7)
202 #define ADC_VREF1P5 (6)
209 #define MIC_ADCR (15)
210 #define AUXMIC_ADCR (14)
211 #define HEADMIC_ADCR (13)
212 #define AIL_ADCR (12)
213 #define AIR_ADCR (11)
215 #define AUXMIC_ADCL (6)
216 #define HEADMIC_ADCL (5)
223 #define DACBUF_I_S (5)
236 #define DACL_EAR (15)
237 #define ADCL_P_HPL (7)
238 #define ADCR_P_HPL (6)
239 #define DACL_P_HPL (5)
240 #define DACR_P_HPL (4)
241 #define ADCL_N_HPR (3)
242 #define ADCR_P_HPR (2)
243 #define DACL_N_HPR (1)
244 #define DACR_P_HPR (0)
248 #define PA_DTRI_F (13)
249 #define PA_DTRI_F_MASK (0x03)
250 #define PA_DEMI_EN (12)
251 #define PA_SS_EN (11)
252 #define PA_SS_RST (10)
253 #define DRV_STOP_EN (9)
261 #define HP_VCMI_EN (1)
264 #define DRV_OCP_AOL_PD (7)
265 #define DRV_OCP_AOR_PD (6)
266 #define DRV_OCP_EAR_PD (5)
267 #define DRV_OCP_HP_PD (4)
270 #define AUD_NG_EN (7)
271 #define AUD_NG_DA_EN (6)
272 #define AUD_NG_PA_EN (5)
274 #define AUDIO_CHP_LPW (15)
275 #define AUDIO_CHP_MODE (14)
276 #define AUDIO_CHP_REF_EN (7)
277 #define AUDIO_CHP_EN (6)
278 #define AUDIO_CHP_HPL_EN (5)
279 #define AUDIO_CHP_HPR_EN (4)
280 #define AUDIO_CHP_LMUTE (3)
281 #define AUDIO_CHP_RMUTE (2)
282 #define AUDIO_CHP_OSC (0)
283 #define AUDIO_CHP_OSC_MASK (0x03)
286 #define HP_POP_CTL (6)
287 #define HP_POP_CTL_MASK (0x03)
288 #define HP_POP_CTL_DIS (0)
289 #define HP_POP_CTL_UP (1)
290 #define HP_POP_CTL_DOWN (2)
291 #define HP_POP_CTL_HOLD (3)
293 #define HP_POP_STEP (3)
294 #define HP_POP_STEP_MASK (0x07)
295 #define HP_POP_STEP_012 (0)
296 #define HP_POP_STEP_025 (1)
297 #define HP_POP_STEP_05 (2)
298 #define HP_POP_STEP_1 (3)
299 #define HP_POP_STEP_2 (4)
300 #define HP_POP_STEP_4 (5)
301 #define HP_POP_STEP_8 (6)
302 #define HP_POP_STEP_16 (7)
305 #define HP_POP_FLG (4)
306 #define HP_POP_FLG_MASK (0x03)
307 #define HP_POP_FLG_NEAR_CMP (3)
309 #define SPRD_CODEC_DP_BASE (CODEC_DP_BASE)
311 #define AUD_TOP_CTL (SPRD_CODEC_DP_BASE + 0x0000)
312 #define AUD_AUD_CTR (SPRD_CODEC_DP_BASE + 0x0004)
313 #define AUD_I2S_CTL (SPRD_CODEC_DP_BASE + 0x0008)
314 #define AUD_DAC_CTL (SPRD_CODEC_DP_BASE + 0x000C)
315 #define AUD_SDM_CTL0 (SPRD_CODEC_DP_BASE + 0x0010)
316 #define AUD_SDM_CTL1 (SPRD_CODEC_DP_BASE + 0x0014)
317 #define AUD_ADC_CTL (SPRD_CODEC_DP_BASE + 0x0018)
318 #define AUD_LOOP_CTL (SPRD_CODEC_DP_BASE + 0x001C)
319 #define AUD_AUD_STS0 (SPRD_CODEC_DP_BASE + 0x0020)
320 #define AUD_INT_CLR (SPRD_CODEC_DP_BASE + 0x0024)
321 #define AUD_INT_EN (SPRD_CODEC_DP_BASE + 0x0028)
323 #define AUD_DMIC_CTL (SPRD_CODEC_DP_BASE + 0x0030)
324 #define AUD_ADC1_I2S_CTL (SPRD_CODEC_DP_BASE + 0x0034)
325 #define SPRD_CODEC_DP_END (SPRD_CODEC_DP_BASE + 0x0034)
327 #define IS_SPRD_CODEC_DP_RANG(reg) (((reg) >= SPRD_CODEC_DP_BASE) && ((reg) < SPRD_CODEC_DP_END))
329 #define SPRD_CODEC_AP_BASE (CODEC_AP_BASE)
331 #define AUDIF_ENB (SPRD_CODEC_AP_BASE + 0x0000)
332 #define AUDIF_OCP_OTP_TMR_CTL (SPRD_CODEC_AP_BASE + 0x0004)
333 #define AUDIF_OVPTMR_SHUTDOWN_CTL (SPRD_CODEC_AP_BASE + 0x0008)
334 #define AUDIF_INT_CLR (SPRD_CODEC_AP_BASE + 0x000C)
335 #define AUDIF_INT_EN (SPRD_CODEC_AP_BASE + 0x0010)
336 #define AUDIF_INT_RAW (SPRD_CODEC_AP_BASE + 0x0014)
337 #define AUDIF_INT_MASK (SPRD_CODEC_AP_BASE + 0x0018)
338 /* 0x001C ~ 0x003C is reserved for ADIE digital part */
340 #define PMUR2_PMUR1 (SPRD_CODEC_AP_BASE + 0x0040)
341 #define PMUR4_PMUR3 (SPRD_CODEC_AP_BASE + 0x0044)
342 #define PMUR6_PMUR5 (SPRD_CODEC_AP_BASE + 0x0048)
343 #define PMUR8_PMUR7 (SPRD_CODEC_AP_BASE + 0x004C)
344 /* 0x0050 ~ 0x005C is reserved for analog power part */
346 #define CCR (SPRD_CODEC_AP_BASE + 0x0060)
347 #define AACR2_AACR1 (SPRD_CODEC_AP_BASE + 0x0064)
348 #define AAICR2_AAICR1 (SPRD_CODEC_AP_BASE + 0x0068)
349 #define ACGR1 (SPRD_CODEC_AP_BASE + 0x006C)
350 #define ACGR3_ACGR2 (SPRD_CODEC_AP_BASE + 0x0070)
352 #define DACGR_DACR (SPRD_CODEC_AP_BASE + 0x0074)
353 #define DAOCR2 (SPRD_CODEC_AP_BASE + 0x0078)
354 #define DAOCR3_DAOCR1 (SPRD_CODEC_AP_BASE + 0x007C)
355 #define DCR2_DCR1 (SPRD_CODEC_AP_BASE + 0x0080)
356 #define DCR4_DCR3 (SPRD_CODEC_AP_BASE + 0x0084)
357 #define DCR6_DCR5 (SPRD_CODEC_AP_BASE + 0x0088)
358 #define DCR8_DCR7 (SPRD_CODEC_AP_BASE + 0x008C)
359 #define DCGR2_DCGR1 (SPRD_CODEC_AP_BASE + 0x0090)
360 #define DCGR3 (SPRD_CODEC_AP_BASE + 0x0094)
362 #define PNRCR2_PNRCR1 (SPRD_CODEC_AP_BASE + 0x0098)
363 #define PNRCR3 (SPRD_CODEC_AP_BASE + 0x009C)
365 #define HIBDR2_HIBDR1 (SPRD_CODEC_AP_BASE + 0x00A0)
366 #define HIBDR3 (SPRD_CODEC_AP_BASE + 0x00A4)
367 /* 0x00A8 ~ 0x00BC is reserved */
369 #define IFR2_IFR1 (SPRD_CODEC_AP_BASE + 0x00C0)
370 #define AUD_DANGL (SPRD_CODEC_AP_BASE + 0x00C4)
371 #define AUD_DANGR (SPRD_CODEC_AP_BASE + 0x00C8)
372 /* 0x00C4 ~ 0x00C8 is reserved */
373 #define IFR4_IFR3 (SPRD_CODEC_AP_BASE + 0x00CC)
374 /* 0x00D0 ~ 0x00D8 is reserved */
376 #define SPRD_CODEC_AP_END (SPRD_CODEC_AP_BASE + 0x00CC)
377 #define IS_SPRD_CODEC_AP_RANG(reg) (((reg) >= SPRD_CODEC_AP_BASE) && ((reg) < SPRD_CODEC_AP_END))
379 #define SPRD_CODEC_IIS1_ID 1
381 #define ID_FUN(id, lr) ((int)(((id) << 1) | (lr)))
384 SPRD_CODEC_PGA_SPKL = 0,
394 SPRD_CODEC_PGA_AUXMIC,
395 SPRD_CODEC_PGA_HEADMIC,
404 SPRD_CODEC_RIGHT = 1,
408 SPRD_CODEC_MIXER_START = 0,
409 SPRD_CODEC_AIL = SPRD_CODEC_MIXER_START,
414 SPRD_CODEC_ADC_MIXER_MAX,
415 SPRD_CODEC_HP_DACL = SPRD_CODEC_ADC_MIXER_MAX,
419 SPRD_CODEC_HP_MIXER_MAX,
420 SPRD_CODEC_SPK_DACL = SPRD_CODEC_HP_MIXER_MAX,
424 SPRD_CODEC_SPK_MIXER_MAX,
425 SPRD_CODEC_EAR_DACL = SPRD_CODEC_SPK_MIXER_MAX,
426 SPRD_CODEC_EAR_MIXER_MAX,
428 SPRD_CODEC_MIXER_MAX = SPRD_CODEC_EAR_MIXER_MAX << SPRD_CODEC_RIGHT
433 SPRD_CODEC_AUXMIC_BIAS,
434 SPRD_CODEC_HEADMIC_BIAS,
435 SPRD_CODEC_MIC_BIAS_MAX
438 int sprd_codec_init(void);
439 void sprd_codec_exit(void);
440 int sprd_codec_pcm_set_sample_rate(int playback, int rate);
441 int sprd_codec_digital_loop(int enable);
443 int mixer_get(int id);
444 int mixer_set(int id, int on);
445 int mixer_enable(int id, int enable);
446 int pga_enable(int id, int pgaval, int enable);
447 int hp_switch(int enable);
448 int ear_switch(int enable);
449 int spkl_switch(int enable);
450 int spkr_switch(int enable);
451 int dacl_digital_switch(int enable);
452 int dacr_digital_switch(int enable);
454 int adcl_digital_switch(int enable);
455 int adcr_digital_switch(int enable);
456 int adcl_switch(int enable);
457 int adcr_switch(int enable);
458 int mic_bias_enable(int id, int enable);
460 int sprd_inter_speaker_pa(int on);
462 #endif /* __SPRD_CODEC_V3_H */