board/spreadtrum/sp7715eaopenphone/pinmap.c

   1 /*
   2  * This file is produced by tools!!
   3  *
   4  * Copyright (C) 2012 Spreadtrum Communications Inc.
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <asm/io.h>
  17 #include <asm/arch/pinmap.h>
  18
  19 #define PIN_NULL    0
  20
  21
  22 struct other_pin_ctr_reg {
  23     uint32_t reg;               /*pin register offset*/
  24
  25
  26     uint32_t wpus:1;            /*[12] pull up resistor select*/
  27                                 #define PIN_WPUS    1
  28
  29     uint32_t func_sel:2;        /*[5:4]function select.*/
  30                                 /*value of .func_sel*/
  31                                 #define FUNC0       0   /*function0*/
  32                                 #define FUNC1       1   /*function1*/
  33                                 #define FUNC2       2   /*function2*/
  34                                 #define FUNC3       3   /*function3*/
  35
  36     uint32_t func_wpu_wpd:2;    /*[7:6] weakly pull up/down for function mode*/
  37                                 /*value of .func_wpu_wpd*/
  38                                 #define FUNC_WPU        (1<<1)       /*weakly pull up for function mode*/
  39                                 #define FUNC_WPD        (1<<0)       /*weakly pull down for function mode*/
  40
  41     uint32_t slp_wpu_wpd:2;     /*[3:2]weak pull up/down for chip deep sleep mode*/
  42                                 /*value of .slp_wpu_wpd*/
  43                                 #define SLP_WPU     (1<<1) /*weakly pull up for chip deep sleep mode*/
  44                                 #define SLP_WPD     (1<<0) /*weakly pull down for chip deep sleep mode*/
  45
  46     uint32_t drv:3;             /*[10:8] driver strength select.*/
  47                                 /*value of .drv*/
  48                                 #define DS_L0       0
  49                                 #define DS_L1       1
  50                                 #define DS_L2       2
  51                                 #define DS_L3       3
  52                                 #define DS_L4       4
  53                                 #define DS_L5       5
  54                                 #define DS_L6       6
  55                                 #define DS_L7       7
  56
  57     uint32_t ie_oe:2;           /*[1:0]input/output enable for chip deep sleep mode*/
  58                                 /*value of .ie_oe*/
  59                                 #define SLP_IE      (1<<1) /* input enable for chip deep sleep mode*/
  60                                 #define SLP_OE      (1<<0) /*output enable for chip deep sleep mode*/
  61
  62     uint32_t se:1;              /*[11] schmitt trigger input enalbe*/
  63                                 #define PIN_SCHMITT 1
  64
  65     uint32_t slp_en:4;          /*[16:13] sleep mode bit map: SLP_AP|SLP_CP0|SLP_CP1|SLP_CP2 */
  66                                 #define SLP_AP      BIT_0   /* sleep with AP*/
  67                                 #define SLP_CP0     BIT_1   /* sleep with CP0*/
  68                                 #define SLP_CP1     BIT_2   /* sleep with CP1*/
  69                                 #define SLP_CP2     BIT_3   /* sleep with CP2*/
  70 };
  71
  72
  73 struct other_pin_ctr_reg other[] = {
  74 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
  75 {REG_PIN_U0TXD,             PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2|SLP_AP},
  76 {REG_PIN_U0RXD,             PIN_NULL,   FUNC1,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2|SLP_AP},
  77 {REG_PIN_U0CTS,             PIN_NULL,   FUNC1,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2|SLP_AP},
  78 {REG_PIN_U0RTS,             PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
  79 {REG_PIN_U1TXD,             PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
  80 {REG_PIN_U1RXD,             PIN_NULL,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
  81 {REG_PIN_U2TXD,             PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
  82 {REG_PIN_U2RXD,             PIN_NULL,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
  83 {REG_PIN_U2CTS,             PIN_NULL,   FUNC3,   FUNC_WPD,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
  84
  85 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
  86 {REG_PIN_U2RTS,             PIN_NULL,   FUNC3,   FUNC_WPD,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
  87 {REG_PIN_CP2_RFCTL0,        PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2},
  88 {REG_PIN_CP2_RFCTL1,        PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2},
  89 {REG_PIN_RFSDA0,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  90 {REG_PIN_RFSCK0,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  91 {REG_PIN_RFSEN0,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  92 {REG_PIN_CP_RFCTL0,         PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  93 {REG_PIN_CP_RFCTL1,         PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  94 {REG_PIN_CP_RFCTL2,         PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  95 {REG_PIN_CP_RFCTL3,         PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  96
  97 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
  98 {REG_PIN_CP_RFCTL4,         PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
  99 {REG_PIN_CP_RFCTL5,         PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 100 {REG_PIN_CP_RFCTL6,         PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 101 {REG_PIN_CP_RFCTL7,         PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 102 {REG_PIN_CP_RFCTL8,         PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 103 {REG_PIN_CP_RFCTL9,         PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 104 {REG_PIN_CP_RFCTL10,        PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
 105 {REG_PIN_CP_RFCTL11,        PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 106 {REG_PIN_CP_RFCTL12,        PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
 107 {REG_PIN_CP_RFCTL13,        PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
 108
 109 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 110 {REG_PIN_CP_RFCTL14,        PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP0},
 111 {REG_PIN_CP_RFCTL15,        PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 112 {REG_PIN_XTLEN,             PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 113 {REG_PIN_SPI0_CSN,          PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 114 {REG_PIN_SPI0_DO,           PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 115 {REG_PIN_SPI0_DI,           PIN_NULL,   FUNC3,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 116 {REG_PIN_SPI0_CLK,          PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 117 {REG_PIN_EXTINT0,           PIN_NULL,   FUNC3,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 118 {REG_PIN_EXTINT1,           PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 119 {REG_PIN_SCL1,              PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 120
 121 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 122 {REG_PIN_SDA1,              PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 123 {REG_PIN_SIMCLK0,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP0},
 124 {REG_PIN_SIMDA0,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_CP0},
 125 {REG_PIN_SIMRST0,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP0},
 126 {REG_PIN_SIMCLK1,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP0},
 127 {REG_PIN_SIMDA1,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_CP0},
 128 {REG_PIN_SIMRST1,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP0},
 129 {REG_PIN_SIMCLK2,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP0},
 130 {REG_PIN_SIMDA2,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_CP0},
 131 {REG_PIN_SIMRST2,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP0},
 132
 133 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 134 {REG_PIN_SD1_CLK,           PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L2,    PIN_NULL,        PIN_NULL,      SLP_CP2},
 135 {REG_PIN_SD1_CMD,           PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2},
 136 {REG_PIN_SD1_D0,            PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2},
 137 {REG_PIN_SD1_D1,            PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 138 {REG_PIN_SD1_D2,            PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 139 {REG_PIN_SD1_D3,            PIN_NULL,   FUNC3,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 140 {REG_PIN_SD0_D3,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 141 {REG_PIN_SD0_D2,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 142 {REG_PIN_SD0_CMD,           PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 143 {REG_PIN_SD0_D0,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 144
 145 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 146 {REG_PIN_SD0_D1,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 147 {REG_PIN_SD0_CLK0,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L2,    PIN_NULL,        PIN_NULL,      SLP_AP},
 148 {REG_PIN_LCD_CSN1,          PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 149 {REG_PIN_LCD_CSN0,          PIN_NULL,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 150 {REG_PIN_LCD_RSTN,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 151 {REG_PIN_LCD_CD,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 152 {REG_PIN_LCD_FMARK,         PIN_NULL,   FUNC0,   FUNC_WPD,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 153 {REG_PIN_LCD_WRN,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 154 {REG_PIN_LCD_RDN,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 155 {REG_PIN_LCD_D0,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 156
 157 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 158 {REG_PIN_LCD_D1,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 159 {REG_PIN_LCD_D2,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 160 {REG_PIN_LCD_D3,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 161 {REG_PIN_LCD_D4,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 162 {REG_PIN_LCD_D5,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 163 {REG_PIN_LCD_D6,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 164 {REG_PIN_LCD_D7,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 165 {REG_PIN_LCD_D8,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 166 {REG_PIN_LCD_D9,            PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 167 {REG_PIN_LCD_D10,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 168
 169 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 170 {REG_PIN_LCD_D11,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 171 {REG_PIN_LCD_D12,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 172 {REG_PIN_LCD_D13,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 173 {REG_PIN_LCD_D14,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 174 {REG_PIN_LCD_D15,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 175 {REG_PIN_LCD_D16,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 176 {REG_PIN_LCD_D17,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 177 {REG_PIN_LCD_D18,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 178 {REG_PIN_LCD_D19,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 179 {REG_PIN_LCD_D20,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 180
 181 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 182 {REG_PIN_LCD_D21,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 183 {REG_PIN_LCD_D22,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 184 {REG_PIN_LCD_D23,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 185 {REG_PIN_SPI2_CSN,          PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 186 {REG_PIN_SPI2_DO,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 187 {REG_PIN_SPI2_DI,           PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 188 {REG_PIN_SPI2_CLK,          PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 189 {REG_PIN_CP2_RFCTL2,        PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2},
 190 {REG_PIN_NFWPN,             PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 191 {REG_PIN_NFRB,              PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 192
 193 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 194 {REG_PIN_NFCLE,             PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 195 {REG_PIN_NFALE,             PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 196 {REG_PIN_NFCEN0,            PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 197 {REG_PIN_NFCEN1,            PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 198 {REG_PIN_NFREN,             PIN_NULL,   FUNC1,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 199 {REG_PIN_NFWEN,             PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 200 {REG_PIN_NFD0,              PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 201 {REG_PIN_NFD1,              PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 202 {REG_PIN_NFD2,              PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 203 {REG_PIN_NFD3,              PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 204
 205 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 206 {REG_PIN_NFD4,              PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 207 {REG_PIN_NFD5,              PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 208 {REG_PIN_NFD6,              PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 209 {REG_PIN_NFD7,              PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 210 {REG_PIN_NFD8,              PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 211 {REG_PIN_NFD9,              PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 212 {REG_PIN_NFD10,             PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 213 {REG_PIN_NFD11,             PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 214 {REG_PIN_NFD12,             PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 215 {REG_PIN_NFD13,             PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 216
 217 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 218 {REG_PIN_NFD14,             PIN_WPUS,   FUNC1,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 219 {REG_PIN_NFD15,             PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 220 {REG_PIN_CCIRCK0,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 221 {REG_PIN_CCIRCK1,           PIN_NULL,   FUNC0,   FUNC_WPD,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 222 {REG_PIN_CCIRMCLK,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 223 {REG_PIN_CCIRHS,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 224 {REG_PIN_CCIRVS,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 225 {REG_PIN_CCIRD0,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 226 {REG_PIN_CCIRD1,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 227 {REG_PIN_CCIRD2,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 228
 229 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 230 {REG_PIN_CCIRD3,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 231 {REG_PIN_CCIRD4,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 232 {REG_PIN_CCIRD5,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 233 {REG_PIN_CCIRD6,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 234 {REG_PIN_CCIRD7,            PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 235 {REG_PIN_CCIRRST,           PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 236 {REG_PIN_CCIRPD1,           PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 237 {REG_PIN_CCIRPD0,           PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 238 {REG_PIN_SCL0,              PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 239 {REG_PIN_SDA0,              PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 240
 241 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 242 {REG_PIN_KEYOUT0,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 243 {REG_PIN_KEYOUT1,           PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 244 {REG_PIN_KEYOUT2,           PIN_NULL,   FUNC3,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2},
 245 {REG_PIN_KEYIN0,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 246 {REG_PIN_KEYIN1,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 247 {REG_PIN_KEYIN2,            PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 248 {REG_PIN_SCL2,              PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 249 {REG_PIN_SDA2,              PIN_WPUS,   FUNC0,   FUNC_WPU,    SLP_WPU,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 250 {REG_PIN_CLK_AUX0,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 251 {REG_PIN_IIS0DI,            PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 252
 253 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 254 {REG_PIN_IIS0DO,            PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 255 {REG_PIN_IIS0CLK,           PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2},
 256 {REG_PIN_IIS0LRCK,          PIN_NULL,   FUNC2,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_CP2},
 257 {REG_PIN_IIS0MCK,           PIN_NULL,   FUNC3,   FUNC_WPD,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 258 {REG_PIN_MTDO,              PIN_NULL,   FUNC0,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 259 {REG_PIN_MTDI,              PIN_NULL,   FUNC0,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 260 {REG_PIN_MTCK,              PIN_NULL,   FUNC0,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 261 {REG_PIN_MTMS,              PIN_NULL,   FUNC0,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 262 {REG_PIN_MTRST_N,           PIN_NULL,   FUNC0,   FUNC_WPU,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 263 {REG_PIN_TRACECLK,          PIN_NULL,   FUNC3,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 264
 265 /*    reg                  |pin pull up|function|func pull up|sleep pull up|drv level|sleep i/o enable|schmitt enable|sleep enable */
 266 {REG_PIN_TRACECTRL,         PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 267 {REG_PIN_TRACEDAT0,         PIN_NULL,   FUNC3,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_AP},
 268 {REG_PIN_TRACEDAT1,         PIN_NULL,   FUNC3,   FUNC_WPD,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 269 {REG_PIN_TRACEDAT2,         PIN_NULL,   FUNC1,   FUNC_WPD,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 270 {REG_PIN_TRACEDAT3,         PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 271 {REG_PIN_TRACEDAT4,         PIN_NULL,   FUNC3,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 272 {REG_PIN_TRACEDAT5,         PIN_NULL,   FUNC3,   FUNC_WPU,    SLP_WPU,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 273 {REG_PIN_TRACEDAT6,         PIN_NULL,   FUNC3,   FUNC_WPD,    SLP_WPD,      DS_L1,    SLP_IE,          PIN_NULL,      SLP_AP},
 274 {REG_PIN_TRACEDAT7,         PIN_NULL,   FUNC3,   PIN_NULL,    SLP_WPD,      DS_L1,    PIN_NULL,        PIN_NULL,      SLP_AP},
 275
 276 /* MUST config AUD pin to SLP_OE/SLP_IE */
 277 {REG_PIN_AUD_SCLK,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 278 //{REG_PIN_AUD_DANGL,         PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 279 //{REG_PIN_AUD_DANGR,         PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 280 {REG_PIN_AUD_ADD0,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_IE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 281 {REG_PIN_AUD_ADSYNC,        PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_IE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 282 {REG_PIN_AUD_DAD1,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 283 {REG_PIN_AUD_DAD0,          PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 284 {REG_PIN_AUD_DASYNC,        PIN_NULL,   FUNC0,   PIN_NULL,    PIN_NULL,     DS_L1,    SLP_OE,          PIN_NULL,      SLP_CP2|SLP_CP1|SLP_CP0|SLP_AP},
 285
 286 };
 287
 288
 289 extern void pinctrl_init(void);
 290
 291 int  pin_init(void)
 292 {
 293     int i;
 294     uint32_t v;
 295
 296     /*ctrl pin init*/
 297     pinctrl_init();
 298
 299     /*other pin init*/
 300     for (i = 0; i < sizeof(other)/sizeof(other[0]); i++) {
 301         v  = ((other[i].slp_en & 0xF)    << 13); /*[16:13]*/
 302         v |= ((other[i].wpus & 1)        << 12); /*[12]*/
 303         v |= ((other[i].se & 1)          << 11); /*[11]e*/
 304         v |= ((other[i].drv & 7)         << 8);  /*[10:8]*/
 305         v |= ((other[i].func_wpu_wpd & 3)<< 6);  /*[7:6]*/
 306         v |= ((other[i].func_sel & 3)    << 4);  /*[5:4]*/
 307         v |= ((other[i].slp_wpu_wpd & 3) << 2);  /*[3:2]*/
 308         v |= ((other[i].ie_oe & 3)       << 0);  /*[1:0]*/
 309
 310         __raw_writel(v, CTL_PIN_BASE + other[i].reg);
 311     }
 312
 313     return 0;
 314 }
 315