3 #include <asm/arch/ldo.h>
4 #include <asm/arch/sc8810_reg_ahb.h>
5 #include <asm/arch/regs_ahb.h>
6 #include <asm/arch/common.h>
7 #include <asm/arch/adi_hal_internal.h>
8 #include <asm/u-boot.h>
11 #include <asm/arch/mfp.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 #define PIN_REG_SIMDA3 (0x8C000470)
16 #define PIN_REG_SIMRST3 (0x8C000478)
17 #define PIN_CTRL_REG (0x8b000028)
19 extern void sprd_gpio_init(void);
20 extern void ADI_init (void);
21 extern int LDO_Init(void);
23 #define mdelay(n) udelay((n) * 1000)
25 void modem_poweron(void)
29 __raw_writel(0x31,0x8C0003b8);
30 gpio_direction_output(106,1);
31 gpio_set_value(106,1);
33 void modem_poweroff(void)
36 __raw_writel(0x31,0x8C0003b8);
37 gpio_direction_output(106,1);
38 gpio_set_value(106,0);
40 /*Modem download pin,set to high,Modem can not enter downnload mode*/
41 __raw_writel(0x31,0x8C000114);
42 gpio_direction_output(34,1);
46 void Init_7702_modem(void)
49 __raw_writel(0x31,0x8C0003b8);
50 gpio_direction_output(106,1);
51 gpio_set_value(106,0);
52 /*Modem AP_CP Rst pin set to low (default)*/
53 __raw_writel(0x31,0x8C000124);
54 gpio_direction_output(38,1);
58 /*Modem download pin,set to high,Modem can not enter downnload mode*/
59 __raw_writel(0x31,0x8C000114);
60 gpio_direction_output(34,1);
63 __raw_writel(0x176, 0x8C000380);
64 gpio_direction_output(CP_AP_LIV, 0);
65 //gpio_set_value(CP_AP_LIV, 0);
67 #if 0 //not used in flashless mode.only do powerdown.
69 __raw_writel(0x31,0x8C0003b8);
70 gpio_direction_output(106,1);
71 gpio_set_value(106,1);
76 void init_calibration_gpio(void)
78 __raw_writel(0x131, 0x8C000124);
79 gpio_direction_output(AP_CP_RTS, 1);
80 gpio_set_value(AP_CP_RTS, 0);
82 __raw_writel(0x174, 0x8C000120);
83 gpio_direction_output(CP_AP_RDY, 0);
84 //gpio_set_value(CP_AP_RDY, 0);
86 __raw_writel(0x1BA, 0x8C00039c);
87 gpio_direction_output(CP_AP_RTS, 0);
88 //gpio_set_value(CP_AP_RTS, 0);
90 __raw_writel(0x130, 0x8C0000d4);
91 gpio_direction_output(AP_CP_RDY, 1);
92 gpio_set_value(AP_CP_RDY, 1);
94 __raw_writel(0x176, 0x8C000380);
95 gpio_direction_output(CP_AP_LIV, 0);
96 //gpio_set_value(CP_AP_LIV, 0);
99 void init_calibration_mode(void)
101 *(volatile unsigned long *)PIN_REG_SIMDA3 |= 0x000003a0;
102 *(volatile unsigned long *)PIN_REG_SIMRST3 |= 0x000003a0;
103 *(volatile unsigned long *)PIN_CTRL_REG |= 0x00000040;
105 init_calibration_gpio();
108 #define PIN_CTL_REG 0x8C000000
109 static void chip_init(void)
111 //ANA_REG_SET(ANA_ADIE_CHIP_ID,0);
112 /* setup pins configration when LDO shutdown*/
113 //__raw_writel(0x1fff00, PIN_CTL_REG);
114 *(volatile unsigned int *)PIN_CTL_REG = 0x1fff00;
117 #if 0 //CONFIG_GENERIC_MMC
118 static unsigned long sdio_func_cfg[] = {
119 MFP_CFG_X(SD0_CLK, AF0, DS3, F_PULL_NONE, S_PULL_NONE, IO_Z),
120 MFP_CFG_X(SD_CMD, AF0, DS0, F_PULL_UP, S_PULL_NONE, IO_Z),
121 MFP_CFG_X(SD_D0, AF0, DS0, F_PULL_UP, S_PULL_NONE, IO_Z),
122 MFP_CFG_X(SD_D1, AF0, DS0, F_PULL_DOWN, S_PULL_NONE, IO_Z),
123 MFP_CFG_X(SD_D2, AF0, DS0, F_PULL_DOWN, S_PULL_NONE, IO_Z),
124 MFP_CFG_X(SD_D3, AF0, DS0, F_PULL_DOWN, S_PULL_NONE, IO_Z),
127 static unsigned long sdcard_detect_gpio_cfg =
128 MFP_CFG_X(RFCTL11, AF3, DS1, F_PULL_UP,S_PULL_NONE, IO_Z);
130 void sprd_config_sdio_pins(void)
132 sprd_mfp_config(sdio_func_cfg, ARRAY_SIZE(sdio_func_cfg));
133 sprd_mfp_config(&sdcard_detect_gpio_cfg, 1);
135 int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks);
136 int board_mmc_init(bd_t *bd)
138 ulong mmc_base_address[CONFIG_SYS_MMC_NUM] = CONFIG_SYS_MMC_BASE;
141 REG32(AHB_CTL0) |= BIT_4;
142 REG32(AHB_SOFT_RST) |= BIT_12;
143 REG32(AHB_SOFT_RST) &= ~BIT_12;
144 LDO_SetVoltLevel(LDO_LDO_SDIO0, LDO_VOLT_LEVEL1);
145 LDO_TurnOnLDO(LDO_LDO_SDIO0);
146 sprd_config_sdio_pins();
148 for (i = 0; i < CONFIG_SYS_MMC_NUM; i++) {
149 if (mv_sdh_init(mmc_base_address[i], SDIO_BASE_CLK_96M,
160 gd->bd->bi_arch_number = MACH_TYPE_OPENPHONE;
161 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
174 gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,