arch/arm/include/asm/arch-tiger/deep_sleep_cfg.h

   1 /******************************************************************************
   2  ** File Name:      deep_sleep_cfg.h                                             *
   3  ** Author:         jiexia.yu                                                 *
   4  ** DATE:           07/09/2007                                                *
   5  ** Copyright:      2007 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file defines the basic function for ldo management.  *
   7  ******************************************************************************/
   8
   9 /******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 07/09/2007     jiexia.yu        Create.                                   *
  14  ******************************************************************************/
  15 #ifndef _DEEP_SLEEP_CFG_H_
  16 #define _DEEP_SLEEP_CFG_H_
  17
  18 /**---------------------------------------------------------------------------*
  19  **                         Dependencies                                      *
  20  **---------------------------------------------------------------------------*/
  21
  22
  23 /**---------------------------------------------------------------------------*
  24  **                         Compiler Flag                                     *
  25  **---------------------------------------------------------------------------*/
  26 #ifdef __cplusplus
  27 extern   "C"
  28 {
  29 #endif
  30
  31 /**---------------------------------------------------------------------------*
  32  **                         Defines                                           *
  33  **---------------------------------------------------------------------------*/
  34
  35 typedef void (*SLP_ENTER_FUNC) (uint8 slp_type);
  36
  37 typedef enum
  38 {
  39     SLP_CFG_NULL  = 0,  //id for NULL
  40     SLP_CFG_COM,
  41     SLP_CFG_DIF,
  42     SLP_CFG_MAX
  43 } SLP_CFG_TYPE_E;
  44
  45 typedef enum
  46 {
  47     SLP_AHB_NULL = 0,   //id for NULL
  48     SLP_AHB_DCAM,       //id for AHB device dcam
  49     SLP_AHB_USBD,       //id for AHB device usbd
  50     SLP_AHB_EMC,        //id for AHB device emc
  51     SLP_AHB_DMA,        //id for AHB device dma
  52     SLP_AHB_BUS,        //id for AHB device bus
  53     SLP_AHB_DEV_MAX
  54 } SLP_AHB_DEV_E;
  55
  56 typedef enum
  57 {
  58     SLP_APB_NULL = 0,   //id for NULL
  59     SLP_APB_WDG,        //id for APB device watchdog
  60     SLP_APB_ADC,        //id for APB device adc
  61     SLP_APB_TMR,        //id for APB device timer
  62     SLP_APB_SIM,        //id for APB device sim
  63     SLP_APB_I2C,        //id for APB device i2c
  64     SLP_APB_TPC,        //id for APB device tpc
  65     SLP_APB_PWM,        //id for APB device pwm
  66     SLP_APB_KPD,        //id for APB device keypad
  67     SLP_APB_GPIO,       //id for APB device gpio
  68     SLP_APB_GEA,        //id for APB device gea
  69     SLP_APB_SYSTMR,     //id for APB device sys timer
  70     SLP_APB_UART0,      //id for APB device uart0
  71     SLP_APB_UART1,      //id for APB device uart1
  72     SLP_APB_SPI0,       //id for APB device spi0
  73     SLP_APB_IIS,        //id for APB device iis
  74     SLP_APB_SPI1,       //id for APB device spi1
  75     SLP_APB_PIN,        //id for APB device pin
  76     SLP_APB_DEV_MAX
  77 } SLP_APB_DEV_E;
  78
  79
  80 typedef enum
  81 {
  82     SLP_CTL_NULL = 0,               //id for NULL
  83     SLP_CTRL_MCU_FORCE_STOP,    //id for arm and ahb ctrl
  84     SLP_CTRL_MCU_DMA_WAKEUP_EN,  //id for dma wake up ctrl
  85     SLP_CTRL_MCU_SYS_SLEEP_EN,  //id for sys  sleep ctrl
  86     SLP_CTRL_MCU_DEEP_SLEEP_EN, //id for deep sleep ctrl
  87     SLP_CTRL_APB_STOP,          //id for APB  sleep ctrl
  88     SLP_CTRL_APB_FORCE_ON,      //id for APB  sleep ctrl
  89     SLP_CTRL_APB_FORCE_SLEEP,   //id for APB  sleep ctrl
  90     SLP_CTRL_XTLEN,             //id for xtlen sleep ctrl
  91     SLP_CTRL_DMA_SLEEP_MOD,     //id for dma sleep mode ctrl
  92     SLP_CTRL_MCU_PLL_EN,    //id for mcu pll enable
  93     SLP_CTRL_XTL_ON_SLP,
  94     SLP_CTRL_MAX
  95 } SLP_BIT_CTL_E;
  96
  97 typedef enum
  98 {
  99     AHB_CAN_SLP_APB_CAN_SLP,
 100     AHB_CAN_SLP_APB_NO_SLP,
 101     AHB_NO_SLP_APB_CAN_SLP,
 102     AHB_NO_SLP_APB_NO_SLP,
 103     SLP_TYPE_MAX
 104 } SLP_TYPE_E;
 105
 106 typedef enum
 107 {
 108     AHB_COULD_SLEEP,
 109     AHB_NO_SLEEP
 110 } SLP_AHB_TYPE_E;
 111
 112 typedef enum
 113 {
 114     APB_COULD_SLEEP,
 115     APB_NO_SLEEP
 116 } SLP_APB_TYPE_E;
 117
 118 typedef enum
 119 {
 120     SLP_BIT_CLR = 0,
 121     SLP_BIT_SET
 122 } SLP_BIT_DEF_E;
 123
 124 typedef struct
 125 {
 126     SLP_AHB_DEV_E  id;
 127     uint32         ahb_dev_reg;
 128     uint32         mask;
 129     SLP_BIT_DEF_E  value;
 130     BOOLEAN        valid;
 131     uint32         reserved;
 132 } SLP_AHB_CTL_T, * SLP_AHB_CTL_PTR;
 133
 134 typedef struct
 135 {
 136     SLP_APB_DEV_E  id;
 137     uint32         apb_dev_reg;
 138     uint32         mask;
 139     SLP_BIT_DEF_E  value;
 140     BOOLEAN        valid;
 141     uint32         reserved;
 142 } SLP_APB_CTL_T, * SLP_APB_CTL_PTR;
 143
 144 typedef struct
 145 {
 146     SLP_BIT_CTL_E  id;
 147     uint32         slp_bit_reg;
 148     uint32         mask;
 149     SLP_BIT_DEF_E  value;
 150     BOOLEAN        valid;
 151     uint32         reserved;
 152 } SLP_BIT_CTL_T, * SLP_BIT_CTL_PTR;
 153
 154 typedef struct
 155 {
 156     SLP_AHB_CTL_T  ahb_ctrl[SLP_AHB_DEV_MAX];
 157     SLP_APB_CTL_T  apb_ctrl[SLP_APB_DEV_MAX];
 158     SLP_BIT_CTL_T  slp_bit_ctrl[SLP_CTRL_MAX];
 159     SLP_ENTER_FUNC slp_handler;
 160 } SLP_COM_CTL_T, *SLPCOMCTL_PTR;
 161
 162 typedef struct
 163 {
 164     SLP_COM_CTL_T  slp_com_cfg;
 165 } SLP_CTL_T, * SLPCTL_PTR;
 166
 167 typedef struct
 168 {
 169     CHIP_TYPE_E    chip_type;
 170     SLPCTL_PTR     sleep_ctl;
 171 } SLP_CFG_T, * SLP_CFG_PTR;
 172
 173 /*****************************************************************************/
 174 //  Function name:  Slp_Get_Cfg
 175 //  Description  :  this function get sleep table entry according to chip type
 176 //  Global resource dependence:
 177 //  Author:
 178 //  Note:
 179 /*****************************************************************************/
 180 PUBLIC SLPCTL_PTR Slp_Get_Cfg (void);
 181 /*****************************************************************************/
 182 //  Function name:  Slp_Get_Apb_Status
 183 //  Description  :  this function get chip sleep status according ahb and apb
 184 //  bus status
 185 //  Global resource dependence:
 186 //  Author:
 187 //  Note:
 188 /*****************************************************************************/
 189 PUBLIC SLP_TYPE_E  Slp_Get_Slp_Status (void);
 190 /*****************************************************************************/
 191 //  Function name:  Slp_Reg_Cfg
 192 //  Description  :  this function config the regs according different sleep status
 193 //  bus status
 194 //  Global resource dependence:
 195 //  Author:
 196 //  Note:
 197 /*****************************************************************************/
 198 PUBLIC void Slp_Reg_Cfg (SLP_TYPE_E slp_type,SLP_CFG_TYPE_E cfg_type);
 199
 200 PUBLIC int     tx_enter_deep_sleep (uint32 level);
 201
 202 /**---------------------------------------------------------------------------*
 203  **                         Compiler Flag                                     *
 204  **---------------------------------------------------------------------------*/
 205 #ifdef __cplusplus
 206 }
 207 #endif
 208
 209 #endif // _LDO_MANAGER_H_