1 /******************************************************************************
2 ** File Name: adc_reg_v3.h *
5 ** Copyright: 2009 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 09/16/2009 Yi.Qiu Reconstruct ADC driver *
13 ** 05/07/2010 Mingwei.zhang Modify it for SC8800G. *
14 ******************************************************************************/
15 #ifndef _ADC_REG_V3_H_
16 #define _ADC_REG_V3_H_
17 /*----------------------------------------------------------------------------*
19 **------------------------------------------------------------------------- */
21 /**---------------------------------------------------------------------------*
23 **--------------------------------------------------------------------------*/
28 #include <asm/arch/sc8810_reg_base.h>
30 /**---------------------------------------------------------------------------*
32 **---------------------------------------------------------------------------*/
33 /* ADC Ctronl Registers */
34 #define ADC_REG_BASE ADC_BASE
36 #define ADC_CTRL (ADC_REG_BASE + 0x0000)
37 #define ADC_CS (ADC_REG_BASE + 0x0004)
38 #define ADC_TPC_CH_CTRL (ADC_REG_BASE + 0x0008)
39 #define ADC_DAT (ADC_REG_BASE + 0x00C)
40 #define ADC_INT_EN (ADC_REG_BASE + 0x0010)
41 #define ADC_INT_CLR (ADC_REG_BASE + 0x0014)
42 #define ADC_INT_STAT (ADC_REG_BASE + 0x0018)
43 #define ADC_INT_SRC (ADC_REG_BASE + 0x001C)
46 #define ADC_STATUS_BIT BIT_4
47 #define ADC_TPC_CH_ON_BIT BIT_2
48 #define SW_CH_ON_BIT BIT_1
49 #define ADC_EN_BIT BIT_0
52 #define ADC_SCALE_BIT BIT_4
53 #define ADC_CS_BIT_MSK 0x0F
55 ////ADC_TPC_CH_CTRL bit map
56 #define ADC_TPC_X_CH_MSK 0x0F
57 #define ADC_TPC_Y_CH_OFFSET 4
58 #define ADC_TPC_Y_CH_MSK (0x0F << ADC_TPC_Y_CH_OFFSET)
61 #define ADC_IRQ_EN_BIT BIT_0
62 ///ADC_INT_CLR bit map
63 #define ADC_IRQ_CLR_BIT BIT_0
65 #define ADC_IRQ_RAW_BIT BIT_0
68 #define ADC_DATA_MSK 0x3FF
70 #define TPC_CHANNEL_X 2
71 #define TPC_CHANNEL_Y 3
73 #define ADC_CH_MAX_NUM 8
75 /**----------------------------------------------------------------------------*
77 **----------------------------------------------------------------------------*/
81 /**---------------------------------------------------------------------------*/
82 #endif //_ADC_REG_V3_H_