arch/arm/include/asm/arch-sc8830/sprd_sleep_cfg.h

   1 /******************************************************************************
   2  ** File Name:      sprd_sleep_cfg.h                                             *
   3  ** Author:         jiexia.yu                                                 *
   4  ** DATE:           07/09/2007                                                *
   5  ** Copyright:      2007 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file defines the basic function for ldo management.  *
   7  ******************************************************************************/
   8
   9 /******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 07/09/2007     jiexia.yu        Create.                                   *
  14  ******************************************************************************/
  15 #ifndef _SPRD_SLEEP_CFG_H_
  16 #define _SPRD_SLEEP_CFG_H_
  17
  18 /**---------------------------------------------------------------------------*
  19  **                         Dependencies                                      *
  20  **---------------------------------------------------------------------------*/
  21 #include "chip.h"
  22
  23 /**---------------------------------------------------------------------------*
  24  **                         Compiler Flag                                     *
  25  **---------------------------------------------------------------------------*/
  26 #ifdef __cplusplus
  27 extern   "C"
  28 {
  29 #endif
  30
  31 /**---------------------------------------------------------------------------*
  32  **                         Defines                                           *
  33  **---------------------------------------------------------------------------*/
  34  #define SLEEP_MODULE_CONFIG_SLEEP_PIN_FEATURE 0
  35
  36 #define SLEEP_SUPPORT_BTCLK 0
  37 #define SLEEP_SUPPORT_IVSP 1
  38 #define SLEEP_SUPPORT_ISP 1
  39 #define SLEEP_SUPPORT_DCAM 1
  40 #define SLEEP_SUPPORT_LCDC 1
  41 #define SLEEP_SUPPORT_SDIO 1
  42 #define SLEEP_SUPPORT_BKLIGHT 1
  43 #define SLEEP_SUPPORT_MMI 1
  44 #define SLEEP_SUPPORT_USBD 0
  45 #define SLEEP_SUPPORT_RETENTION 1
  46
  47 typedef void (*SLP_ENTER_FUNC) (uint8 slp_type);
  48
  49 typedef enum
  50 {
  51     SLP_CFG_NULL  = 0,  //id for NULL
  52     SLP_CFG_COM,
  53     SLP_CFG_DIF,
  54     SLP_CFG_MAX
  55 } SLP_CFG_TYPE_E;
  56
  57 typedef enum
  58 {
  59     SLP_AHB_NULL = 0,   //id for NULL
  60     SLP_AHB_DCAM,       //id for AHB device dcam
  61     SLP_AHB_USBD,       //id for AHB device usbd
  62     SLP_AHB_EMC,        //id for AHB device emc
  63     SLP_AHB_DMA,        //id for AHB device dma
  64     SLP_AHB_BUS,        //id for AHB device bus
  65     SLP_AHB_DEV_MAX
  66 } SLP_AHB_DEV_E;
  67
  68 typedef enum
  69 {
  70     SLP_APB_NULL = 0,   //id for NULL
  71     SLP_APB_WDG,        //id for APB device watchdog
  72     SLP_APB_ADC,        //id for APB device adc
  73     SLP_APB_TMR,        //id for APB device timer
  74     SLP_APB_SIM,        //id for APB device sim
  75     SLP_APB_I2C,        //id for APB device i2c
  76     SLP_APB_TPC,        //id for APB device tpc
  77     SLP_APB_PWM,        //id for APB device pwm
  78     SLP_APB_KPD,        //id for APB device keypad
  79     SLP_APB_GPIO,       //id for APB device gpio
  80     SLP_APB_GEA,        //id for APB device gea
  81     SLP_APB_SYSTMR,     //id for APB device sys timer
  82     SLP_APB_UART0,      //id for APB device uart0
  83     SLP_APB_UART1,      //id for APB device uart1
  84     SLP_APB_SPI0,       //id for APB device spi0
  85     SLP_APB_IIS,        //id for APB device iis
  86     SLP_APB_SPI1,       //id for APB device spi1
  87     SLP_APB_PIN,        //id for APB device pin
  88     SLP_APB_DEV_MAX
  89 } SLP_APB_DEV_E;
  90
  91
  92 typedef enum
  93 {
  94     SLP_CTL_NULL = 0,               //id for NULL
  95     SLP_CTRL_MCU_FORCE_STOP,    //id for arm and ahb ctrl
  96     SLP_CTRL_MCU_DMA_WAKEUP_EN,  //id for dma wake up ctrl
  97     SLP_CTRL_MCU_SYS_SLEEP_EN,  //id for sys  sleep ctrl
  98     SLP_CTRL_MCU_DEEP_SLEEP_EN, //id for deep sleep ctrl
  99     SLP_CTRL_APB_STOP,          //id for APB  sleep ctrl
 100     SLP_CTRL_APB_FORCE_ON,      //id for APB  sleep ctrl
 101     SLP_CTRL_APB_FORCE_SLEEP,   //id for APB  sleep ctrl
 102     SLP_CTRL_XTLEN,             //id for xtlen sleep ctrl
 103     SLP_CTRL_DMA_SLEEP_MOD,     //id for dma sleep mode ctrl
 104     SLP_CTRL_MCU_PLL_EN,    //id for mcu pll enable
 105     SLP_CTRL_XTL_ON_SLP,
 106     SLP_CTRL_MAX
 107 } SLP_BIT_CTL_E;
 108
 109 typedef enum
 110 {
 111     AHB_CAN_SLP_APB_CAN_SLP,
 112     AHB_CAN_SLP_APB_NO_SLP,
 113     AHB_NO_SLP_APB_CAN_SLP,
 114     AHB_NO_SLP_APB_NO_SLP,
 115     SLP_TYPE_MAX
 116 } SLP_AHB_APB_TYPE_E;
 117
 118 typedef enum
 119 {
 120     AHB_COULD_SLEEP,
 121     AHB_NO_SLEEP
 122 } SLP_AHB_TYPE_E;
 123
 124 typedef enum
 125 {
 126     APB_COULD_SLEEP,
 127     APB_NO_SLEEP
 128 } SLP_APB_TYPE_E;
 129
 130 typedef enum
 131 {
 132     SLP_BIT_CLR = 0,
 133     SLP_BIT_SET
 134 } SLP_BIT_DEF_E;
 135
 136 typedef struct
 137 {
 138     SLP_AHB_DEV_E  id;
 139     uint32         ahb_dev_reg;
 140     uint32         mask;
 141     SLP_BIT_DEF_E  value;
 142     BOOLEAN        valid;
 143     uint32         reserved;
 144 } SLP_AHB_CTL_T, * SLP_AHB_CTL_PTR;
 145
 146 typedef struct
 147 {
 148     SLP_APB_DEV_E  id;
 149     uint32         apb_dev_reg;
 150     uint32         mask;
 151     SLP_BIT_DEF_E  value;
 152     BOOLEAN        valid;
 153     uint32         reserved;
 154 } SLP_APB_CTL_T, * SLP_APB_CTL_PTR;
 155
 156 typedef struct
 157 {
 158     SLP_BIT_CTL_E  id;
 159     uint32         slp_bit_reg;
 160     uint32         mask;
 161     SLP_BIT_DEF_E  value;
 162     BOOLEAN        valid;
 163     uint32         reserved;
 164 } SLP_BIT_CTL_T, * SLP_BIT_CTL_PTR;
 165
 166 typedef struct
 167 {
 168     SLP_AHB_CTL_T  ahb_ctrl[SLP_AHB_DEV_MAX];
 169     SLP_APB_CTL_T  apb_ctrl[SLP_APB_DEV_MAX];
 170     SLP_BIT_CTL_T  slp_bit_ctrl[SLP_CTRL_MAX];
 171     SLP_ENTER_FUNC slp_handler;
 172 } SLP_COM_CTL_T, *SLPCOMCTL_PTR;
 173
 174 typedef struct
 175 {
 176     SLP_COM_CTL_T  slp_com_cfg;
 177 } SLP_CTL_T, * SLPCTL_PTR;
 178
 179 typedef struct
 180 {
 181     CHIP_TYPE_E    chip_type;
 182     SLPCTL_PTR     sleep_ctl;
 183 } SLP_CFG_T, * SLP_CFG_PTR;
 184
 185 /*****************************************************************************/
 186 //  Function name:  Slp_Get_Cfg
 187 //  Description  :  this function get sleep table entry according to chip type
 188 //  Global resource dependence:
 189 //  Author:
 190 //  Note:
 191 /*****************************************************************************/
 192 PUBLIC SLPCTL_PTR Slp_Get_Cfg (void);
 193 /*****************************************************************************/
 194 //  Function name:  Slp_Get_Apb_Status
 195 //  Description  :  this function get chip sleep status according ahb and apb
 196 //  bus status
 197 //  Global resource dependence:
 198 //  Author:
 199 //  Note:
 200 /*****************************************************************************/
 201
 202 PUBLIC int     tx_enter_deep_sleep (uint32 level);
 203
 204 /**---------------------------------------------------------------------------*
 205  **                         Compiler Flag                                     *
 206  **---------------------------------------------------------------------------*/
 207 #ifdef __cplusplus
 208 }
 209 #endif
 210
 211 #endif // _SPRD_SLEEP_CFG_H_