1 /******************************************************************************
2 ** File Name: gpio_reg_v0.h *
3 ** Author: Steve.Zhan *
5 ** Copyright: 2010 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 06/05/2010 Steve.Zhan Create. *
13 ******************************************************************************/
14 #ifndef _GPIO_REG_V0_H_
15 #define _GPIO_REG_V0_H_
17 #include "sci_types.h"
18 /*----------------------------------------------------------------------------*
20 **------------------------------------------------------------------------- */
22 /**---------------------------------------------------------------------------*
24 **--------------------------------------------------------------------------*/
29 /**---------------------------------------------------------------------------*
31 **---------------------------------------------------------------------------*/
32 #define ANA_GPIO_BASE SPRD_ANA_GPIO_PHYS
33 #define GPIO_BASE SPRD_GPIO_PHYS
35 #define GPIO_DATA 0x0000 //GPIO data register
36 #define GPIO_DMSK 0x0004 //GPIO data mask register, GPIO pin can be read and write if the mask bit is "1"
37 #define GPIO_DIR 0x0008 //"1" configure pin to be output"0" configure pin to be input
38 #define GPIO_IS 0x000C //Interrupt sense register. "1" detect levels, "0" detect edges
39 #define GPIO_IBE 0x0010 //Interrupt both edges register. "1" both edges trigger an interrupt, "0" interrupt generation event is controlled by GPIOIEN
40 #define GPIO_IEV 0x0014 //Interrupt event register, "1" rising edges or high levels trigger interrupts, "0" falling edges or low levels trigger interrupts.
41 #define GPIO_IE 0x0018 //Interrupt mask register, "1" corresponding pin is not masked. "0" corresponding pin interrupt is masked
42 #define GPIO_RIS 0x001C //Row interrupt status, reflect the status of interrupts trigger conditions detection on pins (prior to masking). "1" interrupt condition met "0" condition not met
43 #define GPIO_MIS 0x0020 //Masked interrupt status, "1" Interrupt active "0" interrupt not active
44 #define GPIO_IC 0x0024 //Interrupt clear, "1" clears edge detection interrupt. "0" has no effect.
47 #define GPI_DATA 0x0000 //GPI data register, original input signal, not through de-bounce path.
48 #define GPI_DMSK 0x0004 //GPI data mask register. GPIDATA register can be read if the mask bit is "1"
49 #define GPI_IEV 0x0014 //Interrupt event register, "1" high levels trigger interrupts, "0" low levels trigger interrupts.
50 #define GPI_IE 0x0018 //Interrupt mask register, "1" corresponding pin is not masked. "0" corresponding pin interrupt is masked
51 #define GPI_RIS 0x001C //Row interrupt status, reflect the status of interrupts trigger conditions detection on pins (prior to masking). "1" interrupt condition met "0" condition not met
52 #define GPI_MIS 0x0020 //Masked interrupt status, "1" Interrupt active "0" interrupt not active
53 #define GPI_IC 0x0024 //Interrupt clear, "1" clears level detection interrupt. "0" has no effect.
54 #define GPI_0CTRL 0x0028 //GPI0:...
55 #define GPI_1CTRL 0x002C //GPI1:...
56 #define GPI_2CTRL 0x0030 //GPI2:...
57 #define GPI_3CTRL 0x0034 //GPI3:...
58 #define GPI_4CTRL 0x0038 //GPI4:...
59 #define GPI_5CTRL 0x003C //GPI5:...
60 #define GPI_6CTRL 0x0040 //GPI4:...
61 #define GPI_7CTRL 0x0044 //GPI5:...
62 #define GPI_TRIG 0x0048
63 #define GPI_DEBOUNCE_BIT BIT_8
64 #define GPI_DEBOUNCE_PERIED 255
67 #define GPO_DATA 0x0000 //GPO data register
68 #define GPO_TRI 0x0004 //0x08 GPOTRI [15:0] 0xFFFF GPO tri-status control; 1 normal output, 0 tri-status output
70 /*----------GPIO iterface Control Registers----------*/
73 #define GPIO_DATA 0x0000 //GPIO data register
74 #define GPIO_DMSK 0x0004 //GPIO data mask register, GPIO pin can be read and write if the mask bit is "1"
75 #define GPIO_DIR 0x0008 //"1" configure pin to be output"0" configure pin to be input
76 #define GPIO_IS 0x000C //Interrupt sense register. "1" detect levels, "0" detect edges
77 #define GPIO_IBE 0x0010 //Interrupt both edges register. "1" both edges trigger an interrupt, "0" interrupt generation event is controlled by GPIOIEN
78 #define GPIO_IEV 0x0014 //Interrupt event register, "1" rising edges or high levels trigger interrupts, "0" falling edges or low levels trigger interrupts.
79 #define GPIO_IE 0x0018 //Interrupt mask register, "1" corresponding pin is not masked. "0" corresponding pin interrupt is masked
80 #define GPIO_RIS 0x001C //Row interrupt status, reflect the status of interrupts trigger conditions detection on pins (prior to masking). "1" interrupt condition met "0" condition not met
81 #define GPIO_MIS 0x0020 //Masked interrupt status, "1" Interrupt active "0" interrupt not active
82 #define GPIO_IC 0x0024 //Interrupt clear, "1" clears edge detection interrupt. "0" has no effect.
85 /**----------------------------------------------------------------------------*
86 ** Local Function Prototype **
87 **----------------------------------------------------------------------------*/
89 /**----------------------------------------------------------------------------*
90 ** Function Prototype **
91 **----------------------------------------------------------------------------*/
94 /**----------------------------------------------------------------------------*
96 **----------------------------------------------------------------------------*/
100 /**---------------------------------------------------------------------------*/