change source file mode to 0644 instead of 0755
[profile/mobile/platform/kernel/u-boot-tm1.git] / arch / arm / include / asm / arch-sc8830 / adc_reg_v3.h
1 /******************************************************************************
2  ** File Name:        adc_reg_v3.h                                    *
3  ** Author:           Yi.Qiu                                                  *
4  ** DATE:             09/16/2009                                              *
5  ** Copyright:        2009 Spreatrum, Incoporated. All Rights Reserved.       *
6  ** Description:                                                              *
7  ******************************************************************************/
8 /******************************************************************************
9  **                   Edit    History                                         *
10  **---------------------------------------------------------------------------*
11  ** DATE            NAME            DESCRIPTION                               *
12  ** 09/16/2009    Yi.Qiu            Reconstruct ADC driver                    *
13  ** 05/07/2010    Mingwei.zhang     Modify it for SC8800G.                    *
14  ******************************************************************************/
15 #ifndef _ADC_REG_V3_H_
16 #define _ADC_REG_V3_H_
17 /*----------------------------------------------------------------------------*
18  **                         Dependencies                                      *
19  **------------------------------------------------------------------------- */
20
21 /**---------------------------------------------------------------------------*
22  **                             Compiler Flag                                 *
23  **--------------------------------------------------------------------------*/
24 #ifdef   __cplusplus
25 extern   "C"
26 {
27 #endif
28 #include <asm/arch/sprd_reg.h>
29
30 /**---------------------------------------------------------------------------*
31 **                               Micro Define                                **
32 **---------------------------------------------------------------------------*/
33 /* ADC Ctronl Registers */
34 #define ADC_REG_BASE                        SPRD_ANA_ADC_PHYS 
35
36 #define ADC_CTRL                            (ADC_REG_BASE + 0x0000)
37 #define ADC_CS                              (ADC_REG_BASE + 0x0004)
38 //#define ADC_TPC_CH_CTRL                   (ADC_REG_BASE + 0x0008)
39 #define ADC_HW_CH_CFG_SLOW(x)               (ADC_REG_BASE + 0x0008 + ((x)-1)*0x04)
40 #define ADC_HW_CH_CFG_FAST(x)               (ADC_REG_BASE + 0x0028 + ((x)-1)*0x04)
41 #define ADC_HW_CH_DELAY                     (ADC_REG_BASE + 0x0048)
42 #define ADC_DAT                             (ADC_REG_BASE + 0x004C)
43 #define ADC_INT_EN                          (ADC_REG_BASE + 0x0050)
44 #define ADC_INT_CLR                         (ADC_REG_BASE + 0x0054)
45 #define ADC_INT_STAT                        (ADC_REG_BASE + 0x0058)
46 #define ADC_INT_SRC                         (ADC_REG_BASE + 0x005C)
47
48 ///ADC_CTRL
49 //#define ADC_STATUS_BIT                      BIT_4
50 //#define ADC_TPC_CH_ON_BIT                   BIT_2
51 #define BIT_SW_CH_RUN_NUM(_X_)          ((((_X_) - 1) & 0xF ) << 4)
52 #define SW_CH_NUM_MSK                           (BIT(4) | BIT(5) | BIT(6) | BIT(7))
53 #define ADC_MODE_12B                        BIT_2
54 #define SW_CH_ON_BIT                        BIT_1
55 #define ADC_EN_BIT                          BIT_0
56
57 ///ADC_CS bit map
58 #define ADC_SCALE_BIT                       BIT_5
59 #define ADC_CS_BIT_MSK                      0x1F
60
61 ////ADC_TPC_CH_CTRL bit map
62 //#define ADC_TPC_X_CH_MSK                    0x0F
63 //#define ADC_TPC_Y_CH_OFFSET                 4
64 //#define ADC_TPC_Y_CH_MSK                    (0x0F << ADC_TPC_Y_CH_OFFSET)
65
66 ////ADC_INT_EN
67 #define ADC_IRQ_EN_BIT                      BIT_0
68 ///ADC_INT_CLR bit map
69 #define ADC_IRQ_CLR_BIT                     BIT_0
70
71 #define ADC_IRQ_RAW_BIT                     BIT_0
72 //ADC_DAT bit map
73 #define ADC_DATA_MSK                        0xFFF
74
75 #define TPC_CHANNEL_X    2
76 #define TPC_CHANNEL_Y    3
77
78 #define ADC_CH_MAX_NUM                  8
79
80 /**----------------------------------------------------------------------------*
81 **                         Compiler Flag                                      **
82 **----------------------------------------------------------------------------*/
83 #ifdef   __cplusplus
84 }
85 #endif
86 /**---------------------------------------------------------------------------*/
87 #endif //_ADC_REG_V3_H_
88
89
90