tizen 2.4 release
[profile/mobile/platform/kernel/u-boot-tm1.git] / arch / arm / include / asm / arch-sc8810 / pcm_reg_v3.h
1 /******************************************************************************
2  ** File Name:    pcm_reg_v3.h                                            *
3  ** Author:       mingwei.zhang                                                 *
4  ** DATE:         06/11/2010                                                  *
5  ** Copyright:    2010 Spreatrum, Incoporated. All Rights Reserved.           *
6  ** Description:                                                              *
7  ******************************************************************************/
8 /******************************************************************************
9  **                   Edit    History                                         *
10  **---------------------------------------------------------------------------*
11  ** DATE          NAME            DESCRIPTION                                 *
12  ** 06/11/2010    mingwei.zhang   Create.                                     *
13  ** 09/08/2010    Zhonghe.Huang   Modify for SC8800G
14  ******************************************************************************/
15 #ifndef _PCM_REG_V3_H_
16 #define _PCM_REG_V3_H_
17 #include "sci_types.h"
18 #include "pcm_drvapi.h"
19 /*----------------------------------------------------------------------------*
20  **                         Dependencies                                      *
21  **------------------------------------------------------------------------- */
22
23 /**---------------------------------------------------------------------------*
24  **                             Compiler Flag                                 *
25  **--------------------------------------------------------------------------*/
26 #ifdef   __cplusplus
27 extern   "C"
28 {
29 #endif
30 /**---------------------------------------------------------------------------*
31 **                               Micro Define                                **
32 **---------------------------------------------------------------------------*/
33 #define WORD_SIZE               (4)
34 #define HALF_WORD_SIZE          (2)
35 #define BYTE_SIZE               (1)
36
37 #define PCM_DATA_LEN            120
38
39 #define FIFO_FULL_WATERMARK             24
40 #define FIFO_EMPTY_WATERMARK            8
41 #define PCM_FIFO_SIZE_IN_WORD           32
42 #define DMA_PCM_RX              DMA_IIS_RX
43 #define DMA_PCM_TX              DMA_IIS_TX
44
45 // IIS_CTL0
46 #define IIS_CTL0_BIT_PER_CHN_SHIFT      (4)
47 #define IIS_CTL0_BIT_PER_CHN_MASK       (0x3 << IIS_CTL0_BIT_PER_CHN_SHIFT)
48 #define IIS_CTL0_BIT_PER_CHN_8          0
49 #define IIS_CTL0_BIT_PER_CHN_16         1
50 #define IIS_CTL0_BIT_PER_CHN_32         2
51
52 #define IIS_CTL0_SLAVE_MODE             BIT_3
53 #define IIS_CTL0_IISC_SHRTH             BIT_8
54 #define IIS_CTL0_SYNC_MODE              BIT_9
55 #define IIS_CTL0_PCM_SCK_REV            BIT_11
56 #define IIS_CTL0_PCM_DMA_EB             BIT_14
57 #define IIS_CTL0_PCM_EB                 BIT_15
58
59 // IIS_CTL2
60 #define IIS_CTL2_PCM_SLOT_SHIFT         (0)
61 #define IIS_CTL2_PCM_SLOT_MASK          (0x7 << IIS_CTL2_PCM_SLOT_SHIFT)
62
63 #define IIS_CTL2_PCM_CYCLE_SHIFT        (3)
64 #define IIS_CTL2_PCM_CYCLE_MASK         (0x7F << IIS_CTL2_PCM_CYCLE_SHIFT)
65
66 // IIS_CTL3
67 #define IIS_CTL3_RX_FULL_THRHLD_SHIFT   (0)
68 #define IIS_CTL3_RX_FULL_THRHLD_MASK    (0x1F << IIS_CTL3_RX_FULL_THRHLD_SHIFT)
69 #define IIS_CTL3_RX_EMPTY_THRHLD_SHIFT  (8)
70 #define IIS_CTL3_RX_EMPTY_THRHLD_MASK   (0x1F << IIS_CTL3_RX_EMPTY_THRHLD_SHIFT)
71
72 //IIS_CTL4
73 #define IIS_CTL4_TX_FULL_THRHLD_SHIFT   (0)
74 #define IIS_CTL4_TX_FULL_THRHLD_MASK    (0x1F << IIS_CTL4_TX_FULL_THRHLD_SHIFT)
75 #define IIS_CTL4_TX_EMPTY_THRHLD_SHIFT  (8)
76 #define IIS_CTL4_TX_EMPTY_THRHLD_MASK   (0x1F << IIS_CTL4_TX_EMPTY_THRHLD_SHIFT)
77
78 // IIS_INT_IEN
79 #define IIS_INT_IEN_RX_FIFO_FULL_EN     BIT_0
80 #define IIS_INT_IEN_RX_FIFO_EMPTY_EN    BIT_1
81 #define IIS_INT_IEN_TX_FIFO_FULL_EN     BIT_2
82 #define IIS_INT_IEN_TX_FIFO_EMPTY_EN    BIT_3
83 #define IIS_INT_IEN_RX_OVERRUN_EN       BIT_4
84 #define IIS_INT_IEN_SLAVE_TIMEOUT_EN    BIT_5
85 #define IIS_INT_IEN_RX_FULL_EN          BIT_6
86 #define IIS_INT_IEN_TX_EMPTY_EN         BIT_7
87
88 // IIS_INT_CLR
89 #define IIS_INT_IEN_RX_FIFO_FULL_CLR    BIT_0
90 #define IIS_INT_IEN_RX_FIFO_EMPTY_CLR   BIT_1
91 #define IIS_INT_IEN_TX_FIFO_FULL_CLR    BIT_2
92 #define IIS_INT_IEN_TX_FIFO_EMPTY_CLR   BIT_3
93 #define IIS_INT_IEN_RX_OVERRUN_CLR      BIT_4
94 #define IIS_INT_IEN_SLAVE_TIMEOUT_CLR   BIT_5
95
96 // IIS_INT_STS
97 #define IIS_INT_STS_RX_FIFO_FULL        BIT_6
98 #define IIS_INT_STS_TX_FIFO_FULL        BIT_2
99 #define IIS_INT_STS_TX_FIFO_EMPTY       BIT_7
100 #define IIS_INT_STS_SLAVE_TIMEOUT       BIT_5
101
102
103 /**---------------------------------------------------------------------------*
104  **                         Data Structures                                   *
105  **---------------------------------------------------------------------------*/
106 // PCM control register filed definitions
107 typedef struct
108 {
109     volatile uint32 iis_fifo;               // 0x00, fifo
110     volatile uint32 iis_clkd;               // 0x04, clk_dividor
111     volatile uint32 iis_ctl0;               // 0x08, ctl0--basic setting control register
112     volatile uint32 iis_ctl1;               // 0x0c, ctl1
113     volatile uint32 iis_ctl2;               // 0x10, ctl2--pcm slot relavent
114     volatile uint32 iis_ctl3;               // 0x14, ctl3--bit[4:0]:rx_full_th; bit[12:8]:rx_empty_th
115     volatile uint32 iis_ien;                // 0x18, ien
116     volatile uint32 iis_iclr;               // 0x1c, iclr
117     volatile uint32 iis_iraw;               // 0x20, iraw
118     volatile uint32 iis_ists;               // 0x24, ists--interrupt masked sts
119     volatile uint32 iis_sts1;               // 0x28, sts1--rx fifo R/W addr
120     volatile uint32 iis_sts2;               // 0x2c, sts2--basic info of pcm module
121     volatile uint32 iis_sts3;               // 0x30, sts3--lrck count
122     volatile uint32 iis_dspwait;            // 0x34, dspwait
123     volatile uint32 iis_ctl4;               // 0x38, ctl4--bit[4:0]:tx_full_th; bit[12:8]:tx_empty_th
124     volatile uint32 iis_sts4;                           // 0x3c, sts4--tx fifo R/W addr
125 } PCM_CTL_REG_T;
126
127 #define PCM_ENABLE_PCM_CLK() do { \
128     REG32(GR_PLL_SCR) |= (BIT_8 | BIT_9);       \
129     REG32(GR_GEN2)        &= ~(0xF << 24); \
130     REG32(GR_GEN2)        |= (0x1 << 24);  \
131 } while (0)
132
133 #define PCM_ENABLE_MODULE() do { \
134     volatile uint32 val = 0;  \
135     val =  REG32 (GR_GEN0);  \
136     val |= GEN0_I2S_EN;  \
137     REG32 (GR_GEN0) = val;  \
138   } while (0)
139
140 #define PCM_DISABLE_MODULE() do { \
141     REG32 (GR_GEN0) &= ~GEN0_I2S_EN;  \
142 } while (0)
143
144 #define PCM_SET_RX_WATERMARK(param) do {  \
145     volatile PCM_CTL_REG_T *reg_ptr = (volatile PCM_CTL_REG_T *) PCM_CTL_BASE; \
146     reg_ptr->iis_ctl3 &= ~(IIS_CTL3_RX_FULL_THRHLD_MASK | IIS_CTL3_RX_EMPTY_THRHLD_MASK ); \
147     reg_ptr->iis_ctl3 |=   ((param->rx_watermark << IIS_CTL3_RX_FULL_THRHLD_SHIFT) \
148                                    | (param->tx_watermark << IIS_CTL3_RX_EMPTY_THRHLD_SHIFT)); \
149 } while (0)
150
151 #define PCM_SET_TX_WATERMARK(param) do {  \
152         volatile PCM_CTL_REG_T *reg_ptr = (volatile PCM_CTL_REG_T *) PCM_CTL_BASE; \
153         reg_ptr->iis_ctl4 &= ~(IIS_CTL4_TX_FULL_THRHLD_MASK | IIS_CTL4_TX_EMPTY_THRHLD_MASK ); \
154         reg_ptr->iis_ctl4 |=   ((param->rx_watermark << IIS_CTL4_TX_FULL_THRHLD_SHIFT) \
155                 | (param->tx_watermark << IIS_CTL4_TX_EMPTY_THRHLD_SHIFT)); \
156 } while (0)
157
158 /**----------------------------------------------------------------------------*
159 **                         Compiler Flag                                      **
160 **----------------------------------------------------------------------------*/
161
162 #ifdef   __cplusplus
163 }
164 #endif
165 /**---------------------------------------------------------------------------*/
166 #endif //_PCM_REG_V3_H_
167
168
169
170