arch/arm/include/asm/arch-sc8800g/analog_reg_v3.h

   1 /******************************************************************************
   2  ** File Name:    analog_reg_v3.h                                        *
   3  ** Author:       Tim.Luo                                                     *
   4  ** DATE:         03/03/2010                                                  *
   5  ** Copyright:    2005 Spreatrum, Incoporated. All Rights Reserved.           *
   6  ** Description:                                                              *
   7  ******************************************************************************/
   8 /******************************************************************************
   9  **                   Edit    History                                         *
  10  **---------------------------------------------------------------------------*
  11  ** DATE          NAME            DESCRIPTION                                 *
  12  ** 03/03/2010    Tim.Luo         Create.                                     *
  13  ** 05/07/2010    Mingwei.zhang   Modify it for SC8800G.                      *
  14  ******************************************************************************/
  15
  16 #ifndef _ANALOG_REG_V3_H_
  17 #define _ANALOG_REG_V3_H_
  18
  19 #include "bits.h"
  20 #include "sc8800g_reg_base.h"
  21 /*----------------------------------------------------------------------------*
  22  **                         Dependencies                                      *
  23  **-------------------------------------------------------------------------- */
  24
  25 /**---------------------------------------------------------------------------*
  26  **                             Compiler Flag                                 *
  27  **---------------------------------------------------------------------------*/
  28 #ifdef   __cplusplus
  29 extern   "C"
  30 {
  31 #endif
  32 /**----------------------------------------------------------------------------*
  33 **                               Micro Define                                 **
  34 **----------------------------------------------------------------------------*/
  35 ///
  36 //Analog die register define
  37 ///
  38 //#define   ANA_REG_BASE           0x82000480
  39 #define   ANA_AGEN              (ANA_REG_BASE + 0x00)
  40 #define   ANA_MODULE_ARM_RST    (ANA_REG_BASE + 0x04)
  41 #define   ANA_CLK_CTL           (ANA_REG_BASE + 0x08)
  42 #define   ANA_LDO_PD_SET        (ANA_REG_BASE + 0x0C)
  43 #define   ANA_LDO_PD_CTL        (ANA_REG_BASE + 0x10)
  44 #define   ANA_LDO_VCTL0         (ANA_REG_BASE + 0x14)
  45 #define   ANA_LDO_VCTL1         (ANA_REG_BASE + 0x18)
  46 #define   ANA_LDO_VCTL2         (ANA_REG_BASE + 0x1C)
  47 #define   ANA_LDO_VCTL3         (ANA_REG_BASE + 0x20)
  48 #define   ANA_LDO_SLP           (ANA_REG_BASE + 0x24)
  49 #define   ANA_ANA_CTL0          (ANA_REG_BASE + 0x28)
  50 #define   ANA_DCDC_CTL          (ANA_REG_BASE + 0x2C)
  51 #define   ANA_CHGR_CTL0         (ANA_REG_BASE + 0x30)
  52 #define   ANA_CHGR_CTL1         (ANA_REG_BASE + 0x34)
  53 #define   ANA_PLLMN             (ANA_REG_BASE + 0x38)
  54 #define   ANA_PLLWAIT           (ANA_REG_BASE + 0x3C)
  55 #define   ANA_LED_CTL           (ANA_REG_BASE + 0x40)
  56 #define   ANA_PA_CTL            (ANA_REG_BASE + 0x44)
  57 #define   ANA_HWRST_STATUS      (ANA_REG_BASE + 0x48)
  58 #define   GR_HWRST                       ANA_HWRST_STATUS
  59 #define   ANA_HWRST_RTC         (ANA_REG_BASE + 0x4C)
  60 #define   ANA_STA               (ANA_REG_BASE + 0x50)
  61 #define   ANA_INT_DEBUG         (ANA_REG_BASE + 0x54)
  62 #define   ANA_LDO_PD_RST        (ANA_REG_BASE + 0x58)
  63 #define   ANA_MCU_PROT          (ANA_REG_BASE + 0x5C)
  64 #define   ANA_DCDC_CTRL_DS      (ANA_REG_BASE + 0x60)
  65 #define   ANA_ADIE_CHIP_ID      (ANA_REG_BASE + 0x64)
  66
  67 /*
  68   the AGEN register bit
  69 */
  70 //Reserved BIT_14-31
  71 #define AGEN_PLL_FORCE_PD_EN    BIT_13
  72 #define AGEN_RTC_ARCH_EN        BIT_12
  73 #define AGEN_RTC_WDG_EN         BIT_11
  74 #define AGEN_RTC_RTC_EN         BIT_10
  75 #define AGEN_RTC_TPC_EN         BIT_9
  76 #define AGEN_RTC_GPIO_EN        BIT_8
  77 #define AGEN_APB_ARCH_EN        BIT_7
  78 #define AGEN_TPC_EN             BIT_6
  79 //Reserved BIT_5
  80 #define AGEN_WDG_EN             BIT_4
  81 #define AGEN_PINREG_EN          BIT_3
  82 #define AGEN_ADC_EN             BIT_2
  83 #define AGEN_RTC_EN             BIT_1
  84 #define AGEN_GPIO_EN            BIT_0
  85
  86 ///ANA_CLK_CTL BIT map
  87 #define ACLK_CTL_AUXAD_EN       BIT_4
  88 #define ACLK_CTL_AUXADC_EN  BIT_0
  89 #define VBMCLK_ARM_EN           BIT_1
  90 #define VBCTL_SEL               BIT_2
  91
  92 ///ANA_LDO_PD_SET
  93 #define ANA_LDO_PD_SET_MSK  0x3FF
  94 ///ANA_LDO_PD_CTL
  95 #define ANA_LDO_PD_CTL_MSK  0x5555
  96
  97 ///ANA_ANA_CTL0 BIT map
  98 #define VIBR_CTL                    ANA_ANA_CTL0
  99 #define VIBR_PD_SET             BIT_10
 100 #define VIBR_PD_RST             BIT_11
 101 #define VIBR_V_SHIFT            12
 102 #define VIBR_V_MSK              (0x07 << VIBR_V_SHIFT)
 103
 104 ///ANA_CHGR_CTL0
 105 #define CHGR_USB_CHG_SHIFT              4
 106 #define CHGR_USB_CHG_MSK                (3 << CHGR_USB_CHG_SHIFT)
 107 #define CHGR_ADAPTER_CHG_SHIFT          6
 108 #define CHGR_ADAPTER_CHG_MSK            (3 << CHGR_ADAPTER_CHG_SHIFT)
 109 #define CHGR_PD_BIT                     BIT_8
 110 #define CHGR_RECHG_BIT                  BIT_11
 111 #define CHGR_ADATPER_EN_BIT             BIT_0
 112 #define CHGR_ADATPER_EN_RST_BIT         BIT_1
 113 #define CHGR_USB_500MA_EN_BIT           BIT_2
 114 #define CHGR_USB_500MA_EN_RST_BIT       BIT_3
 115 #define CHAR_ADAPTER_MODE_MSK           (BIT_0|BIT_1|BIT_2|BIT_3)
 116
 117 ///ANA_CHGR_CTL1
 118 #define CHAR_SW_POINT_SHIFT     0
 119 #define CHAR_SW_POINT_MSK       (0x1F << CHAR_SW_POINT_SHIFT)
 120
 121 ///ANA_LED_CTL BIT map
 122 #define KPLED_CTL               ANA_LED_CTL
 123 #define KPLED_PD_SET            BIT_7
 124 #define KPLED_PD_RST            BIT_8
 125 #define KPLED_V_SHIFT           9
 126 #define KPLED_V_MSK             (0x07 << KPLED_V_SHIFT)
 127
 128 #define WHTLED_CTL              ANA_LED_CTL
 129 #define WHTLED_PD_SET           BIT_0
 130 #define WHTLED_PD_RST           BIT_1
 131 #define WHTLED_V_SHIFT          2
 132 #define WHTLED_V_MSK            (0x1F << WHTLED_V_SHIFT)
 133
 134 ///ANA_PA_CTL
 135 #define LDO_PA_SET              BIT_6
 136 #define LDO_PA_RST              BIT_7
 137
 138 ///ANA_ADIE_CHIP_ID
 139 #define ANA_G1_CHIP_ID          ((uint16)0)
 140 #define ANA_G2_CHIP_ID          ((uint16)1)
 141
 142 //ANA_HWRST_STATUS
 143 #define HWRST_STATUS_POWERON_MASK (0xf0)
 144 #define HWRST_STATUS_RECOVERY (0x20)
 145 #define HWRST_STATUS_FASTBOOT (0X30)
 146 #define HWRST_STATUS_NORMAL (0X40)
 147 #define HWRST_STATUS_ALARM (0X50)
 148 #define HWRST_STATUS_SLEEP (0X60)
 149
 150
 151
 152 /**----------------------------------------------------------------------------*
 153 **                             Data Prototype                                 **
 154 **----------------------------------------------------------------------------*/
 155
 156 /**----------------------------------------------------------------------------*
 157 **                         Local Function Prototype                           **
 158 **----------------------------------------------------------------------------*/
 159
 160 /**----------------------------------------------------------------------------*
 161 **                           Function Prototype                               **
 162 **----------------------------------------------------------------------------*/
 163
 164
 165 /**----------------------------------------------------------------------------*
 166 **                         Compiler Flag                                      **
 167 **----------------------------------------------------------------------------*/
 168 #ifdef   __cplusplus
 169 }
 170 #endif
 171 /**---------------------------------------------------------------------------*/
 172
 173 #endif //_ANALOG_REG_V3_H_
 174