arch/arm/cpu/armv7/sc8825/reboot_function.c

   1 /******************************************************************************
   2  ** File Name:      chip_phy_v3.c                                             *
   3  ** Author:         Richard Yang                                              *
   4  ** DATE:           08/14/2002                                                *
   5  ** Copyright:      2002 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file defines the basic information on chip.          *
   7  ******************************************************************************
   8
   9  ******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 08/14/2002     Richard.Yang     Create.                                   *
  14  ** 09/16/2003     Xueliang.Wang    Modify CR4013                             *
  15  ** 08/23/2004     JImmy.Jia        Modify for SC6600D                        *
  16  ******************************************************************************/
  17
  18 /**---------------------------------------------------------------------------*
  19  **                         Dependencies                                      *
  20  **---------------------------------------------------------------------------*/
  21 #include "asm/arch/sc_reg.h"
  22 #include "asm/arch/adi_hal_internal.h"
  23 #include "asm/arch/wdg_drvapi.h"
  24 #include "asm/arch/mocor_boot_mode.h"
  25
  26 /**---------------------------------------------------------------------------*
  27  **                         Compiler Flag                                     *
  28  **---------------------------------------------------------------------------*/
  29 #ifdef   __cplusplus
  30 extern   "C"
  31 {
  32 #endif
  33
  34 /**---------------------------------------------------------------------------*
  35  **                         Macro defines.
  36  **---------------------------------------------------------------------------*/
  37
  38
  39 /**---------------------------------------------------------------------------*
  40  **                         Struct defines.
  41  **---------------------------------------------------------------------------*/
  42
  43 /**---------------------------------------------------------------------------*
  44  **                         Global variables                                  *
  45  **---------------------------------------------------------------------------*/
  46
  47 /**---------------------------------------------------------------------------*
  48  **                         Function Definitions                              *
  49  **---------------------------------------------------------------------------*/
  50 /*****************************************************************************/
  51 // Description :    This function is used to reset MCU.
  52 // Global resource dependence :
  53 // Author :         Xueliang.Wang
  54 // Note :
  55 /*****************************************************************************/
  56 void CHIP_ResetMCU (void)  //reset interrupt disable??
  57 {
  58     // This loop is very important to let the reset process work well on V3 board
  59     // @Richard
  60     uint32 i = 10000;
  61
  62     ANA_REG_OR (ANA_APB_CLK_EN, WDG_EB | RTC_WDG_EB);
  63     WDG_TimerInit ();
  64
  65     while (i--);
  66
  67     WDG_ResetMCU ();
  68 }
  69
  70 /*****************************************************************************/
  71 //  Description:    Returns the HW_RST register address.
  72 //  Author:         Jeff.Li
  73 //  Note :          Because there is no register which can restore information
  74 //                  when watchdog resets the system, so we choose IRAM.
  75 /*****************************************************************************/
  76 LOCAL uint32 CHIP_PHY_GetHwRstAddr (void)
  77 {
  78     // Returns a DWORD of IRAM shared with DCAM
  79     return 0x4000A7FC;
  80 }
  81
  82 /*****************************************************************************/
  83 //  Description:    Returns the reset mode register address.
  84 //  Author:         Jeff.Li
  85 //  Note:
  86 /*****************************************************************************/
  87 LOCAL uint32 CHIP_PHY_GetRstModeAddr (void)
  88 {
  89     return GR_ARM_BOOT_ADDR;
  90 }
  91
  92 /*****************************************************************************/
  93 //  Description:    PHY layer realization of BOOT_SetRstMode.
  94 //  Author:         Jeff.Li
  95 //  Note:           The valid bit filed is from bit15 to bit0
  96 /*****************************************************************************/
  97 PUBLIC void CHIP_PHY_SetRstMode(uint32 val)
  98 {
  99     CHIP_REG_AND (CHIP_PHY_GetRstModeAddr (), ~0xFFFF);
 100     CHIP_REG_OR (CHIP_PHY_GetRstModeAddr (), (val&0xFFFF));
 101 }
 102
 103 /*****************************************************************************/
 104 //  Description:    PHY layer realization of BOOT_ResetHWFlag. It resets the HW
 105 //                  reset register after system initialization.
 106 //  Author:         Jeff.Li
 107 //  Note:           The valid bit filed of analog register is from bit11 to bit0.
 108 //                  | 11   10   9   8 |  7   6   5   4  |  3   2   1   0   |
 109 //                  |ALL_HRST_MONITOR | POR_HRST_MONITOR| WDG_HRST_MONITOR |
 110 //
 111 //                  The valid bit filed of HW_RST is from bit11 to bit0.
 112 /*****************************************************************************/
 113 PUBLIC void CHIP_PHY_ResetHWFlag (uint32 val)
 114 {
 115     // Reset the analog die register
 116     ANA_REG_AND (ANA_HWRST_STATUS, ~0xFFF);
 117     ANA_REG_OR (ANA_HWRST_STATUS, (val&0xFFF));
 118
 119     // Reset the HW_RST
 120     CHIP_REG_AND (CHIP_PHY_GetHwRstAddr (), ~0xFFFF);
 121     CHIP_REG_OR (CHIP_PHY_GetHwRstAddr (), (val&0xFFFF));
 122 }
 123
 124 /*****************************************************************************/
 125 //  Description:    PHY layer realization of BOOT_SetWDGHWFlag. It Writes flag
 126 //                  to the register which would not be reset by watchdog reset.
 127 //  Author:         Jeff.Li
 128 //  Note:           The valid bit filed is from bit15 to bit0
 129 /*****************************************************************************/
 130 PUBLIC void CHIP_PHY_SetWDGHWFlag (WDG_HW_FLAG_T type, uint32 val)
 131 {
 132     if(TYPE_RESET == type)
 133     {
 134         // Switch IRAM from DCAM to ARM
 135         REG32 (AHB_CTL1) |= BIT_0;
 136
 137         CHIP_REG_AND (CHIP_PHY_GetHwRstAddr (), ~0xFFFF);
 138         CHIP_REG_OR (CHIP_PHY_GetHwRstAddr (), (val&0xFFFF));
 139     }
 140     else
 141     {
 142         //wrong type, TODO
 143     }
 144 }
 145
 146
 147 /**---------------------------------------------------------------------------*
 148  **                         Compiler Flag                                     *
 149  **---------------------------------------------------------------------------*/
 150 #ifdef __cplusplus
 151 }
 152 #endif