arch/arm/cpu/armv7/sc8810/misc.c

   1 /******************************************************************************
   2  ** File Name:      msic.c                                             *
   3  ** Author:         Yong.Li                                              *
   4  ** DATE:           04/19/2013                                                *
   5  ** Copyright:      2002 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file defines the basic information on chip.          *
   7  ******************************************************************************
   8
   9  ******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 04/19/2013     Richard.Yang     Create.                                   *
  14  ******************************************************************************/
  15
  16 /**---------------------------------------------------------------------------*
  17  **                         Dependencies                                      *
  18  **---------------------------------------------------------------------------*/
  19
  20 #include <asm/arch/sci_types.h>
  21
  22 #include <common.h>
  23 #include <asm/io.h>
  24 #include <asm/arch/regs_adi.h>
  25 #include <asm/arch/regs_ana.h>
  26 #include <asm/arch/adi_hal_internal.h>
  27 #include <asm/arch/sc8810_reg_ahb.h>
  28 #include <asm/arch/sdram_sc7710g2.h>
  29 #include <asm/arch/chip_plf_export.h>
  30 #include <asm/arch/emc_config.h>
  31 #include <asm/arch/misc_api.h>
  32 #include <asm/arch/mfp.h>
  33
  34 /**---------------------------------------------------------------------------*
  35  **                         Compiler Flag                                     *
  36  **---------------------------------------------------------------------------*/
  37 #ifdef   __cplusplus
  38 extern   "C"
  39 {
  40 #endif
  41
  42 /**---------------------------------------------------------------------------*
  43  **                         Macro defines.
  44  **---------------------------------------------------------------------------*/
  45
  46 /**---------------------------------------------------------------------------*
  47  **                         Struct defines.
  48  **---------------------------------------------------------------------------*/
  49
  50 /**---------------------------------------------------------------------------*
  51  **                         Global variables                                  *
  52  **---------------------------------------------------------------------------*/
  53
  54
  55 /**---------------------------------------------------------------------------*
  56  **                         Function Definitions                              *
  57  **---------------------------------------------------------------------------*/
  58
  59 unsigned int CHIP_PHY_GetChipID(void)
  60 {
  61 #if defined(CONFIG_SC7710G2)
  62         return CHIP_REG_GET(CHIP_ID);
  63 #else
  64     return 0;
  65 #endif
  66 }
  67
  68 unsigned int CHIP_PHY_GetANAChipID(void)
  69 {
  70 #if defined(CONFIG_SC7710G2)
  71         return ((ADI_Analogdie_reg_read(ANA_CHIP_ID_HIGH) << 16) |
  72                                         ADI_Analogdie_reg_read(ANA_CHIP_ID_LOW));
  73 #else
  74     return 0;
  75 #endif
  76 }
  77
  78 LOCAL void mcu_clock_select(MCU_CLK_SOURCE_E mcu_clk_sel)
  79 {
  80     uint32 i;
  81
  82     i = REG32(AHB_ARM_CLK);
  83     i &= ~(0x3 << 23);
  84     i |= ((mcu_clk_sel & 0x3) << 23);
  85     REG32(AHB_ARM_CLK) = i;
  86 }
  87
  88 LOCAL void set_arm_bus_clk_div(uint32 arm_drv, uint32 axi_div, uint32 ahb_div, uint32 dbg_div)
  89 {
  90     uint32 i;
  91
  92     // A5 AXI DIV
  93     i = REG32(CA5_CFG);
  94     i &= (~(0x3 << 12));
  95     i |= ((axi_div & 0x3) << 11);
  96     REG32(CA5_CFG) = i;
  97
  98     i = REG32(AHB_ARM_CLK);
  99     i &= (~(0x7 | (0x7 << 4) | (0x7 << 14)));
 100     i |= (arm_drv & 0x7) | ((ahb_div & 0x7) << 4) | ((dbg_div & 0x7) << 14);
 101
 102     REG32(AHB_ARM_CLK) = i;
 103
 104     for(i = 0; i < 50; i++);
 105 }
 106
 107 LOCAL void set_gpu_clock_freq(void)
 108 {
 109     // GPU AXI 256M
 110     REG32(GR_GEN2) &= ~(0x3);
 111 }
 112
 113 LOCAL void set_mpll_clock_freq(uint32 clk_freq_hz)
 114 {
 115     uint32 i;
 116     uint32 mpll_clk;
 117
 118     mpll_clk = (clk_freq_hz / 1000000 / 4);
 119
 120     //APB_GEN1_PCLK M_PLL_CTRL_WE
 121     REG32(GR_GEN1) |= (1 << 9);
 122
 123     i = REG32(GR_MPLL_MN);
 124     i &= ~ 0x7FF;
 125
 126         i |= (mpll_clk & 0x7FF);
 127
 128     REG32(GR_MPLL_MN) = i;
 129     REG32(GR_GEN1) &= ~(1 << 9);
 130 }
 131
 132 LOCAL void set_chip_clock_freq(void)
 133 {
 134     uint32 arm_drv = 0;
 135     uint32 axi_div = 0;
 136     uint32 ahb_div = 0;
 137     uint32 dbg_div = 0;
 138
 139     uint32 mpll_clk_freq = EMC_GetPara()->arm_clk;
 140
 141     if (mpll_clk_freq == CHIP_CLK_26MHZ)
 142     {
 143         mcu_clock_select(MCU_CLK_XTL_SOURCE);
 144         return;
 145     }
 146     else if ((mpll_clk_freq >= CHIP_CLK_800MHZ) && (mpll_clk_freq <= CHIP_CLK_1200MHZ))
 147     {
 148         axi_div = 1;
 149         ahb_div = 3; // 1/4
 150         dbg_div = 7; // 1/8
 151     }
 152     else if ((mpll_clk_freq > CHIP_CLK_1200MHZ) && (mpll_clk_freq <= CHIP_CLK_1500MHZ))
 153     {
 154         axi_div = 3; // 1/4
 155         ahb_div = 7; // 1/8
 156         dbg_div = 7; // 1/8
 157     }
 158     else
 159     {
 160         SCI_ASSERT(0);
 161     }
 162
 163     mcu_clock_select(MCU_CLK_XTL_SOURCE);
 164
 165     set_gpu_clock_freq();
 166     set_arm_bus_clk_div(arm_drv, axi_div, ahb_div, dbg_div);
 167     set_mpll_clock_freq(mpll_clk_freq);
 168
 169     mcu_clock_select(MCU_CLK_MPLL_SOURCE);
 170 }
 171
 172 __inline LOCAL void set_XOSC32K_config(void)
 173 {
 174 #if defined(CONFIG_SC7710G2)
 175 // from 13.8uA to 7.8uA
 176     uint16 reg_read;
 177
 178     reg_read = ADI_Analogdie_reg_read(ANA_RTC_CTRL);
 179
 180     reg_read &= (~0xFF);
 181     reg_read |= 0x95;
 182
 183     ADI_Analogdie_reg_write(ANA_RTC_CTRL, reg_read);
 184 #endif
 185 }
 186
 187 __inline LOCAL void set_mem_volt(void)
 188 {
 189 #if defined(CONFIG_SC7710G2)
 190
 191     uint16 reg_read;
 192
 193     reg_read = ADI_Analogdie_reg_read(ANA_DCDC_MEM_CTL0);
 194
 195     reg_read &= (~7);
 196     reg_read |= 0x6; // dcdc mem 1.8V
 197
 198     ADI_Analogdie_reg_write(ANA_DCDC_MEM_CTL0, reg_read);
 199
 200     reg_read = ADI_Analogdie_reg_read(ANA_LDO_TRIM9);
 201
 202     reg_read &= (~0x1F);
 203
 204     ADI_Analogdie_reg_write(ANA_LDO_TRIM9, reg_read);
 205 #endif
 206 }
 207
 208
 209 __inline LOCAL void Chip_Workaround(void)
 210 {
 211 #if defined(CONFIG_SC7710G2)
 212         /* FIXME: disable otp for a-die internal bug */
 213         ANA_REG_OR(ANA_MIXED_CTRL, BIT_1/*BIT_OTP_EN_RST*/);
 214         ANA_REG_OR(ANA_DCDC_OPT_CTL, BIT_0/*BIT_DCDC_OTP_PD*/);
 215
 216         /* FIXME: enable dcdc wpa current limit
 217          * in order to prevent vbat drop when high load
 218          */
 219         ANA_REG_OR(ANA_WPA_DCDC_AP_CTL2, BIT_6/*BIT_WPA_DCDC_CL_CTRL_AP*/);
 220 #endif
 221 }
 222
 223 PUBLIC void Chip_Init(void)
 224 {
 225         Chip_Workaround();
 226
 227     if (CHIP_PHY_GetANAChipID() == ANA_CHIP_ID_AA)
 228     {
 229         set_mem_volt();
 230         set_XOSC32K_config();
 231     }
 232
 233     set_chip_clock_freq();
 234
 235     sdram_init();
 236
 237     return;
 238 }
 239
 240
 241 /**---------------------------------------------------------------------------*
 242  **                         Compiler Flag                                     *
 243  **---------------------------------------------------------------------------*/
 244 #ifdef __cplusplus
 245 }
 246 #endif