arch/arm/cpu/armv7/sc8810/ldo.c

   1 /******************************************************************************
   2  ** File Name:      ldo_drv.c                                             *
   3  ** Author:         Yi.Qiu                                                 *
   4  ** DATE:           01/09/2009                                                *
   5  ** Copyright:      2007 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file defines the basic function for ldo management.  *
   7  ******************************************************************************/
   8
   9 /******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 01/09/2009     Yi.Qiu        Create.                                   *
  14  ******************************************************************************/
  15
  16 /**---------------------------------------------------------------------------*
  17  **                         Dependencies                                      *
  18  **---------------------------------------------------------------------------*/
  19 #include <common.h>
  20 #include <asm/io.h>
  21
  22 #include <asm/arch/regs_global.h>
  23 #include <asm/arch/bits.h>
  24 #include <asm/arch/ldo.h>
  25 #include <asm/arch/regs_ana.h>
  26
  27 #define LDO_INVALID_REG 0xFFFFFFFF
  28 #define LDO_INVALID_BIT         0xFFFFFFFF
  29
  30
  31 #define CURRENT_STATUS_INIT     0x00000001
  32 #define CURRENT_STATUS_ON       0x00000002
  33 #define CURRENT_STATUS_OFF      0x00000004
  34
  35 #define LDO_INVALID_REG_ADDR            (0x1)
  36
  37 #define CHIP_REG_OR(reg_addr, value)    (*(volatile unsigned int *)(reg_addr) |= (unsigned int)(value))
  38 #define CHIP_REG_AND(reg_addr, value)   (*(volatile unsigned int *)(reg_addr) &= (unsigned int)(value))
  39 #define CHIP_REG_GET(reg_addr)          (*(volatile unsigned int *)(reg_addr))
  40 #define CHIP_REG_SET(reg_addr, value)   (*(volatile unsigned int *)(reg_addr)  = (unsigned int)(value))
  41
  42 #define SCI_PASSERT(condition, format...)  \
  43         do {            \
  44                 if(!(condition)) { \
  45                         printf("function :%s\r\n", __FUNCTION__);\
  46                         BUG();  \
  47                 } \
  48         }while(0)
  49
  50 struct ldo_ctl_info {
  51 /**
  52         need config area
  53 */
  54         LDO_ID_E id;
  55         unsigned int bp_reg;
  56         unsigned int bp_bits;
  57         unsigned int bp_rst_reg;
  58         unsigned int bp_rst;//bits
  59
  60         unsigned int level_reg_b0;
  61         unsigned int b0;
  62         unsigned int b0_rst;
  63
  64         unsigned int level_reg_b1;
  65         unsigned int b1;
  66         unsigned int b1_rst;
  67
  68         unsigned int init_level;
  69 /**
  70         not need config area
  71 */
  72         int ref;
  73         int current_status;
  74         int current_volt_level;
  75 };
  76
  77 struct ldo_sleep_ctl_info {
  78         SLP_LDO_E id;
  79         unsigned int ldo_sleep_reg;
  80         unsigned int mask;
  81         unsigned  int value;
  82 };
  83 #ifdef CONFIG_SC7710G2
  84 static struct ldo_ctl_info ldo_ctl_data[] =
  85 {
  86         {
  87                 .id = LDO_DCDCARM,
  88                 .bp_reg = ANA_LDO_PD_SET,
  89                 .bp_bits = BIT_11,
  90                 .bp_rst_reg = ANA_LDO_PD_RST,
  91                 .bp_rst = BIT_11,
  92                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
  93                 .b0 = 0,
  94                 .b0_rst = 0,
  95                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
  96                 .b1 = 0,
  97                 .b1_rst = 0,
  98                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
  99         },
 100         {
 101                 .id = LDO_LDO_VDD25,
 102                 .bp_reg = ANA_LDO_PD_SET,
 103                 .bp_bits = BIT_8,
 104                 .bp_rst_reg = ANA_LDO_PD_RST,
 105                 .bp_rst = BIT_8,
 106                 .level_reg_b0 = ANA_LDO_VCTL3,
 107                 .b0 = BIT_8,
 108                 .b0_rst = BIT_9,
 109                 .level_reg_b1 = ANA_LDO_VCTL3,
 110                 .b1 = BIT_10,
 111                 .b1_rst = BIT_11,
 112                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 113         },
 114         {
 115                 .id = LDO_LDO_VDD18,
 116                 .bp_reg = ANA_LDO_PD_SET,
 117                 .bp_bits = BIT_7,
 118                 .bp_rst_reg = ANA_LDO_PD_RST,
 119                 .bp_rst = BIT_7,
 120                 .level_reg_b0 = ANA_LDO_VCTL3,
 121                 .b0 = BIT_4,
 122                 .b0_rst = BIT_5,
 123                 .level_reg_b1 = ANA_LDO_VCTL3,
 124                 .b1 = BIT_6,
 125                 .b1_rst = BIT_7,
 126                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 127         },
 128         {
 129                 .id = LDO_LDO_VDD28,
 130                 .bp_reg = ANA_LDO_PD_SET,
 131                 .bp_bits = BIT_6,
 132                 .bp_rst_reg = ANA_LDO_PD_RST,
 133                 .bp_rst = BIT_6,
 134                 .level_reg_b0 = ANA_LDO_VCTL3,
 135                 .b0 = BIT_0,
 136                 .b0_rst = BIT_1,
 137                 .level_reg_b1 = ANA_LDO_VCTL3,
 138                 .b1 = BIT_2,
 139                 .b1_rst = BIT_3,
 140                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 141         },
 142         {
 143                 .id = LDO_LDO_ABB,
 144                 .bp_reg = ANA_LDO_PD_SET,
 145                 .bp_bits = BIT_5,
 146                 .bp_rst_reg = ANA_LDO_PD_RST,
 147                 .bp_rst = BIT_5,
 148                 .level_reg_b0 = ANA_LDO_VCTL0,
 149                 .b0 = BIT_12,
 150                 .b0_rst = BIT_13,
 151                 .level_reg_b1 = ANA_LDO_VCTL0,
 152                 .b1 = BIT_14,
 153                 .b1_rst = BIT_15,
 154                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 155         },
 156         {
 157                 .id = LDO_LDO_RF0,
 158                 .bp_reg = ANA_LDO_PD_SET,
 159                 .bp_bits = BIT_3,
 160                 .bp_rst_reg = ANA_LDO_PD_RST,
 161                 .bp_rst = BIT_3,
 162                 .level_reg_b0 = ANA_LDO_VCTL0,
 163                 .b0 = BIT_4,
 164                 .b0_rst = BIT_5,
 165                 .level_reg_b1 = ANA_LDO_VCTL0,
 166                 .b1 = BIT_6,
 167                 .b1_rst = BIT_7,
 168                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 169         },
 170         {
 171                 .id = LDO_LDO_RF1,
 172                 .bp_reg = ANA_LDO_PD_SET,
 173                 .bp_bits = BIT_4,
 174                 .bp_rst_reg = ANA_LDO_PD_RST,
 175                 .bp_rst = BIT_4,
 176                 .level_reg_b0 = ANA_LDO_VCTL0,
 177                 .b0 = BIT_8,
 178                 .b0_rst = BIT_9,
 179                 .level_reg_b1 = ANA_LDO_VCTL0,
 180                 .b1 = BIT_10,
 181                 .b1_rst = BIT_11,
 182                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 183         },
 184         {
 185                 .id = LDO_LDO_MEM,
 186                 .bp_reg = ANA_LDO_PD_SET,
 187                 .bp_bits = BIT_2,
 188                 .bp_rst_reg = ANA_LDO_PD_RST,
 189                 .bp_rst = BIT_2,
 190                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 191                 .b0 = 0,
 192                 .b0_rst = 0,
 193                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 194                 .b1 = 0,
 195                 .b1_rst = 0,
 196                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 197         },
 198         {
 199                 .id = LDO_DCDC,
 200                 .bp_reg = ANA_LDO_PD_SET,
 201                 .bp_bits = BIT_1,
 202                 .bp_rst_reg = ANA_LDO_PD_RST,
 203                 .bp_rst = BIT_1,
 204                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 205                 .b0 = 0,
 206                 .b0_rst = 0,
 207                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 208                 .b1 = 0,
 209                 .b1_rst = 0,
 210                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 211         },
 212         {
 213                 .id = LDO_LDO_BG,
 214                 .bp_reg = ANA_LDO_PD_SET,
 215                 .bp_bits = BIT_0,
 216                 .bp_rst_reg = ANA_LDO_PD_RST,
 217                 .bp_rst = BIT_0,
 218                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 219                 .b0 = 0,
 220                 .b0_rst = 0,
 221                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 222                 .b1 = 0,
 223                 .b1_rst = 0,
 224                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 225         },
 226         {
 227                 .id = LDO_LDO_SIM2,
 228                 .bp_reg = ANA_LDO_PD_CTL0,
 229                 .bp_bits = BIT_14,
 230                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 231                 .bp_rst = BIT_15,
 232                 .level_reg_b0 = ANA_LDO_VCTL1,
 233                 .b0 = BIT_8,
 234                 .b0_rst = BIT_9,
 235                 .level_reg_b1 = ANA_LDO_VCTL1,
 236                 .b1 = BIT_10,
 237                 .b1_rst = BIT_11,
 238                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 239         },
 240         {
 241                 .id = LDO_LDO_CAMA,
 242                 .bp_reg = ANA_LDO_PD_CTL0,
 243                 .bp_bits = BIT_12,
 244                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 245                 .bp_rst = BIT_13,
 246                 .level_reg_b0 = ANA_LDO_VCTL2,
 247                 .b0 = BIT_8,
 248                 .b0_rst = BIT_9,
 249                 .level_reg_b1 = ANA_LDO_VCTL2,
 250                 .b1 = BIT_10,
 251                 .b1_rst = BIT_11,
 252                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 253         },
 254         {
 255                 .id = LDO_LDO_CAMD1,
 256                 .bp_reg = ANA_LDO_PD_CTL0,
 257                 .bp_bits = BIT_10,
 258                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 259                 .bp_rst = BIT_11,
 260                 .level_reg_b0 = ANA_LDO_VCTL2,
 261                 .b0 = BIT_4,
 262                 .b0_rst = BIT_5,
 263                 .level_reg_b1 = ANA_LDO_VCTL2,
 264                 .b1 = BIT_6,
 265                 .b1_rst = BIT_7,
 266                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 267         },
 268         {
 269                 .id = LDO_LDO_CAMD0,
 270                 .bp_reg = ANA_LDO_PD_CTL0,
 271                 .bp_bits = BIT_8,
 272                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 273                 .bp_rst = BIT_9,
 274                 .level_reg_b0 = ANA_LDO_VCTL2,
 275                 .b0 = BIT_0,
 276                 .b0_rst = BIT_1,
 277                 .level_reg_b1 = ANA_LDO_VCTL2,
 278                 .b1 = BIT_2,
 279                 .b1_rst = BIT_3,
 280                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 281         },
 282         {
 283                 .id = LDO_LDO_SIM1,
 284                 .bp_reg = ANA_LDO_PD_CTL0,
 285                 .bp_bits = BIT_6,
 286                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 287                 .bp_rst = BIT_7,
 288                 .level_reg_b0 = ANA_LDO_VCTL1,
 289                 .b0 = BIT_4,
 290                 .b0_rst = BIT_5,
 291                 .level_reg_b1 = ANA_LDO_VCTL1,
 292                 .b1 = BIT_6,
 293                 .b1_rst = BIT_7,
 294                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 295         },
 296         {
 297                 .id = LDO_LDO_SIM0,
 298                 .bp_reg = ANA_LDO_PD_CTL0,
 299                 .bp_bits = BIT_4,
 300                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 301                 .bp_rst = BIT_5,
 302                 .level_reg_b0 = ANA_LDO_VCTL1,
 303                 .b0 = BIT_0,
 304                 .b0_rst = BIT_1,
 305                 .level_reg_b1 = ANA_LDO_VCTL1,
 306                 .b1 = BIT_2,
 307                 .b1_rst = BIT_3,
 308                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 309         },
 310         {
 311                 .id = LDO_LDO_SDIO0,
 312                 .bp_reg = ANA_LDO_PD_CTL0,
 313                 .bp_bits = BIT_2,
 314                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 315                 .bp_rst = BIT_3,
 316                 .level_reg_b0 = ANA_LDO_VCTL1,
 317                 .b0 = BIT_12,
 318                 .b0_rst = BIT_13,
 319                 .level_reg_b1 = ANA_LDO_VCTL1,
 320                 .b1 = BIT_14,
 321                 .b1_rst = BIT_15,
 322                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 323         },
 324         {
 325                 .id = LDO_LDO_USB,
 326                 .bp_reg = ANA_LDO_PD_CTL0,
 327                 .bp_bits = BIT_0,
 328                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 329                 .bp_rst = BIT_1,
 330                 .level_reg_b0 = ANA_LDO_VCTL2,
 331                 .b0 = BIT_12,
 332                 .b0_rst = BIT_13,
 333                 .level_reg_b1 = ANA_LDO_VCTL2,
 334                 .b1 = BIT_14,
 335                 .b1_rst = BIT_15,
 336                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 337         },
 338         {
 339                 .id = LDO_LDO_WIF1,
 340                 .bp_reg = ANA_LDO_PD_CTL1,
 341                 .bp_bits = BIT_2,
 342                 .bp_rst_reg = ANA_LDO_PD_CTL1,
 343                 .bp_rst = BIT_3,
 344                 .level_reg_b0 = ANA_LDO_VCTL4,
 345                 .b0 = BIT_0,
 346                 .b0_rst = BIT_1,
 347                 .level_reg_b1 = ANA_LDO_VCTL4,
 348                 .b1 = BIT_2,
 349                 .b1_rst = BIT_3,
 350                 .init_level = LDO_VOLT_LEVEL2,  //WIFI 1.8V
 351         },
 352         {
 353                 .id = LDO_LDO_WIF0,
 354                 .bp_reg = ANA_LDO_PD_CTL1,
 355                 .bp_bits = BIT_0,
 356                 .bp_rst_reg = ANA_LDO_PD_CTL1,
 357                 .bp_rst = BIT_1,
 358                 .level_reg_b0 = ANA_LDO_VCTL3,
 359                 .b0 = BIT_12,
 360                 .b0_rst = BIT_13,
 361                 .level_reg_b1 = ANA_LDO_VCTL3,
 362                 .b1 = BIT_14,
 363                 .b1_rst = BIT_15,
 364                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 365         },
 366         {
 367                 .id = LDO_LDO_RTC,
 368                 .bp_reg = LDO_INVALID_REG_ADDR,
 369                 .bp_bits = 0,
 370                 .bp_rst_reg = LDO_INVALID_REG_ADDR,
 371                 .bp_rst = 0,
 372                 .level_reg_b0 = ANA_LDO_VCTL0,
 373                 .b0 = 0,
 374                 .b0_rst = 1,
 375                 .level_reg_b1 = ANA_LDO_VCTL0,
 376                 .b1 = 2,
 377                 .b1_rst = 3,
 378                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 379         },
 380         {
 381                 .id = LDO_LDO_USBD,
 382                 .bp_reg = LDO_INVALID_REG_ADDR,
 383                 .bp_bits = 0,
 384                 .bp_rst_reg = LDO_INVALID_REG_ADDR,
 385                 .bp_rst = 0,
 386                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 387                 .b0 = 0,
 388                 .b0_rst = 0,
 389                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 390                 .b1 = 0,
 391                 .b1_rst = 0,
 392                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 393         },
 394         {
 395                 .id = LDO_LDO_SDIO3,//LDO_EMMIO
 396                 .bp_reg = ANA_LDO_PD_SET,
 397                 .bp_bits = BIT_10,
 398                 .bp_rst_reg = ANA_LDO_PD_RST,
 399                 .bp_rst = BIT_10,
 400                 .level_reg_b0 = ANA_LDO_VCTL4,
 401                 .b0 = BIT_12,
 402                 .b0_rst = BIT_13,
 403                 .level_reg_b1 = ANA_LDO_VCTL0,
 404                 .b1 = BIT_14,
 405                 .b1_rst = BIT_15,
 406                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 407         },
 408         {
 409                 .id = LDO_LDO_VDD30,//LDO_EMMCORE
 410                 .bp_reg = ANA_LDO_PD_SET,
 411                 .bp_bits = BIT_9,
 412                 .bp_rst_reg = ANA_LDO_PD_RST,
 413                 .bp_rst = BIT_9,
 414                 .level_reg_b0 = ANA_LDO_VCTL4,
 415                 .b0 = BIT_8,
 416                 .b0_rst = BIT_9,
 417                 .level_reg_b1 = ANA_LDO_VCTL4,
 418                 .b1 = BIT_10,
 419                 .b1_rst = BIT_11,
 420                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 421         },
 422 };
 423 static struct ldo_sleep_ctl_info slp_ldo_ctl_data[] = {
 424
 425 };
 426 #else
 427
 428 static struct ldo_ctl_info ldo_ctl_data[] =
 429 {
 430         {
 431                 .id = LDO_DCDCARM,
 432                 .bp_reg = ANA_LDO_PD_SET,
 433                 .bp_bits = BIT_9,
 434                 .bp_rst_reg = ANA_LDO_PD_RST,
 435                 .bp_rst = BIT_9,
 436                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 437                 .b0 = 0,
 438                 .b0_rst = 0,
 439                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 440                 .b1 = 0,
 441                 .b1_rst = 0,
 442                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 443         },
 444         {
 445                 .id = LDO_LDO_VDD25,
 446                 .bp_reg = ANA_LDO_PD_SET,
 447                 .bp_bits = BIT_8,
 448                 .bp_rst_reg = ANA_LDO_PD_RST,
 449                 .bp_rst = BIT_8,
 450                 .level_reg_b0 = ANA_LDO_VCTL3,
 451                 .b0 = BIT_8,
 452                 .b0_rst = BIT_9,
 453                 .level_reg_b1 = ANA_LDO_VCTL3,
 454                 .b1 = BIT_10,
 455                 .b1_rst = BIT_11,
 456                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 457         },
 458         {
 459                 .id = LDO_LDO_VDD18,
 460                 .bp_reg = ANA_LDO_PD_SET,
 461                 .bp_bits = BIT_7,
 462                 .bp_rst_reg = ANA_LDO_PD_RST,
 463                 .bp_rst = BIT_7,
 464                 .level_reg_b0 = ANA_LDO_VCTL3,
 465                 .b0 = BIT_4,
 466                 .b0_rst = BIT_5,
 467                 .level_reg_b1 = ANA_LDO_VCTL3,
 468                 .b1 = BIT_6,
 469                 .b1_rst = BIT_7,
 470                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 471         },
 472         {
 473                 .id = LDO_LDO_VDD28,
 474                 .bp_reg = ANA_LDO_PD_SET,
 475                 .bp_bits = BIT_6,
 476                 .bp_rst_reg = ANA_LDO_PD_RST,
 477                 .bp_rst = BIT_6,
 478                 .level_reg_b0 = ANA_LDO_VCTL3,
 479                 .b0 = BIT_0,
 480                 .b0_rst = BIT_1,
 481                 .level_reg_b1 = ANA_LDO_VCTL3,
 482                 .b1 = BIT_2,
 483                 .b1_rst = BIT_3,
 484                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 485         },
 486         {
 487                 .id = LDO_LDO_ABB,
 488                 .bp_reg = ANA_LDO_PD_SET,
 489                 .bp_bits = BIT_5,
 490                 .bp_rst_reg = ANA_LDO_PD_RST,
 491                 .bp_rst = BIT_5,
 492                 .level_reg_b0 = ANA_LDO_VCTL0,
 493                 .b0 = BIT_12,
 494                 .b0_rst = BIT_13,
 495                 .level_reg_b1 = ANA_LDO_VCTL0,
 496                 .b1 = BIT_14,
 497                 .b1_rst = BIT_15,
 498                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 499         },
 500         {
 501                 .id = LDO_LDO_RF0,
 502                 .bp_reg = ANA_LDO_PD_SET,
 503                 .bp_bits = BIT_3,
 504                 .bp_rst_reg = ANA_LDO_PD_RST,
 505                 .bp_rst = BIT_3,
 506                 .level_reg_b0 = ANA_LDO_VCTL0,
 507                 .b0 = BIT_4,
 508                 .b0_rst = BIT_5,
 509                 .level_reg_b1 = ANA_LDO_VCTL0,
 510                 .b1 = BIT_6,
 511                 .b1_rst = BIT_7,
 512                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 513         },
 514         {
 515                 .id = LDO_LDO_RF1,
 516                 .bp_reg = ANA_LDO_PD_SET,
 517                 .bp_bits = BIT_4,
 518                 .bp_rst_reg = ANA_LDO_PD_RST,
 519                 .bp_rst = BIT_4,
 520                 .level_reg_b0 = ANA_LDO_VCTL0,
 521                 .b0 = BIT_8,
 522                 .b0_rst = BIT_9,
 523                 .level_reg_b1 = ANA_LDO_VCTL0,
 524                 .b1 = BIT_10,
 525                 .b1_rst = BIT_11,
 526                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 527         },
 528         {
 529                 .id = LDO_LDO_MEM,
 530                 .bp_reg = ANA_LDO_PD_SET,
 531                 .bp_bits = BIT_2,
 532                 .bp_rst_reg = ANA_LDO_PD_RST,
 533                 .bp_rst = BIT_2,
 534                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 535                 .b0 = 0,
 536                 .b0_rst = 0,
 537                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 538                 .b1 = 0,
 539                 .b1_rst = 0,
 540                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 541         },
 542         {
 543                 .id = LDO_DCDC,
 544                 .bp_reg = ANA_LDO_PD_SET,
 545                 .bp_bits = BIT_1,
 546                 .bp_rst_reg = ANA_LDO_PD_RST,
 547                 .bp_rst = BIT_1,
 548                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 549                 .b0 = 0,
 550                 .b0_rst = 0,
 551                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 552                 .b1 = 0,
 553                 .b1_rst = 0,
 554                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 555         },
 556         {
 557                 .id = LDO_LDO_BG,
 558                 .bp_reg = ANA_LDO_PD_SET,
 559                 .bp_bits = BIT_0,
 560                 .bp_rst_reg = ANA_LDO_PD_RST,
 561                 .bp_rst = BIT_0,
 562                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 563                 .b0 = 0,
 564                 .b0_rst = 0,
 565                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 566                 .b1 = 0,
 567                 .b1_rst = 0,
 568                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 569         },
 570         {
 571                 .id = LDO_LDO_AVB,
 572                 .bp_reg = ANA_LDO_PD_CTL0,
 573                 .bp_bits = BIT_14,
 574                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 575                 .bp_rst = BIT_15,
 576                 .level_reg_b0 = ANA_LDO_VCTL1,
 577                 .b0 = BIT_8,
 578                 .b0_rst = BIT_9,
 579                 .level_reg_b1 = ANA_LDO_VCTL1,
 580                 .b1 = BIT_10,
 581                 .b1_rst = BIT_11,
 582                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 583         },
 584         {
 585                 .id = LDO_LDO_CAMA,
 586                 .bp_reg = ANA_LDO_PD_CTL0,
 587                 .bp_bits = BIT_12,
 588                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 589                 .bp_rst = BIT_13,
 590                 .level_reg_b0 = ANA_LDO_VCTL2,
 591                 .b0 = BIT_8,
 592                 .b0_rst = BIT_9,
 593                 .level_reg_b1 = ANA_LDO_VCTL2,
 594                 .b1 = BIT_10,
 595                 .b1_rst = BIT_11,
 596                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 597         },
 598         {
 599                 .id = LDO_LDO_CAMD1,
 600                 .bp_reg = ANA_LDO_PD_CTL0,
 601                 .bp_bits = BIT_10,
 602                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 603                 .bp_rst = BIT_11,
 604                 .level_reg_b0 = ANA_LDO_VCTL2,
 605                 .b0 = BIT_4,
 606                 .b0_rst = BIT_5,
 607                 .level_reg_b1 = ANA_LDO_VCTL2,
 608                 .b1 = BIT_6,
 609                 .b1_rst = BIT_7,
 610                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 611         },
 612         {
 613                 .id = LDO_LDO_CAMD0,
 614                 .bp_reg = ANA_LDO_PD_CTL0,
 615                 .bp_bits = BIT_8,
 616                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 617                 .bp_rst = BIT_9,
 618                 .level_reg_b0 = ANA_LDO_VCTL2,
 619                 .b0 = BIT_0,
 620                 .b0_rst = BIT_1,
 621                 .level_reg_b1 = ANA_LDO_VCTL2,
 622                 .b1 = BIT_2,
 623                 .b1_rst = BIT_3,
 624                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 625         },
 626         {
 627                 .id = LDO_LDO_SIM1,
 628                 .bp_reg = ANA_LDO_PD_CTL0,
 629                 .bp_bits = BIT_6,
 630                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 631                 .bp_rst = BIT_7,
 632                 .level_reg_b0 = ANA_LDO_VCTL1,
 633                 .b0 = BIT_4,
 634                 .b0_rst = BIT_5,
 635                 .level_reg_b1 = ANA_LDO_VCTL1,
 636                 .b1 = BIT_6,
 637                 .b1_rst = BIT_7,
 638                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 639         },
 640         {
 641                 .id = LDO_LDO_SIM0,
 642                 .bp_reg = ANA_LDO_PD_CTL0,
 643                 .bp_bits = BIT_4,
 644                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 645                 .bp_rst = BIT_5,
 646                 .level_reg_b0 = ANA_LDO_VCTL1,
 647                 .b0 = BIT_0,
 648                 .b0_rst = BIT_1,
 649                 .level_reg_b1 = ANA_LDO_VCTL1,
 650                 .b1 = BIT_2,
 651                 .b1_rst = BIT_3,
 652                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 653         },
 654         {
 655                 .id = LDO_LDO_SDIO0,
 656                 .bp_reg = ANA_LDO_PD_CTL0,
 657                 .bp_bits = BIT_2,
 658                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 659                 .bp_rst = BIT_3,
 660                 .level_reg_b0 = ANA_LDO_VCTL1,
 661                 .b0 = BIT_12,
 662                 .b0_rst = BIT_13,
 663                 .level_reg_b1 = ANA_LDO_VCTL1,
 664                 .b1 = BIT_14,
 665                 .b1_rst = BIT_15,
 666                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 667         },
 668         {
 669                 .id = LDO_LDO_USB,
 670                 .bp_reg = ANA_LDO_PD_CTL0,
 671                 .bp_bits = BIT_0,
 672                 .bp_rst_reg = ANA_LDO_PD_CTL0,
 673                 .bp_rst = BIT_1,
 674                 .level_reg_b0 = ANA_LDO_VCTL2,
 675                 .b0 = BIT_12,
 676                 .b0_rst = BIT_13,
 677                 .level_reg_b1 = ANA_LDO_VCTL2,
 678                 .b1 = BIT_14,
 679                 .b1_rst = BIT_15,
 680                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 681         },
 682         {
 683                 .id = LDO_LDO_SIM3,
 684                 .bp_reg = ANA_LDO_PD_CTL1,
 685                 .bp_bits = BIT_8,
 686                 .bp_rst_reg = ANA_LDO_PD_CTL1,
 687                 .bp_rst = BIT_9,
 688                 .level_reg_b0 = ANA_LDO_VCTL4,
 689                 .b0 = BIT_12,
 690                 .b0_rst = BIT_13,
 691                 .level_reg_b1 = ANA_LDO_VCTL4,
 692                 .b1 = BIT_14,
 693                 .b1_rst = BIT_15,
 694                 .init_level = LDO_VOLT_LEVEL3,  //CMMB 1.2V
 695         },
 696         {
 697                 .id = LDO_LDO_SIM2,
 698                 .bp_reg = ANA_LDO_PD_CTL1,
 699                 .bp_bits = BIT_6,
 700                 .bp_rst_reg = ANA_LDO_PD_CTL1,
 701                 .bp_rst = BIT_7,
 702                 .level_reg_b0 = ANA_LDO_VCTL4,
 703                 .b0 = BIT_8,
 704                 .b0_rst = BIT_9,
 705                 .level_reg_b1 = ANA_LDO_VCTL4,
 706                 .b1 = BIT_10,
 707                 .b1_rst = BIT_11,
 708                 .init_level = LDO_VOLT_LEVEL1,  //E-NAND 3.0V
 709         },
 710         {
 711                 .id = LDO_LDO_WIF1,
 712                 .bp_reg = ANA_LDO_PD_CTL1,
 713                 .bp_bits = BIT_4,
 714                 .bp_rst_reg = ANA_LDO_PD_CTL1,
 715                 .bp_rst = BIT_5,
 716                 .level_reg_b0 = ANA_LDO_VCTL4,
 717                 .b0 = BIT_4,
 718                 .b0_rst = BIT_5,
 719                 .level_reg_b1 = ANA_LDO_VCTL4,
 720                 .b1 = BIT_6,
 721                 .b1_rst = BIT_7,
 722                 .init_level = LDO_VOLT_LEVEL2,  //WIFI 1.8V
 723         },
 724         {
 725                 .id = LDO_LDO_WIF0,
 726                 .bp_reg = ANA_LDO_PD_CTL1,
 727                 .bp_bits = BIT_2,
 728                 .bp_rst_reg = ANA_LDO_PD_CTL1,
 729                 .bp_rst = BIT_3,
 730                 .level_reg_b0 = ANA_LDO_VCTL4,
 731                 .b0 = BIT_0,
 732                 .b0_rst = BIT_1,
 733                 .level_reg_b1 = ANA_LDO_VCTL4,
 734                 .b1 = BIT_2,
 735                 .b1_rst = BIT_3,
 736                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 737         },
 738         {
 739                 .id = LDO_LDO_SDIO1,
 740                 .bp_reg = ANA_LDO_PD_CTL1,
 741                 .bp_bits = BIT_0,
 742                 .bp_rst_reg = ANA_LDO_PD_CTL1,
 743                 .bp_rst = BIT_1,
 744                 .level_reg_b0 = ANA_LDO_VCTL3,
 745                 .b0 = BIT_12,
 746                 .b0_rst = BIT_13,
 747                 .level_reg_b1 = ANA_LDO_VCTL3,
 748                 .b1 = BIT_14,
 749                 .b1_rst = BIT_15,
 750                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 751         },
 752         {
 753                 .id = LDO_LDO_RTC,
 754                 .bp_reg = LDO_INVALID_REG_ADDR,
 755                 .bp_bits = 0,
 756                 .bp_rst_reg = LDO_INVALID_REG_ADDR,
 757                 .bp_rst = 0,
 758                 .level_reg_b0 = ANA_LDO_VCTL0,
 759                 .b0 = 0,
 760                 .b0_rst = 1,
 761                 .level_reg_b1 = ANA_LDO_VCTL0,
 762                 .b1 = 2,
 763                 .b1_rst = 3,
 764                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 765         },
 766         {
 767                 .id = LDO_LDO_USBD,
 768                 .bp_reg = LDO_INVALID_REG_ADDR,
 769                 .bp_bits = 0,
 770                 .bp_rst_reg = LDO_INVALID_REG_ADDR,
 771                 .bp_rst = 0,
 772                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 773                 .b0 = 0,
 774                 .b0_rst = 0,
 775                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 776                 .b1 = 0,
 777                 .b1_rst = 0,
 778                 .init_level = LDO_VOLT_LEVEL_FAULT_MAX,
 779         },
 780 };
 781
 782 static struct ldo_sleep_ctl_info slp_ldo_ctl_data[] = {
 783     {SLP_LDO_SDIO1,    ANA_LDO_SLP_CTL0,    BIT_14, 0},
 784     {SLP_LDO_VDD25,     ANA_LDO_SLP_CTL0,    BIT_13, 1},
 785     {SLP_LDO_VDD18,     ANA_LDO_SLP_CTL0,    BIT_12, 0},
 786     {SLP_LDO_VDD28,     ANA_LDO_SLP_CTL0,    BIT_11, 0},
 787     {SLP_LDO_AVDDBB,       ANA_LDO_SLP_CTL0,    BIT_10, 1},
 788     {SLP_LDO_SDIO0,      ANA_LDO_SLP_CTL0,    BIT_9,  1},
 789     {SLP_LDO_VB,       ANA_LDO_SLP_CTL0,    BIT_8,  0},
 790     {SLP_LDO_CAMA,      ANA_LDO_SLP_CTL0,    BIT_7,  1},
 791     {SLP_LDO_CAMD1,     ANA_LDO_SLP_CTL0,    BIT_6,  1},
 792     {SLP_LDO_CAMD0,     ANA_LDO_SLP_CTL0,    BIT_5,  1},
 793     {SLP_LDO_USBH,       ANA_LDO_SLP_CTL0,    BIT_4,  1},
 794     {SLP_LDO_SIM1,      ANA_LDO_SLP_CTL0,    BIT_3,  1},
 795     {SLP_LDO_SIM0,      ANA_LDO_SLP_CTL0,    BIT_2,  0},
 796     {SLP_LDO_RF1,       ANA_LDO_SLP_CTL0,    BIT_1,  1},
 797     {SLP_LDO_RF0,       ANA_LDO_SLP_CTL0,    BIT_0,  1},
 798 };
 799
 800 #endif
 801
 802  /**---------------------------------------------------------------------------*
 803  **                         Function Declaration                              *
 804  **---------------------------------------------------------------------------*/
 805 static struct ldo_ctl_info* LDO_GetLdoCtl(LDO_ID_E ldo_id)
 806 {
 807         int i = 0;
 808         struct ldo_ctl_info* ctl = NULL;
 809
 810         for ( i = 0; i < (int) ARRAY_SIZE(ldo_ctl_data); ++i) {
 811                 if (ldo_ctl_data[i].id == ldo_id) {
 812                         ctl = &ldo_ctl_data[i];
 813                         break;
 814                 }
 815         }
 816
 817         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 818         return ctl;
 819 }
 820
 821 LDO_ERR_E LDO_TurnOnLDO(LDO_ID_E ldo_id)
 822 {
 823         struct ldo_ctl_info* ctl = NULL;
 824
 825         ctl = LDO_GetLdoCtl(ldo_id);
 826         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 827
 828         if ((ctl->ref++) == 0) {
 829                 if(ctl->bp_reg == LDO_INVALID_REG_ADDR) {
 830                         if (LDO_LDO_USBD == ldo_id)
 831                                 CHIP_REG_AND((~LDO_USB_PD), GR_CLK_GEN5);
 832
 833                 } else {
 834                         if (ctl->bp_reg == ctl->bp_rst_reg) {
 835                                 REG_SETCLRBIT(ctl->bp_rst_reg, ctl->bp_rst, ctl->bp_bits);
 836                         }
 837                         else {
 838                                 ANA_REG_BIC(ctl->bp_reg, ctl->bp_bits);
 839                                 ANA_REG_OR(ctl->bp_rst_reg, ctl->bp_rst);//high priority
 840                         }
 841                 }
 842                 ctl->current_status = CURRENT_STATUS_ON;
 843         }
 844
 845         return LDO_ERR_OK;
 846 }
 847
 848
 849  LDO_ERR_E LDO_TurnOffLDO(LDO_ID_E ldo_id)
 850 {
 851         struct ldo_ctl_info* ctl = NULL;
 852         unsigned long flags;
 853
 854         ctl = LDO_GetLdoCtl(ldo_id);
 855         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 856
 857         local_irq_save(flags);
 858
 859         if ((--ctl->ref) == 0) {
 860                 if(ctl->bp_reg == LDO_INVALID_REG_ADDR) {
 861                         if (LDO_LDO_USBD == ldo_id)
 862                                 CHIP_REG_OR((LDO_USB_PD), GR_CLK_GEN5);
 863                 } else {
 864                         if (ctl->bp_reg == ctl->bp_rst_reg) {
 865                                 REG_SETCLRBIT(ctl->bp_reg, ctl->bp_bits, ctl->bp_rst);
 866                         }
 867                         else {
 868                                 ANA_REG_BIC(ctl->bp_rst_reg, ctl->bp_rst);//high priority
 869                                 ANA_REG_OR(ctl->bp_reg, ctl->bp_bits);
 870                         }
 871                 }
 872                 ctl->current_status = CURRENT_STATUS_OFF;
 873         }
 874
 875         local_irq_restore(flags);
 876
 877         return LDO_ERR_OK;
 878 }
 879
 880  int LDO_IsLDOOn(LDO_ID_E ldo_id)
 881 {
 882         unsigned int  masked_val = 0;
 883         struct ldo_ctl_info* ctl = NULL;
 884
 885         ctl = LDO_GetLdoCtl(ldo_id);
 886         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 887
 888         if (ctl->current_status == CURRENT_STATUS_INIT)
 889                 masked_val = (LDO_REG_GET(ctl->bp_reg) & ctl->bp_bits);
 890         else
 891                 return (ctl->current_status == CURRENT_STATUS_OFF ? 0 : 1);
 892
 893         return (masked_val ? 0 : 1);
 894 }
 895
 896  LDO_ERR_E LDO_SetVoltLevel(LDO_ID_E ldo_id, LDO_VOLT_LEVEL_E volt_level)
 897 {
 898         unsigned int b0_mask,b1_mask;
 899         struct ldo_ctl_info* ctl = NULL;
 900         unsigned long flags;
 901
 902         b0_mask = (volt_level & BIT_0)?~0:0;
 903         b1_mask = (volt_level & BIT_1)?~0:0;
 904
 905         ctl = LDO_GetLdoCtl(ldo_id);
 906         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 907
 908         if(ctl->level_reg_b0 == ctl->level_reg_b1) {
 909                 if (ctl->level_reg_b0 == LDO_INVALID_REG_ADDR)
 910                         goto Err_Exit;
 911                 else
 912                         SET_LEVEL(ctl->level_reg_b0, b0_mask, b1_mask, ctl->b0, ctl->b0_rst, ctl->b1, ctl->b1_rst);
 913         } else {
 914                 if (ctl->level_reg_b0 == LDO_INVALID_REG_ADDR || ctl->level_reg_b1 == LDO_INVALID_REG_ADDR) {
 915                         goto Err_Exit;
 916                 } else {
 917                         SET_LEVELBIT(ctl->level_reg_b0, b0_mask, ctl->b0, ctl->b0_rst);
 918                         SET_LEVELBIT(ctl->level_reg_b1, b1_mask, ctl->b1, ctl->b1_rst);
 919                 }
 920         }
 921
 922         ctl->current_volt_level = volt_level;
 923         return LDO_ERR_OK;
 924 Err_Exit:
 925         return LDO_ERR_ERR;
 926 }
 927
 928
 929  LDO_VOLT_LEVEL_E LDO_GetVoltLevel(LDO_ID_E ldo_id)
 930 {
 931         unsigned int level_ret = 0;
 932         struct ldo_ctl_info* ctl = NULL;
 933         unsigned long flags;
 934
 935         ctl = LDO_GetLdoCtl(ldo_id);
 936         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 937
 938         if (ctl->current_volt_level == LDO_VOLT_LEVEL_FAULT_MAX) {
 939                 if(ctl->level_reg_b0 == ctl->level_reg_b1) {
 940                         GET_LEVEL(ctl->level_reg_b0, ctl->b0, ctl->b1, level_ret);
 941                 } else {
 942                         GET_LEVELBIT(ctl->level_reg_b0, ctl->b0, BIT_0, level_ret);
 943                         GET_LEVELBIT(ctl->level_reg_b1, ctl->b1, BIT_1, level_ret);
 944                 }
 945         }
 946         else
 947         {
 948                 level_ret = ctl->current_volt_level;
 949         }
 950
 951         return level_ret;
 952 }
 953
 954 void LDO_DeepSleepInit(void)
 955 {
 956         int i;
 957         unsigned int aux;
 958
 959         for ( i = 0; i < ARRAY_SIZE(slp_ldo_ctl_data); ++i) {
 960                 aux = ANA_REG_GET(slp_ldo_ctl_data[i].ldo_sleep_reg);
 961
 962                 if(slp_ldo_ctl_data[i].value)
 963                 {
 964                         aux |= slp_ldo_ctl_data[i].mask;
 965                 }
 966                 else
 967                 {
 968                         aux &= ~slp_ldo_ctl_data[i].mask;
 969                 }
 970
 971                 ANA_REG_SET(slp_ldo_ctl_data[i].ldo_sleep_reg, aux);
 972         }
 973
 974 }
 975
 976 int LDO_Init(void)
 977 {
 978         int i;
 979         for ( i = 0; i < ARRAY_SIZE(ldo_ctl_data); ++i) {
 980                 if( ldo_ctl_data[i].init_level != LDO_VOLT_LEVEL_FAULT_MAX) {
 981                         LDO_SetVoltLevel(ldo_ctl_data[i].id, ldo_ctl_data[i].init_level);
 982                 }
 983                 ldo_ctl_data[i].ref = 0;
 984                 ldo_ctl_data[i].current_status = CURRENT_STATUS_INIT;
 985                 ldo_ctl_data[i].current_volt_level = ldo_ctl_data[i].init_level;
 986         }
 987
 988         LDO_DeepSleepInit();
 989
 990         return LDO_ERR_OK;
 991 }
 992
 993 static void LDO_TurnOffCoreLDO(void)
 994 {
 995         ANA_REG_SET (ANA_LDO_PD_RST, 0);
 996         ANA_REG_SET (ANA_LDO_PD_SET, ANA_LDO_PD_SET_MSK);/// turn off system core ldo
 997 }
 998
 999 static void LDO_TurnOffAllModuleLDO(void)
1000 {
1001 #ifndef CONFIG_SC7710G2
1002         ANA_REG_OR(ANA_AUDIO_PA_CTL1, PA_LDO_EN_RST);///PA poweroff
1003 #endif
1004         ANA_REG_SET (ANA_LDO_PD_CTL1, ANA_LDO_PD_CTL_MSK);
1005         ANA_REG_SET (ANA_LDO_PD_CTL0, ANA_LDO_PD_CTL_MSK);
1006 }
1007
1008 void LDO_TurnOffAllLDO(void)
1009 {
1010         LDO_TurnOffAllModuleLDO();
1011         LDO_TurnOffCoreLDO();
1012 }
1013