workaround to set VC1 overlap filter flag
authorLi, Xiaowei A <xiaowei.a.li@intel.com>
Wed, 12 Dec 2012 02:04:37 +0000 (10:04 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Mon, 17 Dec 2012 03:20:36 +0000 (11:20 +0800)
Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com>
src/gen6_mfd.c
src/gen75_mfd.c
src/gen7_mfd.c

index 9afa7dd..e8b394c 100755 (executable)
@@ -1706,9 +1706,26 @@ gen6_mfd_vc1_pic_state(VADriverContextP ctx,
             brfd = 0;
     }
 
-    overlap = pic_param->sequence_fields.bits.overlap;
-    if (profile != GEN6_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9)
-        overlap = 0;
+    overlap = 0;
+    if (profile != GEN6_VC1_ADVANCED_PROFILE){
+       if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+           overlap = 1; 
+        }
+    }else {
+        if (pic_param->picture_fields.bits.picture_type == GEN6_VC1_P_PICTURE &&
+             pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+              overlap = 1; 
+        }
+        if (pic_param->picture_fields.bits.picture_type == GEN6_VC1_I_PICTURE ||
+            pic_param->picture_fields.bits.picture_type == GEN6_VC1_BI_PICTURE){
+             if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+                overlap = 1; 
+             }else if(pic_param->conditional_overlap_flag == 2 ||
+                      pic_param->conditional_overlap_flag == 3){
+                overlap = 1;
+             }
+         }
+    } 
 
     assert(pic_param->conditional_overlap_flag < 3);
     assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */
index 9443c83..ab92d2a 100644 (file)
@@ -2008,9 +2008,26 @@ gen75_mfd_vc1_pic_state(VADriverContextP ctx,
             brfd = 0;
     }
 
-    overlap = pic_param->sequence_fields.bits.overlap;
-    if (profile != GEN7_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9)
-        overlap = 0;
+    overlap = 0;
+    if (profile != GEN7_VC1_ADVANCED_PROFILE){
+       if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+           overlap = 1; 
+        }
+    }else {
+        if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_P_PICTURE &&
+             pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+              overlap = 1; 
+        }
+        if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_I_PICTURE ||
+            pic_param->picture_fields.bits.picture_type == GEN7_VC1_BI_PICTURE){
+             if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+                overlap = 1; 
+             }else if(pic_param->conditional_overlap_flag == 2 ||
+                      pic_param->conditional_overlap_flag == 3){
+                overlap = 1;
+             }
+         }
+    } 
 
     assert(pic_param->conditional_overlap_flag < 3);
     assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */
index 0777ea8..ca4b5e0 100755 (executable)
@@ -1683,9 +1683,26 @@ gen7_mfd_vc1_pic_state(VADriverContextP ctx,
             brfd = 0;
     }
 
-    overlap = pic_param->sequence_fields.bits.overlap;
-    if (profile != GEN7_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9)
-        overlap = 0;
+    overlap = 0;
+    if (profile != GEN7_VC1_ADVANCED_PROFILE){
+       if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+           overlap = 1; 
+        }
+    }else {
+        if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_P_PICTURE &&
+             pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+              overlap = 1; 
+        }
+        if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_I_PICTURE ||
+            pic_param->picture_fields.bits.picture_type == GEN7_VC1_BI_PICTURE){
+             if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){
+                overlap = 1; 
+             }else if(pic_param->conditional_overlap_flag == 2 ||
+                      pic_param->conditional_overlap_flag == 3){
+                overlap = 1;
+             }
+         }
+    } 
 
     assert(pic_param->conditional_overlap_flag < 3);
     assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */