return VA_STATUS_SUCCESS;
}
-static void
-gen6_mfc_qm_state(VADriverContextP ctx,
- int qm_type,
- unsigned int *qm,
- int qm_length,
- struct intel_encoder_context *encoder_context)
-{
- struct intel_batchbuffer *batch = encoder_context->base.batch;
- unsigned int qm_buffer[16];
-
- assert(qm_length <= 16);
- assert(sizeof(*qm) == 4);
- memcpy(qm_buffer, qm, qm_length * 4);
-
- BEGIN_BCS_BATCH(batch, 18);
- OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2));
- OUT_BCS_BATCH(batch, qm_type << 0);
- intel_batchbuffer_data(batch, qm_buffer, 16 * 4);
- ADVANCE_BCS_BATCH(batch);
-}
-
-static void
-gen6_mfc_fqm_state(VADriverContextP ctx,
- int fqm_type,
- unsigned int *fqm,
- int fqm_length,
- struct intel_encoder_context *encoder_context)
-{
- struct intel_batchbuffer *batch = encoder_context->base.batch;
- unsigned int fqm_buffer[32];
-
- assert(fqm_length <= 32);
- assert(sizeof(*fqm) == 4);
- memcpy(fqm_buffer, fqm, fqm_length * 4);
-
- BEGIN_BCS_BATCH(batch, 34);
- OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2));
- OUT_BCS_BATCH(batch, fqm_type << 0);
- intel_batchbuffer_data(batch, fqm_buffer, 32 * 4);
- ADVANCE_BCS_BATCH(batch);
-}
-
VAStatus
gen6_mfc_pipeline(VADriverContextP ctx,
VAProfile profile,
struct intel_encoder_context *encoder_context)
{
struct gen6_vme_context *vme_context = encoder_context->vme_context;
- int mb_x = 0, mb_y = 0;
int mb_row;
int s;
unsigned int *command_ptr;
- int temp;
-
#define USE_SCOREBOARD (1 << 21)
xtemp_outer = 0;
x_outer = xtemp_outer;
y_outer = first_mb / mb_width;
- temp = 0;
for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) {
y_inner = y_outer;
x_inner = x_outer;
int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
int i, j;
int h_start_pos, v_start_pos, h_next_start_pos, v_next_start_pos;
- unsigned int *msg = NULL, offset = 0;
+ unsigned int *msg = NULL;
unsigned char *msg_ptr = NULL;
slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[slice_index]->buffer;
struct decode_state *decode_state,
struct gen7_mfd_context *gen7_mfd_context)
{
- struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = gen7_mfd_context->base.batch;
BEGIN_BCS_BATCH(batch, 10);
struct decode_state *decode_state,
struct gen7_mfd_context *gen7_mfd_context)
{
- struct i965_driver_data * const i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = gen7_mfd_context->base.batch;
VAPictureParameterBufferMPEG2 *pic_param;
unsigned int slice_concealment_disable_bit = 0;
VASliceParameterBufferMPEG2 *next_slice_param,
struct gen7_mfd_context *gen7_mfd_context)
{
- struct i965_driver_data * const i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = gen7_mfd_context->base.batch;
unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16;
int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic_wa, is_field_pic = 0;
union codec_state *codec_state,
struct hw_context *hw_context);
+extern struct hw_context *
+i965_proc_context_init(VADriverContextP ctx,
+ struct object_config *obj_config);
+
static VAStatus
gen75_vpp_fmt_cvt(VADriverContextP ctx,
VAProfile profile,
}
i965_proc_picture(ctx, profile, codec_state,
- (struct hw_context *) proc_ctx->vpp_fmt_cvt_ctx);
+ proc_ctx->vpp_fmt_cvt_ctx);
return va_status;
}
VADriverContextP ctx = (VADriverContextP)(proc_ctx->driver_context);
if(proc_ctx->vpp_fmt_cvt_ctx){
- proc_ctx->vpp_fmt_cvt_ctx->base.destroy(proc_ctx->vpp_fmt_cvt_ctx);
+ proc_ctx->vpp_fmt_cvt_ctx->destroy(proc_ctx->vpp_fmt_cvt_ctx);
proc_ctx->vpp_fmt_cvt_ctx = NULL;
}
void* driver_context;
struct intel_vebox_context *vpp_vebox_ctx;
- struct i965_proc_context *vpp_fmt_cvt_ctx;
+ struct hw_context *vpp_fmt_cvt_ctx;
struct vpp_gpe_context *vpp_gpe_ctx;
VAProcPipelineParameterBuffer* pipeline_param;
static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
{
- struct i965_driver_data *i965 = i965_driver_data(ctx);
struct gen6_vme_context *vme_context = encoder_context->vme_context;
- dri_bo *bo;
i965_gpe_context_init(ctx, &vme_context->gpe_context);
VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
- int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I;
int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
int kernel_shader;
memset(desc, 0, sizeof(*desc));
desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6);
desc->desc2.sampler_count = 0; /* FIXME: */
- desc->desc2.sampler_state_pointer = NULL;
+ desc->desc2.sampler_state_pointer = 0;
desc->desc3.binding_table_entry_count = 6; /* FIXME: */
desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
desc->desc4.constant_urb_entry_read_offset = 0;
if(vpp_gpe_ctx->surface_tmp){
i965_DestroySurfaces(ctx, &vpp_gpe_ctx->surface_tmp, 1);
- vpp_gpe_ctx->surface_tmp = NULL;
+ vpp_gpe_ctx->surface_tmp = 0;
}
free(vpp_gpe_ctx->batch);
free(vpp_gpe_ctx);
}
-struct hw_context *
+struct vpp_gpe_context *
gen75_gpe_context_init(VADriverContextP ctx)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
vpp_gpe_ctx->is_first_frame = 1;
- return (struct hw_context *)vpp_gpe_ctx;
+ return vpp_gpe_ctx;
}
unsigned long surface_state_offset);
};
-struct hw_context*
+struct vpp_gpe_context *
gen75_gpe_context_init(VADriverContextP ctx);
void
extern VAStatus
i965_DestroyImage(VADriverContextP ctx, VAImageID image);
+extern VAStatus
+i965_DestroySurfaces(VADriverContextP ctx,
+ VASurfaceID *surface_list,
+ int num_surfaces);
+
+extern VAStatus
+i965_CreateSurfaces(VADriverContextP ctx,
+ int width,
+ int height,
+ int format,
+ int num_surfaces,
+ VASurfaceID *surfaces);
+VAStatus
+vpp_surface_convert(VADriverContextP ctx,
+ VASurfaceID dstSurfaceID,
+ VASurfaceID srcSurfaceID);
VAStatus vpp_surface_copy(VADriverContextP ctx, VASurfaceID dstSurfaceID, VASurfaceID srcSurfaceID)
{
VAStatus va_status = VA_STATUS_SUCCESS;
VAImage srcImage, dstImage;
void *pBufferSrc, *pBufferDst;
- unsigned char *ySrc, *yDst;
va_status = vpp_surface_convert(ctx, dstSurfaceID, srcSurfaceID);
if(va_status == VA_STATUS_SUCCESS){
va_status = i965_MapBuffer(ctx, dstImage.buf, &pBufferDst);
assert(va_status == VA_STATUS_SUCCESS);
- ySrc = (unsigned char*)(pBufferSrc + srcImage.offsets[0]);
- yDst = (unsigned char*)(pBufferDst + dstImage.offsets[0]);
-
memcpy(pBufferDst, pBufferSrc, dstImage.data_size);
i965_UnmapBuffer(ctx, srcImage.buf);
unsigned char frame_ctrl_bits = 0;
unsigned int startingX = 0;
unsigned int endingX = proc_ctx->width_input;
- VEBFrameStore tempFrame;
/* s1:update the previous and current input */
/* tempFrame = proc_ctx->frame_store[FRAME_IN_PREVIOUS];
proc_ctx ->height_input,
VA_RT_FORMAT_YUV420,
FRAME_STORE_SUM,
- &surfaces);
+ surfaces);
assert(va_status == VA_STATUS_SUCCESS);
for(i = 0; i < FRAME_STORE_SUM; i ++) {
struct object_surface* obj_surf_output = SURFACE(proc_ctx->surface_output);
struct object_surface* obj_surf_input_vebox;
struct object_surface* obj_surf_output_vebox;
- struct object_surface* obj_surf_output_scaled;
proc_ctx->width_input = obj_surf_input->orig_width;
proc_ctx->height_input = obj_surf_input->orig_height;
struct i965_driver_data *i965 = i965_driver_data(ctx);
VAProcPipelineParameterBuffer *pipe = proc_ctx->pipeline_param;
- VABufferID *filter_ids = (VABufferID*)proc_ctx->pipeline_param->filters ;
VAProcFilterParameterBuffer* filter = NULL;
struct object_buffer *obj_buf = NULL;
unsigned int i;
void gen75_vebox_context_destroy(VADriverContextP ctx,
struct intel_vebox_context *proc_ctx)
{
- struct i965_driver_data *i965 = i965_driver_data(ctx);
- struct object_surface * obj_surf = NULL;
int i;
if(proc_ctx->surface_input_vebox != -1){
- obj_surf = SURFACE(proc_ctx->surface_input_vebox);
i965_DestroySurfaces(ctx, &proc_ctx->surface_input_vebox, 1);
proc_ctx->surface_input_vebox = -1;
}
if(proc_ctx->surface_output_vebox != -1){
- obj_surf = SURFACE(proc_ctx->surface_output_vebox);
i965_DestroySurfaces(ctx, &proc_ctx->surface_output_vebox, 1);
proc_ctx->surface_output_vebox = -1;
}
if(proc_ctx->surface_output_scaled != -1){
- obj_surf = SURFACE(proc_ctx->surface_output_scaled);
i965_DestroySurfaces(ctx, &proc_ctx->surface_output_scaled, 1);
proc_ctx->surface_output_scaled = -1;
}
int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
int i, j;
int h_start_pos, v_start_pos, h_next_start_pos, v_next_start_pos;
- unsigned int *msg = NULL, offset = 0;
+ unsigned int *msg = NULL;
unsigned char *msg_ptr = NULL;
slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[slice_index]->buffer;
#include <string.h>
#include <alloca.h>
#include "intel_batchbuffer.h"
-#include "i965_decoder_utils.h"
#include "i965_drv_video.h"
+#include "i965_decoder_utils.h"
#include "i965_defines.h"
/* Set reference surface if backing store exists */
#define I965_RENDER_ENCODE_BUFFER(name) I965_RENDER_BUFFER(encode, name)
#define DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(name, member) DEF_RENDER_SINGLE_BUFFER_FUNC(encode, name, member)
-DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(sequence_parameter, seq_param)
-DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_parameter, pic_param)
-DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_control, pic_control)
+// DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(sequence_parameter, seq_param)
+// DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_parameter, pic_param)
+// DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_control, pic_control)
DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(qmatrix, q_matrix)
DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(iqmatrix, iq_matrix)
/* extended buffer */
DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_parameter_ext, pic_param_ext)
#define DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(name, member) DEF_RENDER_MULTI_BUFFER_FUNC(encode, name, member)
-DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(slice_parameter, slice_params)
+// DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(slice_parameter, slice_params)
DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(slice_parameter_ext, slice_params_ext)
static VAStatus
assert(encode->last_packed_header_type == VAEncPackedHeaderSequence ||
encode->last_packed_header_type == VAEncPackedHeaderPicture ||
encode->last_packed_header_type == VAEncPackedHeaderSlice ||
- ((encode->last_packed_header_type & VAEncPackedHeaderMiscMask == VAEncPackedHeaderMiscMask) &&
- (encode->last_packed_header_type & (~VAEncPackedHeaderMiscMask) != 0)));
+ (((encode->last_packed_header_type & VAEncPackedHeaderMiscMask) == VAEncPackedHeaderMiscMask) &&
+ ((encode->last_packed_header_type & (~VAEncPackedHeaderMiscMask)) != 0)));
vaStatus = i965_encoder_render_packed_header_data_buffer(ctx,
obj_context,
obj_buffer,
struct object_image *obj_image;
struct object_surface *obj_surface;
VAImageID image_id;
- unsigned int w_pitch, h_pitch;
+ unsigned int w_pitch;
VAStatus va_status = VA_STATUS_ERROR_OPERATION_FAILED;
out_image->image_id = VA_INVALID_ID;
assert(obj_surface->fourcc);
w_pitch = obj_surface->width;
- h_pitch = obj_surface->height;
image_id = NEW_IMAGE_ID();
struct object_surface *obj_surface,
struct gen7_surface_state *ss)
{
- int w, h, w_pitch;
+ int w, w_pitch;
unsigned int tiling, swizzle;
int cbcr_offset;
dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle);
w = obj_surface->orig_width;
- h = obj_surface->orig_height;
w_pitch = obj_surface->width;
cbcr_offset = obj_surface->height * obj_surface->width;
struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
int width[3], height[3], pitch[3], offset[3];
- const int Y = 0;
/* source surface */
pp_set_media_rw_message_surface(ctx, pp_context, src_surface, 1, 0,
void intel_batchbuffer_start_atomic(struct intel_batchbuffer *batch, unsigned int size);
void intel_batchbuffer_start_atomic_bcs(struct intel_batchbuffer *batch, unsigned int size);
void intel_batchbuffer_start_atomic_blt(struct intel_batchbuffer *batch, unsigned int size);
+void intel_batchbuffer_start_atomic_veb(struct intel_batchbuffer *batch, unsigned int size);
void intel_batchbuffer_end_atomic(struct intel_batchbuffer *batch);
void intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, unsigned int x);
void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, dri_bo *bo,
char config_data[16];
fp = fopen("/sys/devices/pci0000:00/0000:00:02.0/config", "r");
- fread(config_data, 1, 16, fp);
- fclose(fp);
- *value = config_data[PCI_REVID];
+
+ if (fp) {
+ if (fread(config_data, 1, 16, fp))
+ *value = config_data[PCI_REVID];
+ else
+ *value = 2; /* assume it is at least B-steping */
+ fclose(fp);
+ } else {
+ *value = 2; /* assume it is at least B-steping */
+ }
+
return;
}