Add support for native Solaris compiler on x86.

Original patch by Ginn Chen <ginn.chen@oracle.com> against libvpx
 v0.9.0.
I've forward-ported it to the current version (which mostly
 involved removing hunks that were no longer relevant), since I've
 given up on getting Ginn to submit this upstream himself.

Change-Id: I403c757c831c78d820ebcfe417e717b470a1d022

diff --git a/vpx_ports/mem.h b/vpx_ports/mem.h
index 9ec34fe..29e507f 100644 (file)
--- a/vpx_ports/mem.h
+++ b/vpx_ports/mem.h
@@ -14,7 +14,7 @@
 #include "vpx_config.h"
 #include "vpx/vpx_integer.h"
 
-#if defined(__GNUC__) && __GNUC__
+#if (defined(__GNUC__) && __GNUC__) || defined(__SUNPRO_C)
 #define DECLARE_ALIGNED(n,typ,val)  typ val __attribute__ ((aligned (n)))
 #elif defined(_MSC_VER)
 #define DECLARE_ALIGNED(n,typ,val)  __declspec(align(n)) typ val

diff --git a/vpx_ports/x86.h b/vpx_ports/x86.h
index 1f3d5eb..1341c7f 100644 (file)
--- a/vpx_ports/x86.h
+++ b/vpx_ports/x86.h
@@ -50,6 +50,26 @@ typedef enum
                           : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
                           : "a" (func));
 #endif
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+#if ARCH_X86_64
+#define cpuid(func,ax,bx,cx,dx)\
+    asm volatile (\
+                  "xchg %rsi, %rbx \n\t" \
+                  "cpuid           \n\t" \
+                  "movl %ebx, %edi \n\t" \
+                  "xchg %rsi, %rbx \n\t" \
+                  : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
+                  : "a"  (func));
+#else
+#define cpuid(func,ax,bx,cx,dx)\
+    asm volatile (\
+                  "pushl %ebx       \n\t" \
+                  "cpuid            \n\t" \
+                  "movl %ebx, %edi  \n\t" \
+                  "popl %ebx        \n\t" \
+                  : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
+                  : "a" (func));
+#endif
 #else
 #if ARCH_X86_64
 void __cpuid(int CPUInfo[4], int info_type);
@@ -136,6 +156,10 @@ x86_readtsc(void)
     unsigned int tsc;
     __asm__ __volatile__("rdtsc\n\t":"=a"(tsc):);
     return tsc;
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+    unsigned int tsc;
+    asm volatile("rdtsc\n\t":"=a"(tsc):);
+    return tsc;
 #else
 #if ARCH_X86_64
     return __rdtsc();
@@ -149,6 +173,9 @@ x86_readtsc(void)
 #if defined(__GNUC__) && __GNUC__
 #define x86_pause_hint()\
     __asm__ __volatile__ ("pause \n\t")
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+#define x86_pause_hint()\
+    asm volatile ("pause \n\t")
 #else
 #if ARCH_X86_64
 #define x86_pause_hint()\
@@ -172,6 +199,19 @@ x87_get_control_word(void)
     __asm__ __volatile__("fstcw %0\n\t":"=m"(*&mode):);
     return mode;
 }
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+static void
+x87_set_control_word(unsigned short mode)
+{
+    asm volatile("fldcw %0" : : "m"(*&mode));
+}
+static unsigned short
+x87_get_control_word(void)
+{
+    unsigned short mode;
+    asm volatile("fstcw %0\n\t":"=m"(*&mode):);
+    return mode;
+}
 #elif ARCH_X86_64
 /* No fldcw intrinsics on Windows x64, punt to external asm */
 extern void           vpx_winx64_fldcw(unsigned short mode);