aco/gfx11: fix get_gfx11_true16_mask with v_cmp_class_f16

The second operand is 16bit, so the we need to use VOP3 to address v128-v255.

Closes: #9413
Fixes: 6872f8d861b ("aco/gfx11: allow true 16-bit instructions to access v128+")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24294>

diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index 5119890..31bde56 100644 (file)
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -688,11 +688,10 @@ get_gfx11_true16_mask(aco_opcode op)
    case aco_opcode::v_and_b16:
    case aco_opcode::v_or_b16:
    case aco_opcode::v_xor_b16: return 0x3 | 0x8;
-   case aco_opcode::v_cmp_class_f16:
-   case aco_opcode::v_cmpx_class_f16:
    case aco_opcode::v_cvt_f32_f16:
    case aco_opcode::v_cvt_i32_i16:
    case aco_opcode::v_cvt_u32_u16: return 0x1;
+   case aco_opcode::v_cmp_class_f16:
    case aco_opcode::v_cmp_eq_f16:
    case aco_opcode::v_cmp_eq_i16:
    case aco_opcode::v_cmp_eq_u16:
@@ -719,6 +718,7 @@ get_gfx11_true16_mask(aco_opcode op)
    case aco_opcode::v_cmp_nlt_f16:
    case aco_opcode::v_cmp_o_f16:
    case aco_opcode::v_cmp_u_f16:
+   case aco_opcode::v_cmpx_class_f16:
    case aco_opcode::v_cmpx_eq_f16:
    case aco_opcode::v_cmpx_eq_i16:
    case aco_opcode::v_cmpx_eq_u16: