unsigned int vfe_fence, cs_fence;
vfe_fence = avc_hw_scoreboard_context->urb.cs_start;
- cs_fence = URB_SIZE((&i965->intel));
+ cs_fence = i965->intel.device_info->urb_size;
BEGIN_BATCH(batch, 3);
OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1);
avc_hw_scoreboard_context->urb.cs_start = avc_hw_scoreboard_context->urb.vfe_start +
avc_hw_scoreboard_context->urb.num_vfe_entries * avc_hw_scoreboard_context->urb.size_vfe_entry;
assert(avc_hw_scoreboard_context->urb.cs_start +
- avc_hw_scoreboard_context->urb.num_cs_entries * avc_hw_scoreboard_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
+ avc_hw_scoreboard_context->urb.num_cs_entries * avc_hw_scoreboard_context->urb.size_cs_entry <= i965->intel.device_info->urb_size);
}
}
unsigned int vfe_fence, cs_fence;
vfe_fence = avc_ildb_context->urb.cs_start;
- cs_fence = URB_SIZE((&i965->intel));
+ cs_fence = i965->intel.device_info->urb_size;
BEGIN_BATCH(batch, 3);
OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1);
avc_ildb_context->urb.cs_start = avc_ildb_context->urb.vfe_start +
avc_ildb_context->urb.num_vfe_entries * avc_ildb_context->urb.size_vfe_entry;
assert(avc_ildb_context->urb.cs_start +
- avc_ildb_context->urb.num_cs_entries * avc_ildb_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
+ avc_ildb_context->urb.num_cs_entries * avc_ildb_context->urb.size_cs_entry <= i965->intel.device_info->urb_size);
for (i = 0; i < NUM_AVC_ILDB_SURFACES; i++) {
dri_bo_unreference(avc_ildb_context->surface[i].s_bo);
#define SUBSAMPLE_YUV411 5
#define SUBSAMPLE_RGBX 6
-#define URB_SIZE(intel) (IS_GEN7(intel->device_id) ? 4096 : \
- IS_GEN8(intel->device_id) ? 4096 : \
- IS_GEN6(intel->device_id) ? 1024 : \
- IS_IRONLAKE(intel->device_id) ? 1024 : \
- IS_G4X(intel->device_id) ? 384 : 256)
-
#endif /* _I965_DEFINES_H_ */
unsigned int vfe_fence, cs_fence;
vfe_fence = media_context->urb.cs_start;
- cs_fence = URB_SIZE((&i965->intel));
+ cs_fence = i965->intel.device_info->urb_size;
BEGIN_BATCH(batch, 3);
OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1);
media_context->urb.cs_start = media_context->urb.vfe_start +
media_context->urb.num_vfe_entries * media_context->urb.size_vfe_entry;
assert(media_context->urb.cs_start +
- media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
+ media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= i965->intel.device_info->urb_size);
/* hook functions */
media_context->media_states_setup = i965_media_h264_states_setup;
media_context->urb.cs_start = media_context->urb.vfe_start +
media_context->urb.num_vfe_entries * media_context->urb.size_vfe_entry;
assert(media_context->urb.cs_start +
- media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
+ media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= i965->intel.device_info->urb_size);
/* hook functions */
media_context->media_states_setup = i965_media_mpeg2_states_setup;
};
if (IS_IRONLAKE(i965->intel.device_id)) {
- pp_context->urb.size = URB_SIZE((&i965->intel));
+ pp_context->urb.size = i965->intel.device_info->urb_size;
pp_context->urb.num_vfe_entries = 32;
pp_context->urb.size_vfe_entry = 1; /* in 512 bits unit */
pp_context->urb.num_cs_entries = 1;
pp_context->urb.cs_start = pp_context->urb.vfe_start +
pp_context->urb.num_vfe_entries * pp_context->urb.size_vfe_entry;
assert(pp_context->urb.cs_start +
- pp_context->urb.num_cs_entries * pp_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
+ pp_context->urb.num_cs_entries * pp_context->urb.size_cs_entry <= i965->intel.device_info->urb_size);
pp_context->intel_post_processing = ironlake_post_processing;
} else {
pp_context->vfe_gpu_state.max_num_threads = 60;