#include "shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5"
};
+static const uint32_t pp_pl3_load_save_pa_gen5[][4] = {
+#include "shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5"
+};
+
static VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
const struct i965_surface *src_surface,
const VARectangle *src_rect,
pp_plx_load_save_plx_initialize,
},
+ {
+ {
+ "PL3_PA module",
+ PP_PL3_LOAD_SAVE_PA,
+ pp_pl3_load_save_pa_gen5,
+ sizeof(pp_pl3_load_save_pa_gen5),
+ NULL,
+ },
+
+ pp_plx_load_save_plx_initialize,
+ },
+
};
static const uint32_t pp_null_gen6[][4] = {
#include "shaders/post_processing/gen5_6/nv12_load_save_pa.g6b"
};
+static const uint32_t pp_pl3_load_save_pa_gen6[][4] = {
+#include "shaders/post_processing/gen5_6/pl3_load_save_pa.g6b"
+};
+
static struct pp_module pp_modules_gen6[] = {
{
{
pp_plx_load_save_plx_initialize,
},
+ {
+ {
+ "PL3_PA module",
+ PP_PL3_LOAD_SAVE_PA,
+ pp_pl3_load_save_pa_gen6,
+ sizeof(pp_pl3_load_save_pa_gen6),
+ NULL,
+ },
+
+ pp_plx_load_save_plx_initialize,
+ },
};
};
static const uint32_t pp_nv12_load_save_pa_gen7[][4] = {
};
+static const uint32_t pp_pl3_load_save_pa_gen7[][4] = {
+};
static VAStatus gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
const struct i965_surface *src_surface,
pp_plx_load_save_plx_initialize,
},
+
+ {
+ {
+ "PL3_PA module",
+ PP_PL3_LOAD_SAVE_PA,
+ pp_pl3_load_save_pa_gen7,
+ sizeof(pp_pl3_load_save_pa_gen7),
+ NULL,
+ },
+
+ pp_plx_load_save_plx_initialize,
+ },
};
dst_rect,
PP_PL3_LOAD_SAVE_N12,
NULL);
- } else {
+ } else if (fourcc == VA_FOURCC('I', 'M', 'C', '1') ||
+ fourcc == VA_FOURCC('I', 'M', 'C', '3')) {
i965_post_processing_internal(ctx, i965->pp_context,
src_surface,
src_rect,
dst_rect,
PP_PL3_LOAD_SAVE_PL3,
NULL);
+ } else if (fourcc == VA_FOURCC('Y', 'U', 'Y', '2')) {
+ i965_post_processing_internal(ctx, i965->pp_context,
+ src_surface,
+ src_rect,
+ dst_surface,
+ dst_rect,
+ PP_PL3_LOAD_SAVE_PA,
+ NULL);
+
+ }
+ else {
+ assert(0);
}
intel_batchbuffer_flush(pp_context->batch);