src/i965_drv_video.h

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Xiang Haihao <haihao.xiang@intel.com>
  26  *    Zou Nan hai <nanhai.zou@intel.com>
  27  *
  28  */
  29
  30 #ifndef _I965_DRV_VIDEO_H_
  31 #define _I965_DRV_VIDEO_H_
  32
  33 #include <va/va.h>
  34 #include <va/va_enc_h264.h>
  35 #include <va/va_enc_mpeg2.h>
  36 #include <va/va_vpp.h>
  37 #include <va/va_backend.h>
  38 #include <va/va_backend_vpp.h>
  39
  40 #include "i965_mutext.h"
  41 #include "object_heap.h"
  42 #include "intel_driver.h"
  43
  44 #define I965_MAX_PROFILES                       11
  45 #define I965_MAX_ENTRYPOINTS                    5
  46 #define I965_MAX_CONFIG_ATTRIBUTES              10
  47 #define I965_MAX_IMAGE_FORMATS                  10
  48 #define I965_MAX_SUBPIC_FORMATS                 6
  49 #define I965_MAX_SUBPIC_SUM                     4
  50
  51 #define INTEL_STR_DRIVER_VENDOR                 "Intel"
  52 #define INTEL_STR_DRIVER_NAME                   "i965"
  53
  54 #define I965_SURFACE_TYPE_IMAGE                 0
  55 #define I965_SURFACE_TYPE_SURFACE               1
  56
  57 #define I965_SURFACE_FLAG_FRAME                 0x00000000
  58 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST       0x00000001
  59 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST   0x00000002
  60
  61 struct i965_surface
  62 {
  63     VAGenericID id;
  64     int type;
  65     int flags;
  66 };
  67
  68 struct i965_kernel
  69 {
  70     char *name;
  71     int interface;
  72     const uint32_t (*bin)[4];
  73     int size;
  74     dri_bo *bo;
  75 };
  76
  77 struct buffer_store
  78 {
  79     unsigned char *buffer;
  80     dri_bo *bo;
  81     int ref_count;
  82     int num_elements;
  83 };
  84
  85 struct object_config
  86 {
  87     struct object_base base;
  88     VAProfile profile;
  89     VAEntrypoint entrypoint;
  90     VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
  91     int num_attribs;
  92 };
  93
  94 #define NUM_SLICES     10
  95
  96 struct decode_state
  97 {
  98     struct buffer_store *pic_param;
  99     struct buffer_store **slice_params;
 100     struct buffer_store *iq_matrix;
 101     struct buffer_store *bit_plane;
 102     struct buffer_store *huffman_table;
 103     struct buffer_store **slice_datas;
 104     VASurfaceID current_render_target;
 105     int max_slice_params;
 106     int max_slice_datas;
 107     int num_slice_params;
 108     int num_slice_datas;
 109 };
 110
 111 struct encode_state
 112 {
 113     struct buffer_store *seq_param;
 114     struct buffer_store *pic_param;
 115     struct buffer_store *pic_control;
 116     struct buffer_store *iq_matrix;
 117     struct buffer_store *q_matrix;
 118     struct buffer_store **slice_params;
 119     int max_slice_params;
 120     int num_slice_params;
 121
 122     /* for ext */
 123     struct buffer_store *seq_param_ext;
 124     struct buffer_store *pic_param_ext;
 125     struct buffer_store *packed_header_param[4];
 126     struct buffer_store *packed_header_data[4];
 127     struct buffer_store **slice_params_ext;
 128     int max_slice_params_ext;
 129     int num_slice_params_ext;
 130     int last_packed_header_type;
 131
 132     struct buffer_store *misc_param[8];
 133
 134     VASurfaceID current_render_target;
 135 };
 136
 137 struct proc_state
 138 {
 139     struct buffer_store *pipeline_param;
 140
 141     VASurfaceID current_render_target;
 142 };
 143
 144 #define CODEC_DEC       0
 145 #define CODEC_ENC       1
 146 #define CODEC_PROC      2
 147
 148 union codec_state
 149 {
 150     struct decode_state decode;
 151     struct encode_state encode;
 152     struct proc_state proc;
 153 };
 154
 155 struct hw_context
 156 {
 157     void (*run)(VADriverContextP ctx,
 158                 VAProfile profile,
 159                 union codec_state *codec_state,
 160                 struct hw_context *hw_context);
 161     void (*destroy)(void *);
 162     struct intel_batchbuffer *batch;
 163 };
 164
 165 struct object_context
 166 {
 167     struct object_base base;
 168     VAContextID context_id;
 169     VAConfigID config_id;
 170     VASurfaceID *render_targets;                //input->encode, output->decode
 171     int num_render_targets;
 172     int picture_width;
 173     int picture_height;
 174     int flags;
 175     int codec_type;
 176     union codec_state codec_state;
 177     struct hw_context *hw_context;
 178 };
 179
 180 #define SURFACE_REFERENCED      (1 << 0)
 181 #define SURFACE_DISPLAYED       (1 << 1)
 182 #define SURFACE_DERIVED         (1 << 2)
 183 #define SURFACE_REF_DIS_MASK    ((SURFACE_REFERENCED) | \
 184                                  (SURFACE_DISPLAYED))
 185 #define SURFACE_ALL_MASK        ((SURFACE_REFERENCED) | \
 186                                  (SURFACE_DISPLAYED) |  \
 187                                  (SURFACE_DERIVED))
 188
 189 struct object_surface
 190 {
 191     struct object_base base;
 192     VASurfaceStatus status;
 193     VASubpictureID subpic[I965_MAX_SUBPIC_SUM];
 194     unsigned int subpic_render_idx;
 195
 196     int width;
 197     int height;
 198     int size;
 199     int orig_width;
 200     int orig_height;
 201     int flags;
 202     unsigned int fourcc;
 203     dri_bo *bo;
 204     VAImageID locked_image_id;
 205     void (*free_private_data)(void **data);
 206     void *private_data;
 207     unsigned int subsampling;
 208     int x_cb_offset;
 209     int y_cb_offset;
 210     int x_cr_offset;
 211     int y_cr_offset;
 212     int cb_cr_width;
 213     int cb_cr_height;
 214     int cb_cr_pitch;
 215 };
 216
 217 struct object_buffer
 218 {
 219     struct object_base base;
 220     struct buffer_store *buffer_store;
 221     int max_num_elements;
 222     int num_elements;
 223     int size_element;
 224     VABufferType type;
 225 };
 226
 227 struct object_image
 228 {
 229     struct object_base base;
 230     VAImage image;
 231     dri_bo *bo;
 232     unsigned int *palette;
 233     VASurfaceID derived_surface;
 234 };
 235
 236 struct object_subpic
 237 {
 238     struct object_base base;
 239     VAImageID image;
 240     VARectangle src_rect;
 241     VARectangle dst_rect;
 242     unsigned int format;
 243     int width;
 244     int height;
 245     int pitch;
 246     float global_alpha;
 247     dri_bo *bo;
 248     unsigned int flags;
 249 };
 250
 251 struct hw_codec_info
 252 {
 253     struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
 254     struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
 255     struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
 256     int max_width;
 257     int max_height;
 258
 259     unsigned int has_mpeg2_decoding:1;
 260     unsigned int has_mpeg2_encoding:1;
 261     unsigned int has_h264_decoding:1;
 262     unsigned int has_h264_encoding:1;
 263     unsigned int has_vc1_decoding:1;
 264     unsigned int has_vc1_encoding:1;
 265     unsigned int has_jpeg_decoding:1;
 266     unsigned int has_jpeg_encoding:1;
 267     unsigned int has_vpp:1;
 268     unsigned int has_accelerated_getimage:1;
 269     unsigned int has_accelerated_putimage:1;
 270     unsigned int has_tiled_surface:1;
 271 };
 272
 273
 274 #include "i965_render.h"
 275
 276 struct i965_driver_data
 277 {
 278     struct intel_driver_data intel;
 279     struct object_heap config_heap;
 280     struct object_heap context_heap;
 281     struct object_heap surface_heap;
 282     struct object_heap buffer_heap;
 283     struct object_heap image_heap;
 284     struct object_heap subpic_heap;
 285     struct hw_codec_info *codec_info;
 286
 287     _I965Mutex render_mutex;
 288     _I965Mutex pp_mutex;
 289     struct intel_batchbuffer *batch;
 290     struct i965_render_state render_state;
 291     void *pp_context;
 292     char va_vendor[256];
 293
 294     VADisplayAttribute *display_attributes;
 295     unsigned int num_display_attributes;
 296     VADisplayAttribute *rotation_attrib;
 297
 298     VAContextID current_context_id;
 299
 300     /* VA/DRI (X11) specific data */
 301     struct va_dri_output *dri_output;
 302
 303     /* VA/Wayland specific data */
 304     struct va_wl_output *wl_output;
 305 };
 306
 307 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
 308 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
 309 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
 310 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
 311 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
 312 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
 313
 314 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
 315 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
 316 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
 317 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
 318 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
 319 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
 320
 321 #define FOURCC_IA44 0x34344149
 322 #define FOURCC_AI44 0x34344941
 323
 324 #define STRIDE(w)               (((w) + 0xf) & ~0xf)
 325 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
 326
 327 static INLINE struct i965_driver_data *
 328 i965_driver_data(VADriverContextP ctx)
 329 {
 330     return (struct i965_driver_data *)(ctx->pDriverData);
 331 }
 332
 333 void
 334 i965_check_alloc_surface_bo(VADriverContextP ctx,
 335                             struct object_surface *obj_surface,
 336                             int tiled,
 337                             unsigned int fourcc,
 338                             unsigned int subsampling);
 339
 340 int
 341 va_enc_packed_type_to_idx(int packed_type);
 342
 343 /* reserve 2 byte for internal using */
 344 #define CODED_H264      0
 345 #define CODED_MPEG2     1
 346
 347 #define H264_DELIMITER0 0x00
 348 #define H264_DELIMITER1 0x00
 349 #define H264_DELIMITER2 0x00
 350 #define H264_DELIMITER3 0x00
 351 #define H264_DELIMITER4 0x00
 352
 353 #define MPEG2_DELIMITER0        0x00
 354 #define MPEG2_DELIMITER1        0x00
 355 #define MPEG2_DELIMITER2        0x00
 356 #define MPEG2_DELIMITER3        0x00
 357 #define MPEG2_DELIMITER4        0xb0
 358
 359 struct i965_coded_buffer_segment
 360 {
 361     VACodedBufferSegment base;
 362     unsigned char mapped;
 363     unsigned char codec;
 364 };
 365
 366 #define I965_CODEDBUFFER_HEADER_SIZE   ALIGN(sizeof(struct i965_coded_buffer_segment), 64)
 367
 368
 369 extern VAStatus i965_MapBuffer(VADriverContextP ctx,
 370                 VABufferID buf_id,       /* in */
 371                 void **pbuf);            /* out */
 372
 373 extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id);
 374
 375 #endif /* _I965_DRV_VIDEO_H_ */