src/i965_drv_video.h

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Xiang Haihao <haihao.xiang@intel.com>
  26  *    Zou Nan hai <nanhai.zou@intel.com>
  27  *
  28  */
  29
  30 #ifndef _I965_DRV_VIDEO_H_
  31 #define _I965_DRV_VIDEO_H_
  32
  33 #include <va/va.h>
  34 #include <va/va_enc_h264.h>
  35 #include <va/va_enc_mpeg2.h>
  36 #include <va/va_vpp.h>
  37 #include <va/va_backend.h>
  38 #include <va/va_backend_vpp.h>
  39
  40 #include "i965_mutext.h"
  41 #include "object_heap.h"
  42 #include "intel_driver.h"
  43 #include "i965_fourcc.h"
  44
  45 #define I965_MAX_PROFILES                       20
  46 #define I965_MAX_ENTRYPOINTS                    5
  47 #define I965_MAX_CONFIG_ATTRIBUTES              10
  48 #define I965_MAX_IMAGE_FORMATS                  10
  49 #define I965_MAX_SUBPIC_FORMATS                 6
  50 #define I965_MAX_SUBPIC_SUM                     4
  51 #define I965_MAX_SURFACE_ATTRIBUTES             16
  52
  53 #define INTEL_STR_DRIVER_VENDOR                 "Intel"
  54 #define INTEL_STR_DRIVER_NAME                   "i965"
  55
  56 #define I965_SURFACE_TYPE_IMAGE                 0
  57 #define I965_SURFACE_TYPE_SURFACE               1
  58
  59 #define I965_SURFACE_FLAG_FRAME                 0x00000000
  60 #define I965_SURFACE_FLAG_TOP_FIELD_FIRST       0x00000001
  61 #define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST   0x00000002
  62
  63 #define DEFAULT_BRIGHTNESS      0
  64 #define DEFAULT_CONTRAST        50
  65 #define DEFAULT_HUE             0
  66 #define DEFAULT_SATURATION      50
  67
  68 struct i965_surface
  69 {
  70     struct object_base *base;
  71     int type;
  72     int flags;
  73 };
  74
  75 struct i965_kernel
  76 {
  77     char *name;
  78     int interface;
  79     const uint32_t (*bin)[4];
  80     int size;
  81     dri_bo *bo;
  82     unsigned int kernel_offset;
  83 };
  84
  85 struct buffer_store
  86 {
  87     unsigned char *buffer;
  88     dri_bo *bo;
  89     int ref_count;
  90     int num_elements;
  91 };
  92
  93 struct object_config
  94 {
  95     struct object_base base;
  96     VAProfile profile;
  97     VAEntrypoint entrypoint;
  98     VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
  99     int num_attribs;
 100 };
 101
 102 #define NUM_SLICES     10
 103
 104 struct codec_state_base {
 105     uint32_t chroma_formats;
 106 };
 107
 108 struct decode_state
 109 {
 110     struct codec_state_base base;
 111     struct buffer_store *pic_param;
 112     struct buffer_store **slice_params;
 113     struct buffer_store *iq_matrix;
 114     struct buffer_store *bit_plane;
 115     struct buffer_store *huffman_table;
 116     struct buffer_store **slice_datas;
 117     struct buffer_store *probability_data;
 118     VASurfaceID current_render_target;
 119     int max_slice_params;
 120     int max_slice_datas;
 121     int num_slice_params;
 122     int num_slice_datas;
 123
 124     struct object_surface *render_object;
 125     struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
 126 };
 127
 128 struct encode_state
 129 {
 130     struct codec_state_base base;
 131     struct buffer_store *seq_param;
 132     struct buffer_store *pic_param;
 133     struct buffer_store *pic_control;
 134     struct buffer_store *iq_matrix;
 135     struct buffer_store *q_matrix;
 136     struct buffer_store **slice_params;
 137     int max_slice_params;
 138     int num_slice_params;
 139
 140     /* for ext */
 141     struct buffer_store *seq_param_ext;
 142     struct buffer_store *pic_param_ext;
 143     struct buffer_store *packed_header_param[4];
 144     struct buffer_store *packed_header_data[4];
 145     struct buffer_store **slice_params_ext;
 146     int max_slice_params_ext;
 147     int num_slice_params_ext;
 148     int last_packed_header_type;
 149
 150     struct buffer_store *misc_param[16];
 151
 152     VASurfaceID current_render_target;
 153     struct object_surface *input_yuv_object;
 154     struct object_surface *reconstructed_object;
 155     struct object_buffer *coded_buf_object;
 156     struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/
 157 };
 158
 159 struct proc_state
 160 {
 161     struct codec_state_base base;
 162     struct buffer_store *pipeline_param;
 163
 164     VASurfaceID current_render_target;
 165 };
 166
 167 #define CODEC_DEC       0
 168 #define CODEC_ENC       1
 169 #define CODEC_PROC      2
 170
 171 union codec_state
 172 {
 173     struct codec_state_base base;
 174     struct decode_state decode;
 175     struct encode_state encode;
 176     struct proc_state proc;
 177 };
 178
 179 struct hw_context
 180 {
 181     VAStatus (*run)(VADriverContextP ctx,
 182                     VAProfile profile,
 183                     union codec_state *codec_state,
 184                     struct hw_context *hw_context);
 185     void (*destroy)(void *);
 186     struct intel_batchbuffer *batch;
 187 };
 188
 189 struct object_context
 190 {
 191     struct object_base base;
 192     VAContextID context_id;
 193     struct object_config *obj_config;
 194     VASurfaceID *render_targets;                //input->encode, output->decode
 195     int num_render_targets;
 196     int picture_width;
 197     int picture_height;
 198     int flags;
 199     int codec_type;
 200     union codec_state codec_state;
 201     struct hw_context *hw_context;
 202 };
 203
 204 #define SURFACE_REFERENCED      (1 << 0)
 205 #define SURFACE_DISPLAYED       (1 << 1)
 206 #define SURFACE_DERIVED         (1 << 2)
 207 #define SURFACE_REF_DIS_MASK    ((SURFACE_REFERENCED) | \
 208                                  (SURFACE_DISPLAYED))
 209 #define SURFACE_ALL_MASK        ((SURFACE_REFERENCED) | \
 210                                  (SURFACE_DISPLAYED) |  \
 211                                  (SURFACE_DERIVED))
 212
 213 struct object_surface
 214 {
 215     struct object_base base;
 216     VASurfaceStatus status;
 217     VASubpictureID subpic[I965_MAX_SUBPIC_SUM];
 218     struct object_subpic *obj_subpic[I965_MAX_SUBPIC_SUM];
 219     unsigned int subpic_render_idx;
 220
 221     int width;          /* the pitch of plane 0 in bytes in horizontal direction */
 222     int height;         /* the pitch of plane 0 in bytes in vertical direction */
 223     int size;
 224     int orig_width;     /* the width of plane 0 in pixels */
 225     int orig_height;    /* the height of plane 0 in pixels */
 226     int flags;
 227     unsigned int fourcc;
 228     dri_bo *bo;
 229     VAImageID locked_image_id;
 230     void (*free_private_data)(void **data);
 231     void *private_data;
 232     unsigned int subsampling;
 233     int x_cb_offset;
 234     int y_cb_offset;
 235     int x_cr_offset;
 236     int y_cr_offset;
 237     int cb_cr_width;
 238     int cb_cr_height;
 239     int cb_cr_pitch;
 240     /* user specified attributes see: VASurfaceAttribExternalBuffers/VA_SURFACE_ATTRIB_MEM_TYPE_VA */
 241     uint32_t user_disable_tiling : 1;
 242     uint32_t user_h_stride_set   : 1;
 243     uint32_t user_v_stride_set   : 1;
 244 };
 245
 246 struct object_buffer
 247 {
 248     struct object_base base;
 249     struct buffer_store *buffer_store;
 250     int max_num_elements;
 251     int num_elements;
 252     int size_element;
 253     VABufferType type;
 254 };
 255
 256 struct object_image
 257 {
 258     struct object_base base;
 259     VAImage image;
 260     dri_bo *bo;
 261     unsigned int *palette;
 262     VASurfaceID derived_surface;
 263 };
 264
 265 struct object_subpic
 266 {
 267     struct object_base base;
 268     VAImageID image;
 269     struct object_image *obj_image;
 270     VARectangle src_rect;
 271     VARectangle dst_rect;
 272     unsigned int format;
 273     int width;
 274     int height;
 275     int pitch;
 276     float global_alpha;
 277     dri_bo *bo;
 278     unsigned int flags;
 279 };
 280
 281 #define I965_RING_NULL  0
 282 #define I965_RING_BSD   1
 283 #define I965_RING_BLT   2
 284 #define I965_RING_VEBOX 3
 285
 286 struct i965_filter
 287 {
 288     VAProcFilterType type;
 289     int ring;
 290 };
 291
 292 struct hw_codec_info
 293 {
 294     struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
 295     struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *);
 296     struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
 297     bool (*render_init)(VADriverContextP);
 298     void (*post_processing_context_init)(VADriverContextP, void *, struct intel_batchbuffer *);
 299
 300     int max_width;
 301     int max_height;
 302     int min_linear_wpitch;
 303     int min_linear_hpitch;
 304
 305     unsigned int h264_dec_chroma_formats;
 306     unsigned int jpeg_dec_chroma_formats;
 307
 308     unsigned int has_mpeg2_decoding:1;
 309     unsigned int has_mpeg2_encoding:1;
 310     unsigned int has_h264_decoding:1;
 311     unsigned int has_h264_encoding:1;
 312     unsigned int has_vc1_decoding:1;
 313     unsigned int has_vc1_encoding:1;
 314     unsigned int has_jpeg_decoding:1;
 315     unsigned int has_jpeg_encoding:1;
 316     unsigned int has_vpp:1;
 317     unsigned int has_accelerated_getimage:1;
 318     unsigned int has_accelerated_putimage:1;
 319     unsigned int has_tiled_surface:1;
 320     unsigned int has_di_motion_adptive:1;
 321     unsigned int has_di_motion_compensated:1;
 322     unsigned int has_vp8_decoding:1;
 323     unsigned int has_vp8_encoding:1;
 324
 325     unsigned int num_filters;
 326     struct i965_filter filters[VAProcFilterCount];
 327 };
 328
 329
 330 #include "i965_render.h"
 331
 332 struct i965_driver_data
 333 {
 334     struct intel_driver_data intel;
 335     struct object_heap config_heap;
 336     struct object_heap context_heap;
 337     struct object_heap surface_heap;
 338     struct object_heap buffer_heap;
 339     struct object_heap image_heap;
 340     struct object_heap subpic_heap;
 341     const struct hw_codec_info *codec_info;
 342
 343     _I965Mutex render_mutex;
 344     _I965Mutex pp_mutex;
 345     struct intel_batchbuffer *batch;
 346     struct intel_batchbuffer *pp_batch;
 347     struct i965_render_state render_state;
 348     void *pp_context;
 349     char va_vendor[256];
 350
 351     VADisplayAttribute *display_attributes;
 352     unsigned int num_display_attributes;
 353     VADisplayAttribute *rotation_attrib;
 354     VADisplayAttribute *brightness_attrib;
 355     VADisplayAttribute *contrast_attrib;
 356     VADisplayAttribute *hue_attrib;
 357     VADisplayAttribute *saturation_attrib;
 358     VAContextID current_context_id;
 359
 360     /* VA/DRI (X11) specific data */
 361     struct va_dri_output *dri_output;
 362
 363     /* VA/Wayland specific data */
 364     struct va_wl_output *wl_output;
 365 };
 366
 367 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
 368 #define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap);
 369 #define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap);
 370 #define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap);
 371 #define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap);
 372 #define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap);
 373
 374 #define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id))
 375 #define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id))
 376 #define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id))
 377 #define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id))
 378 #define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id))
 379 #define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id))
 380
 381 #define FOURCC_IA44 0x34344149
 382 #define FOURCC_AI44 0x34344941
 383
 384 #define STRIDE(w)               (((w) + 0xf) & ~0xf)
 385 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
 386
 387 static INLINE struct i965_driver_data *
 388 i965_driver_data(VADriverContextP ctx)
 389 {
 390     return (struct i965_driver_data *)(ctx->pDriverData);
 391 }
 392
 393 VAStatus
 394 i965_check_alloc_surface_bo(VADriverContextP ctx,
 395                             struct object_surface *obj_surface,
 396                             int tiled,
 397                             unsigned int fourcc,
 398                             unsigned int subsampling);
 399
 400 int
 401 va_enc_packed_type_to_idx(int packed_type);
 402
 403 /* reserve 2 byte for internal using */
 404 #define CODEC_H264      0
 405 #define CODEC_MPEG2     1
 406
 407 #define H264_DELIMITER0 0x00
 408 #define H264_DELIMITER1 0x00
 409 #define H264_DELIMITER2 0x00
 410 #define H264_DELIMITER3 0x00
 411 #define H264_DELIMITER4 0x00
 412
 413 #define MPEG2_DELIMITER0        0x00
 414 #define MPEG2_DELIMITER1        0x00
 415 #define MPEG2_DELIMITER2        0x00
 416 #define MPEG2_DELIMITER3        0x00
 417 #define MPEG2_DELIMITER4        0xb0
 418
 419 struct i965_coded_buffer_segment
 420 {
 421     VACodedBufferSegment base;
 422     unsigned char mapped;
 423     unsigned char codec;
 424 };
 425
 426 #define I965_CODEDBUFFER_HEADER_SIZE   ALIGN(sizeof(struct i965_coded_buffer_segment), 64)
 427
 428 extern VAStatus i965_MapBuffer(VADriverContextP ctx,
 429                 VABufferID buf_id,       /* in */
 430                 void **pbuf);            /* out */
 431
 432 extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id);
 433
 434 extern VAStatus i965_DestroySurfaces(VADriverContextP ctx,
 435                      VASurfaceID *surface_list,
 436                      int num_surfaces);
 437
 438 #define I965_SURFACE_MEM_NATIVE             0
 439 #define I965_SURFACE_MEM_GEM_FLINK          1
 440 #define I965_SURFACE_MEM_DRM_PRIME          2
 441
 442 void
 443 i965_destroy_surface_storage(struct object_surface *obj_surface);
 444
 445 #endif /* _I965_DRV_VIDEO_H_ */