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28 #include "i965_drv_video.h"
30 /* Extra set of chroma formats supported for H.264 decoding (beyond YUV 4:2:0) */
31 #define EXTRA_H264_DEC_CHROMA_FORMATS \
34 /* Extra set of chroma formats supported for JPEG decoding (beyond YUV 4:2:0) */
35 #define EXTRA_JPEG_DEC_CHROMA_FORMATS \
36 (VA_RT_FORMAT_YUV400 | VA_RT_FORMAT_YUV411 | VA_RT_FORMAT_YUV422 | \
39 extern struct hw_context *i965_proc_context_init(VADriverContextP, struct object_config *);
40 extern struct hw_context *g4x_dec_hw_context_init(VADriverContextP, struct object_config *);
41 extern bool genx_render_init(VADriverContextP);
43 static const struct hw_codec_info g4x_hw_codec_info = {
44 .dec_hw_context_init = g4x_dec_hw_context_init,
45 .enc_hw_context_init = NULL,
46 .proc_hw_context_init = NULL,
47 .render_init = genx_render_init,
48 .post_processing_context_init = NULL,
52 .min_linear_wpitch = 16,
53 .min_linear_hpitch = 16,
55 .has_mpeg2_decoding = 1,
60 extern struct hw_context *ironlake_dec_hw_context_init(VADriverContextP, struct object_config *);
61 extern void i965_post_processing_context_init(VADriverContextP, void *, struct intel_batchbuffer *);
63 static const struct hw_codec_info ilk_hw_codec_info = {
64 .dec_hw_context_init = ironlake_dec_hw_context_init,
65 .enc_hw_context_init = NULL,
66 .proc_hw_context_init = i965_proc_context_init,
67 .render_init = genx_render_init,
68 .post_processing_context_init = i965_post_processing_context_init,
72 .min_linear_wpitch = 16,
73 .min_linear_hpitch = 16,
75 .has_mpeg2_decoding = 1,
76 .has_h264_decoding = 1,
78 .has_accelerated_putimage = 1,
83 extern struct hw_context *gen6_dec_hw_context_init(VADriverContextP, struct object_config *);
84 extern struct hw_context *gen6_enc_hw_context_init(VADriverContextP, struct object_config *);
85 static const struct hw_codec_info snb_hw_codec_info = {
86 .dec_hw_context_init = gen6_dec_hw_context_init,
87 .enc_hw_context_init = gen6_enc_hw_context_init,
88 .proc_hw_context_init = i965_proc_context_init,
89 .render_init = genx_render_init,
90 .post_processing_context_init = i965_post_processing_context_init,
94 .min_linear_wpitch = 16,
95 .min_linear_hpitch = 16,
97 .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS,
99 .has_mpeg2_decoding = 1,
100 .has_h264_decoding = 1,
101 .has_h264_encoding = 1,
102 .has_vc1_decoding = 1,
104 .has_accelerated_getimage = 1,
105 .has_accelerated_putimage = 1,
106 .has_tiled_surface = 1,
110 { VAProcFilterNoiseReduction, I965_RING_NULL },
111 { VAProcFilterDeinterlacing, I965_RING_NULL },
115 extern struct hw_context *gen7_dec_hw_context_init(VADriverContextP, struct object_config *);
116 extern struct hw_context *gen7_enc_hw_context_init(VADriverContextP, struct object_config *);
117 static const struct hw_codec_info ivb_hw_codec_info = {
118 .dec_hw_context_init = gen7_dec_hw_context_init,
119 .enc_hw_context_init = gen7_enc_hw_context_init,
120 .proc_hw_context_init = i965_proc_context_init,
121 .render_init = genx_render_init,
122 .post_processing_context_init = i965_post_processing_context_init,
126 .min_linear_wpitch = 64,
127 .min_linear_hpitch = 16,
129 .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS,
130 .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS,
132 .has_mpeg2_decoding = 1,
133 .has_mpeg2_encoding = 1,
134 .has_h264_decoding = 1,
135 .has_h264_encoding = 1,
136 .has_vc1_decoding = 1,
137 .has_jpeg_decoding = 1,
139 .has_accelerated_getimage = 1,
140 .has_accelerated_putimage = 1,
141 .has_tiled_surface = 1,
142 .has_di_motion_adptive = 1,
146 { VAProcFilterNoiseReduction, I965_RING_NULL },
147 { VAProcFilterDeinterlacing, I965_RING_NULL },
151 extern struct hw_context *gen75_dec_hw_context_init(VADriverContextP, struct object_config *);
152 extern struct hw_context *gen75_enc_hw_context_init(VADriverContextP, struct object_config *);
153 extern struct hw_context *gen75_proc_context_init(VADriverContextP, struct object_config *);
154 static const struct hw_codec_info hsw_hw_codec_info = {
155 .dec_hw_context_init = gen75_dec_hw_context_init,
156 .enc_hw_context_init = gen75_enc_hw_context_init,
157 .proc_hw_context_init = gen75_proc_context_init,
158 .render_init = genx_render_init,
159 .post_processing_context_init = i965_post_processing_context_init,
163 .min_linear_wpitch = 64,
164 .min_linear_hpitch = 16,
166 .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS,
167 .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS,
169 .has_mpeg2_decoding = 1,
170 .has_mpeg2_encoding = 1,
171 .has_h264_decoding = 1,
172 .has_h264_encoding = 1,
173 .has_vc1_decoding = 1,
174 .has_jpeg_decoding = 1,
176 .has_accelerated_getimage = 1,
177 .has_accelerated_putimage = 1,
178 .has_tiled_surface = 1,
179 .has_di_motion_adptive = 1,
180 .has_di_motion_compensated = 1,
184 { VAProcFilterNoiseReduction, I965_RING_VEBOX },
185 { VAProcFilterDeinterlacing, I965_RING_VEBOX },
186 { VAProcFilterSharpening, I965_RING_NULL },
187 { VAProcFilterColorBalance, I965_RING_VEBOX},
188 { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX},
192 extern struct hw_context *gen8_dec_hw_context_init(VADriverContextP, struct object_config *);
193 extern struct hw_context *gen8_enc_hw_context_init(VADriverContextP, struct object_config *);
194 extern void gen8_post_processing_context_init(VADriverContextP, void *, struct intel_batchbuffer *);
195 static const struct hw_codec_info bdw_hw_codec_info = {
196 .dec_hw_context_init = gen8_dec_hw_context_init,
197 .enc_hw_context_init = gen8_enc_hw_context_init,
198 .proc_hw_context_init = gen75_proc_context_init,
199 .render_init = gen8_render_init,
200 .post_processing_context_init = gen8_post_processing_context_init,
204 .min_linear_wpitch = 64,
205 .min_linear_hpitch = 16,
207 .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS,
208 .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS,
210 .has_mpeg2_decoding = 1,
211 .has_mpeg2_encoding = 1,
212 .has_h264_decoding = 1,
213 .has_h264_encoding = 1,
214 .has_vc1_decoding = 1,
215 .has_jpeg_decoding = 1,
217 .has_accelerated_getimage = 1,
218 .has_accelerated_putimage = 1,
219 .has_tiled_surface = 1,
220 .has_di_motion_adptive = 1,
221 .has_di_motion_compensated = 1,
222 .has_vp8_decoding = 1,
226 { VAProcFilterNoiseReduction, I965_RING_VEBOX },
227 { VAProcFilterDeinterlacing, I965_RING_VEBOX },
228 { VAProcFilterSharpening, I965_RING_NULL }, /* need to rebuild the shader for BDW */
229 { VAProcFilterColorBalance, I965_RING_VEBOX},
230 { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX},
234 const struct hw_codec_info *
235 i965_get_codec_info(int devid)
239 #define CHIPSET(id, family, dev, str) case id: return &family##_hw_codec_info;
240 #include "i965_pciids.h"
246 static const struct intel_device_info g4x_device_info = {
250 .max_wm_threads = 50, /* 10 * 5 */
255 static const struct intel_device_info ilk_device_info = {
259 .max_wm_threads = 72, /* 12 * 6 */
262 static const struct intel_device_info snb_gt1_device_info = {
267 .max_wm_threads = 40,
270 static const struct intel_device_info snb_gt2_device_info = {
275 .max_wm_threads = 80,
278 static const struct intel_device_info ivb_gt1_device_info = {
283 .max_wm_threads = 48,
288 static const struct intel_device_info ivb_gt2_device_info = {
293 .max_wm_threads = 172,
298 static const struct intel_device_info byt_device_info = {
303 .max_wm_threads = 48,
309 static const struct intel_device_info hsw_gt1_device_info = {
314 .max_wm_threads = 102,
319 static const struct intel_device_info hsw_gt2_device_info = {
324 .max_wm_threads = 204,
329 static const struct intel_device_info hsw_gt3_device_info = {
334 .max_wm_threads = 408,
339 static const struct intel_device_info bdw_device_info = {
343 .max_wm_threads = 64, /* per PSD */
346 const struct intel_device_info *
347 i965_get_device_info(int devid)
351 #define CHIPSET(id, family, dev, str) case id: return &dev##_device_info;
352 #include "i965_pciids.h"