2 * Copyright (C) 2006-2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
28 #include "intel_batchbuffer.h"
29 #include "i965_drv_video.h"
30 #include "i965_decoder_utils.h"
31 #include "i965_defines.h"
33 /* Set reference surface if backing store exists */
36 struct i965_driver_data *i965,
37 GenFrameStore *ref_frame,
38 VASurfaceID va_surface,
39 struct object_surface *obj_surface
42 if (va_surface == VA_INVALID_ID)
45 if (!obj_surface || !obj_surface->bo)
48 ref_frame->surface_id = va_surface;
49 ref_frame->obj_surface = obj_surface;
53 /* Check wether codec layer incorrectly fills in slice_vertical_position */
55 mpeg2_wa_slice_vertical_position(
56 struct decode_state *decode_state,
57 VAPictureParameterBufferMPEG2 *pic_param
60 unsigned int i, j, mb_height, vpos, last_vpos = 0;
62 /* Assume progressive sequence if we got a progressive frame */
63 if (pic_param->picture_coding_extension.bits.progressive_frame)
66 /* Wait for a field coded picture */
67 if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_FRAME)
70 assert(decode_state && decode_state->slice_params);
72 mb_height = (pic_param->vertical_size + 31) / 32;
74 for (j = 0; j < decode_state->num_slice_params; j++) {
75 struct buffer_store * const buffer_store =
76 decode_state->slice_params[j];
78 for (i = 0; i < buffer_store->num_elements; i++) {
79 VASliceParameterBufferMPEG2 * const slice_param =
80 ((VASliceParameterBufferMPEG2 *)buffer_store->buffer) + i;
82 vpos = slice_param->slice_vertical_position;
83 if (vpos >= mb_height || vpos == last_vpos + 2) {
84 WARN_ONCE("codec layer incorrectly fills in MPEG-2 slice_vertical_position. Workaround applied\n");
93 /* Build MPEG-2 reference frames array */
95 mpeg2_set_reference_surfaces(
97 GenFrameStore ref_frames[MAX_GEN_REFERENCE_FRAMES],
98 struct decode_state *decode_state,
99 VAPictureParameterBufferMPEG2 *pic_param
102 struct i965_driver_data * const i965 = i965_driver_data(ctx);
103 VASurfaceID va_surface;
104 unsigned pic_structure, is_second_field, n = 0;
105 struct object_surface *obj_surface;
107 pic_structure = pic_param->picture_coding_extension.bits.picture_structure;
108 is_second_field = pic_structure != MPEG_FRAME &&
109 !pic_param->picture_coding_extension.bits.is_first_field;
111 ref_frames[0].surface_id = VA_INVALID_ID;
112 ref_frames[0].obj_surface = NULL;
114 /* Reference frames are indexed by frame store ID (0:top, 1:bottom) */
115 switch (pic_param->picture_coding_type) {
117 if (is_second_field && pic_structure == MPEG_BOTTOM_FIELD) {
118 va_surface = decode_state->current_render_target;
119 obj_surface = decode_state->render_object;
120 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
122 va_surface = pic_param->forward_reference_picture;
123 obj_surface = decode_state->reference_objects[0];
124 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
128 va_surface = pic_param->forward_reference_picture;
129 obj_surface = decode_state->reference_objects[0];
130 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
131 va_surface = pic_param->backward_reference_picture;
132 obj_surface = decode_state->reference_objects[1];
133 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
138 ref_frames[n].obj_surface = ref_frames[0].obj_surface;
139 ref_frames[n++].surface_id = ref_frames[0].surface_id;
142 if (pic_param->picture_coding_extension.bits.frame_pred_frame_dct)
145 ref_frames[2].surface_id = VA_INVALID_ID;
146 ref_frames[2].obj_surface = NULL;
148 /* Bottom field pictures used as reference */
149 switch (pic_param->picture_coding_type) {
151 if (is_second_field && pic_structure == MPEG_TOP_FIELD) {
152 va_surface = decode_state->current_render_target;
153 obj_surface = decode_state->render_object;
154 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
156 va_surface = pic_param->forward_reference_picture;
157 obj_surface = decode_state->reference_objects[0];
158 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
162 va_surface = pic_param->forward_reference_picture;
163 obj_surface = decode_state->reference_objects[0];
164 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
165 va_surface = pic_param->backward_reference_picture;
166 obj_surface = decode_state->reference_objects[1];
167 n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface);
172 ref_frames[n].obj_surface = ref_frames[2].obj_surface;
173 ref_frames[n++].surface_id = ref_frames[2].surface_id;
177 /* Ensure the supplied VA surface has valid storage for decoding the
180 avc_ensure_surface_bo(
181 VADriverContextP ctx,
182 struct decode_state *decode_state,
183 struct object_surface *obj_surface,
184 const VAPictureParameterBufferH264 *pic_param
188 uint32_t hw_fourcc, fourcc, subsample, chroma_format;
190 /* Validate chroma format */
191 switch (pic_param->seq_fields.bits.chroma_format_idc) {
193 fourcc = VA_FOURCC_Y800;
194 subsample = SUBSAMPLE_YUV400;
195 chroma_format = VA_RT_FORMAT_YUV400;
198 fourcc = VA_FOURCC_NV12;
199 subsample = SUBSAMPLE_YUV420;
200 chroma_format = VA_RT_FORMAT_YUV420;
203 return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT;
206 /* Determine the HW surface format, bound to VA config needs */
207 if ((decode_state->base.chroma_formats & chroma_format) == chroma_format)
212 case VA_FOURCC_Y800: // Implement with an NV12 surface
213 if (decode_state->base.chroma_formats & VA_RT_FORMAT_YUV420) {
214 hw_fourcc = VA_FOURCC_NV12;
215 subsample = SUBSAMPLE_YUV420;
221 return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT;
223 /* (Re-)allocate the underlying surface buffer store, if necessary */
224 if (!obj_surface->bo || obj_surface->fourcc != hw_fourcc) {
225 i965_destroy_surface_storage(obj_surface);
226 va_status = i965_check_alloc_surface_bo(ctx, obj_surface, 1,
227 hw_fourcc, subsample);
228 if (va_status != VA_STATUS_SUCCESS)
232 /* Fake chroma components if grayscale is implemented on top of NV12 */
233 if (fourcc == VA_FOURCC_Y800 && hw_fourcc == VA_FOURCC_NV12) {
234 const uint32_t uv_offset = obj_surface->width * obj_surface->height;
235 const uint32_t uv_size = obj_surface->width * obj_surface->height / 2;
237 drm_intel_gem_bo_map_gtt(obj_surface->bo);
238 memset(obj_surface->bo->virtual + uv_offset, 0x80, uv_size);
239 drm_intel_gem_bo_unmap_gtt(obj_surface->bo);
241 return VA_STATUS_SUCCESS;
244 /* Generate flat scaling matrices for H.264 decoding */
246 avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix)
249 memset(&iq_matrix->ScalingList4x4, 16, sizeof(iq_matrix->ScalingList4x4));
252 memset(&iq_matrix->ScalingList8x8, 16, sizeof(iq_matrix->ScalingList8x8));
255 /* Get first macroblock bit offset for BSD, minus EPB count (AVC) */
256 /* XXX: slice_data_bit_offset does not account for EPB */
258 avc_get_first_mb_bit_offset(
259 dri_bo *slice_data_bo,
260 VASliceParameterBufferH264 *slice_param,
261 unsigned int mode_flag
264 unsigned int slice_data_bit_offset = slice_param->slice_data_bit_offset;
266 if (mode_flag == ENTROPY_CABAC)
267 slice_data_bit_offset = ALIGN(slice_data_bit_offset, 0x8);
268 return slice_data_bit_offset;
271 /* Get first macroblock bit offset for BSD, with EPB count (AVC) */
272 /* XXX: slice_data_bit_offset does not account for EPB */
274 avc_get_first_mb_bit_offset_with_epb(
275 dri_bo *slice_data_bo,
276 VASliceParameterBufferH264 *slice_param,
277 unsigned int mode_flag
280 unsigned int in_slice_data_bit_offset = slice_param->slice_data_bit_offset;
281 unsigned int out_slice_data_bit_offset;
282 unsigned int i, j, n, buf_size, data_size, header_size;
286 header_size = slice_param->slice_data_bit_offset / 8;
287 data_size = slice_param->slice_data_size - slice_param->slice_data_offset;
288 buf_size = (header_size * 3 + 1) / 2; // Max possible header size (x1.5)
290 if (buf_size > data_size)
291 buf_size = data_size;
293 buf = alloca(buf_size);
294 ret = dri_bo_get_subdata(
295 slice_data_bo, slice_param->slice_data_offset,
300 for (i = 2, j = 2, n = 0; i < buf_size && j < header_size; i++, j++) {
301 if (buf[i] == 0x03 && buf[i - 1] == 0x00 && buf[i - 2] == 0x00)
305 out_slice_data_bit_offset = in_slice_data_bit_offset + n * 8;
307 if (mode_flag == ENTROPY_CABAC)
308 out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8);
309 return out_slice_data_bit_offset;
312 static inline uint8_t
313 get_ref_idx_state_1(const VAPictureH264 *va_pic, unsigned int frame_store_id)
315 const unsigned int is_long_term =
316 !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE);
317 const unsigned int is_top_field =
318 !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD);
319 const unsigned int is_bottom_field =
320 !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD);
322 return ((is_long_term << 6) |
323 ((is_top_field ^ is_bottom_field ^ 1) << 5) |
324 (frame_store_id << 1) |
325 ((is_top_field ^ 1) & is_bottom_field));
328 /* Fill in Reference List Entries (Gen5+: ILK, SNB, IVB) */
330 gen5_fill_avc_ref_idx_state(
332 const VAPictureH264 ref_list[32],
333 unsigned int ref_list_count,
334 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
337 unsigned int i, n, frame_idx;
340 for (i = 0, n = 0; i < ref_list_count; i++) {
341 const VAPictureH264 * const va_pic = &ref_list[i];
343 if (va_pic->flags & VA_PICTURE_H264_INVALID)
347 for (frame_idx = 0; frame_idx < MAX_GEN_REFERENCE_FRAMES; frame_idx++) {
348 const GenFrameStore * const fs = &frame_store[frame_idx];
349 if (fs->surface_id != VA_INVALID_ID &&
350 fs->surface_id == va_pic->picture_id) {
357 state[n++] = get_ref_idx_state_1(va_pic, frame_idx);
359 WARN_ONCE("Invalid Slice reference frame list !!!. It is not included in DPB \n");
367 /* Emit Reference List Entries (Gen6+: SNB, IVB) */
369 gen6_send_avc_ref_idx_state_1(
370 struct intel_batchbuffer *batch,
372 const VAPictureH264 *ref_list,
373 unsigned int ref_list_count,
374 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
377 uint8_t ref_idx_state[32];
379 BEGIN_BCS_BATCH(batch, 10);
380 OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2));
381 OUT_BCS_BATCH(batch, list);
382 gen5_fill_avc_ref_idx_state(
384 ref_list, ref_list_count,
387 intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state));
388 ADVANCE_BCS_BATCH(batch);
392 gen6_send_avc_ref_idx_state(
393 struct intel_batchbuffer *batch,
394 const VASliceParameterBufferH264 *slice_param,
395 const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
398 if (slice_param->slice_type == SLICE_TYPE_I ||
399 slice_param->slice_type == SLICE_TYPE_SI)
403 gen6_send_avc_ref_idx_state_1(
405 slice_param->RefPicList0, slice_param->num_ref_idx_l0_active_minus1 + 1,
409 if (slice_param->slice_type != SLICE_TYPE_B)
413 gen6_send_avc_ref_idx_state_1(
415 slice_param->RefPicList1, slice_param->num_ref_idx_l1_active_minus1 + 1,
421 intel_update_avc_frame_store_index(VADriverContextP ctx,
422 struct decode_state *decode_state,
423 VAPictureParameterBufferH264 *pic_param,
424 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES])
428 assert(MAX_GEN_REFERENCE_FRAMES == ARRAY_ELEMS(pic_param->ReferenceFrames));
430 for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) {
433 if (frame_store[i].surface_id == VA_INVALID_ID ||
434 frame_store[i].obj_surface == NULL)
437 assert(frame_store[i].frame_store_id != -1);
439 for (j = 0; j < MAX_GEN_REFERENCE_FRAMES; j++) {
440 VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j];
441 if (ref_pic->flags & VA_PICTURE_H264_INVALID)
444 if (frame_store[i].surface_id == ref_pic->picture_id) {
450 /* remove it from the internal DPB */
452 struct object_surface *obj_surface = frame_store[i].obj_surface;
454 obj_surface->flags &= ~SURFACE_REFERENCED;
456 if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) {
457 obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
458 i965_destroy_surface_storage(obj_surface);
461 frame_store[i].surface_id = VA_INVALID_ID;
462 frame_store[i].frame_store_id = -1;
463 frame_store[i].obj_surface = NULL;
467 for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) {
468 VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i];
471 if (ref_pic->flags & VA_PICTURE_H264_INVALID ||
472 ref_pic->picture_id == VA_INVALID_SURFACE ||
473 decode_state->reference_objects[i] == NULL)
476 for (j = 0; j < MAX_GEN_REFERENCE_FRAMES; j++) {
477 if (frame_store[j].surface_id == ref_pic->picture_id) {
483 /* add the new reference frame into the internal DPB */
487 struct object_surface *obj_surface = decode_state->reference_objects[i];
490 * Sometimes a dummy frame comes from the upper layer library, call i965_check_alloc_surface_bo()
491 * to ake sure the store buffer is allocated for this reference frame
493 avc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param);
497 /* Find a free frame store index */
498 for (j = 0; j < MAX_GEN_REFERENCE_FRAMES; j++) {
499 if (frame_store[j].surface_id == VA_INVALID_ID ||
500 frame_store[j].obj_surface == NULL) {
509 frame_store[j].surface_id = ref_pic->picture_id;
510 frame_store[j].frame_store_id = frame_idx;
511 frame_store[j].obj_surface = obj_surface;
513 WARN_ONCE("Not free slot for DPB reference list!!!\n");
521 intel_update_vc1_frame_store_index(VADriverContextP ctx,
522 struct decode_state *decode_state,
523 VAPictureParameterBufferVC1 *pic_param,
524 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES])
526 struct object_surface *obj_surface;
529 obj_surface = decode_state->reference_objects[0];
531 if (pic_param->forward_reference_picture == VA_INVALID_ID ||
534 frame_store[0].surface_id = VA_INVALID_ID;
535 frame_store[0].obj_surface = NULL;
537 frame_store[0].surface_id = pic_param->forward_reference_picture;
538 frame_store[0].obj_surface = obj_surface;
541 obj_surface = decode_state->reference_objects[1];
543 if (pic_param->backward_reference_picture == VA_INVALID_ID ||
546 frame_store[1].surface_id = frame_store[0].surface_id;
547 frame_store[1].obj_surface = frame_store[0].obj_surface;
549 frame_store[1].surface_id = pic_param->backward_reference_picture;
550 frame_store[1].obj_surface = obj_surface;
552 for (i = 2; i < MAX_GEN_REFERENCE_FRAMES; i++) {
553 frame_store[i].surface_id = frame_store[i % 2].surface_id;
554 frame_store[i].obj_surface = frame_store[i % 2].obj_surface;
560 intel_update_vp8_frame_store_index(VADriverContextP ctx,
561 struct decode_state *decode_state,
562 VAPictureParameterBufferVP8 *pic_param,
563 GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES])
565 struct object_surface *obj_surface;
568 obj_surface = decode_state->reference_objects[0];
570 if (pic_param->last_ref_frame == VA_INVALID_ID ||
573 frame_store[0].surface_id = VA_INVALID_ID;
574 frame_store[0].obj_surface = NULL;
576 frame_store[0].surface_id = pic_param->last_ref_frame;
577 frame_store[0].obj_surface = obj_surface;
580 obj_surface = decode_state->reference_objects[1];
582 if (pic_param->golden_ref_frame == VA_INVALID_ID ||
585 frame_store[1].surface_id = frame_store[0].surface_id;
586 frame_store[1].obj_surface = frame_store[0].obj_surface;
588 frame_store[1].surface_id = pic_param->golden_ref_frame;
589 frame_store[1].obj_surface = obj_surface;
592 obj_surface = decode_state->reference_objects[2];
594 if (pic_param->alt_ref_frame == VA_INVALID_ID ||
597 frame_store[2].surface_id = frame_store[0].surface_id;
598 frame_store[2].obj_surface = frame_store[0].obj_surface;
600 frame_store[2].surface_id = pic_param->alt_ref_frame;
601 frame_store[2].obj_surface = obj_surface;
604 for (i = 3; i < MAX_GEN_REFERENCE_FRAMES; i++) {
605 frame_store[i].surface_id = frame_store[i % 2].surface_id;
606 frame_store[i].obj_surface = frame_store[i % 2].obj_surface;
612 intel_decoder_check_avc_parameter(VADriverContextP ctx,
613 VAProfile h264_profile,
614 struct decode_state *decode_state)
616 struct i965_driver_data *i965 = i965_driver_data(ctx);
617 VAPictureParameterBufferH264 *pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
618 struct object_surface *obj_surface;
621 assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID));
622 assert(pic_param->CurrPic.picture_id != VA_INVALID_SURFACE);
624 if (pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID ||
625 pic_param->CurrPic.picture_id == VA_INVALID_SURFACE)
628 assert(pic_param->CurrPic.picture_id == decode_state->current_render_target);
630 if (pic_param->CurrPic.picture_id != decode_state->current_render_target)
633 if ((h264_profile != VAProfileH264Baseline)) {
634 if (pic_param->num_slice_groups_minus1 ||
635 pic_param->pic_fields.bits.redundant_pic_cnt_present_flag) {
636 WARN_ONCE("Unsupported the FMO/ASO constraints!!!\n");
641 for (i = 0; i < 16; i++) {
642 if (pic_param->ReferenceFrames[i].flags & VA_PICTURE_H264_INVALID ||
643 pic_param->ReferenceFrames[i].picture_id == VA_INVALID_SURFACE)
646 obj_surface = SURFACE(pic_param->ReferenceFrames[i].picture_id);
652 if (!obj_surface->bo) { /* a reference frame without store buffer */
653 WARN_ONCE("Invalid reference frame!!!\n");
656 decode_state->reference_objects[i] = obj_surface;
661 decode_state->reference_objects[i] = NULL;
663 return VA_STATUS_SUCCESS;
666 return VA_STATUS_ERROR_INVALID_PARAMETER;
670 intel_decoder_check_mpeg2_parameter(VADriverContextP ctx,
671 struct decode_state *decode_state)
673 struct i965_driver_data *i965 = i965_driver_data(ctx);
674 VAPictureParameterBufferMPEG2 *pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer;
675 struct object_surface *obj_surface;
678 if (pic_param->picture_coding_type == MPEG_I_PICTURE) {
679 } else if (pic_param->picture_coding_type == MPEG_P_PICTURE) {
680 obj_surface = SURFACE(pic_param->forward_reference_picture);
682 if (!obj_surface || !obj_surface->bo)
683 decode_state->reference_objects[i++] = NULL;
685 decode_state->reference_objects[i++] = obj_surface;
686 } else if (pic_param->picture_coding_type == MPEG_B_PICTURE) {
687 obj_surface = SURFACE(pic_param->forward_reference_picture);
689 if (!obj_surface || !obj_surface->bo)
690 decode_state->reference_objects[i++] = NULL;
692 decode_state->reference_objects[i++] = obj_surface;
694 obj_surface = SURFACE(pic_param->backward_reference_picture);
696 if (!obj_surface || !obj_surface->bo)
697 decode_state->reference_objects[i++] = NULL;
699 decode_state->reference_objects[i++] = obj_surface;
704 decode_state->reference_objects[i] = NULL;
706 return VA_STATUS_SUCCESS;
709 return VA_STATUS_ERROR_INVALID_PARAMETER;
713 intel_decoder_check_vc1_parameter(VADriverContextP ctx,
714 struct decode_state *decode_state)
716 struct i965_driver_data *i965 = i965_driver_data(ctx);
717 VAPictureParameterBufferVC1 *pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
718 struct object_surface *obj_surface;
721 if (pic_param->sequence_fields.bits.interlace == 1 &&
722 pic_param->picture_fields.bits.frame_coding_mode != 0) { /* frame-interlace or field-interlace */
723 return VA_STATUS_ERROR_DECODING_ERROR;
726 if (pic_param->picture_fields.bits.picture_type == 0 ||
727 pic_param->picture_fields.bits.picture_type == 3) {
728 } else if (pic_param->picture_fields.bits.picture_type == 1 ||
729 pic_param->picture_fields.bits.picture_type == 4) {
730 obj_surface = SURFACE(pic_param->forward_reference_picture);
732 if (!obj_surface || !obj_surface->bo)
733 decode_state->reference_objects[i++] = NULL;
735 decode_state->reference_objects[i++] = obj_surface;
736 } else if (pic_param->picture_fields.bits.picture_type == 2) {
737 obj_surface = SURFACE(pic_param->forward_reference_picture);
739 if (!obj_surface || !obj_surface->bo)
740 decode_state->reference_objects[i++] = NULL;
742 decode_state->reference_objects[i++] = obj_surface;
744 obj_surface = SURFACE(pic_param->backward_reference_picture);
746 if (!obj_surface || !obj_surface->bo)
747 decode_state->reference_objects[i++] = NULL;
749 decode_state->reference_objects[i++] = obj_surface;
754 decode_state->reference_objects[i] = NULL;
756 return VA_STATUS_SUCCESS;
759 return VA_STATUS_ERROR_INVALID_PARAMETER;
763 intel_decoder_check_vp8_parameter(VADriverContextP ctx,
764 struct decode_state *decode_state)
766 struct i965_driver_data *i965 = i965_driver_data(ctx);
767 VAPictureParameterBufferVP8 *pic_param = (VAPictureParameterBufferVP8 *)decode_state->pic_param->buffer;
768 struct object_surface *obj_surface;
771 if (pic_param->last_ref_frame != VA_INVALID_SURFACE) {
772 obj_surface = SURFACE(pic_param->last_ref_frame);
774 if (obj_surface && obj_surface->bo)
775 decode_state->reference_objects[i++] = obj_surface;
777 decode_state->reference_objects[i++] = NULL;
780 if (pic_param->golden_ref_frame != VA_INVALID_SURFACE) {
781 obj_surface = SURFACE(pic_param->golden_ref_frame);
783 if (obj_surface && obj_surface->bo)
784 decode_state->reference_objects[i++] = obj_surface;
786 decode_state->reference_objects[i++] = NULL;
789 if (pic_param->alt_ref_frame != VA_INVALID_SURFACE) {
790 obj_surface = SURFACE(pic_param->alt_ref_frame);
792 if (obj_surface && obj_surface->bo)
793 decode_state->reference_objects[i++] = obj_surface;
795 decode_state->reference_objects[i++] = NULL;
799 decode_state->reference_objects[i] = NULL;
801 return VA_STATUS_SUCCESS;
805 intel_decoder_sanity_check_input(VADriverContextP ctx,
807 struct decode_state *decode_state)
809 struct i965_driver_data *i965 = i965_driver_data(ctx);
810 struct object_surface *obj_surface;
811 VAStatus vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER;
813 if (decode_state->current_render_target == VA_INVALID_SURFACE)
816 obj_surface = SURFACE(decode_state->current_render_target);
821 decode_state->render_object = obj_surface;
824 case VAProfileMPEG2Simple:
825 case VAProfileMPEG2Main:
826 vaStatus = intel_decoder_check_mpeg2_parameter(ctx, decode_state);
829 case VAProfileH264ConstrainedBaseline:
830 case VAProfileH264Main:
831 case VAProfileH264High:
832 vaStatus = intel_decoder_check_avc_parameter(ctx, profile, decode_state);
835 case VAProfileVC1Simple:
836 case VAProfileVC1Main:
837 case VAProfileVC1Advanced:
838 vaStatus = intel_decoder_check_vc1_parameter(ctx, decode_state);
841 case VAProfileJPEGBaseline:
842 vaStatus = VA_STATUS_SUCCESS;
845 case VAProfileVP8Version0_3:
846 vaStatus = intel_decoder_check_vp8_parameter(ctx, decode_state);
850 vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER;
859 * Return the next slice paramter
862 * slice_param: the current slice
863 * *group_idx & *element_idx the current slice position in slice groups
865 * Return the next slice parameter
866 * *group_idx & *element_idx the next slice position in slice groups,
867 * if the next slice is NULL, *group_idx & *element_idx will be ignored
869 VASliceParameterBufferMPEG2 *
870 intel_mpeg2_find_next_slice(struct decode_state *decode_state,
871 VAPictureParameterBufferMPEG2 *pic_param,
872 VASliceParameterBufferMPEG2 *slice_param,
876 VASliceParameterBufferMPEG2 *next_slice_param;
877 unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16;
878 int j = *group_idx, i = *element_idx + 1;
880 for (; j < decode_state->num_slice_params; j++) {
881 for (; i < decode_state->slice_params[j]->num_elements; i++) {
882 next_slice_param = ((VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer) + i;
884 if ((next_slice_param->slice_vertical_position * width_in_mbs + next_slice_param->slice_horizontal_position) >=
885 (slice_param->slice_vertical_position * width_in_mbs + slice_param->slice_horizontal_position)) {
889 return next_slice_param;
899 /* Ensure the segmentation buffer is large enough for the supplied
900 number of MBs, or re-allocate it */
902 intel_ensure_vp8_segmentation_buffer(VADriverContextP ctx, GenBuffer *buf,
903 unsigned int mb_width, unsigned int mb_height)
905 struct i965_driver_data * const i965 = i965_driver_data(ctx);
906 /* The segmentation map is a 64-byte aligned linear buffer, with
907 each cache line holding only 8 bits for 4 continuous MBs */
908 const unsigned int buf_size = ((mb_width + 3) / 4) * 64 * mb_height;
911 if (buf->bo && buf->bo->size >= buf_size)
913 drm_intel_bo_unreference(buf->bo);
917 buf->bo = drm_intel_bo_alloc(i965->intel.bufmgr, "segmentation map",
919 buf->valid = buf->bo != NULL;