src/i965_avc_bsd.c

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Xiang Haihao <haihao.xiang@intel.com>
  26  *
  27  */
  28 #include <stdio.h>
  29 #include <stdlib.h>
  30 #include <string.h>
  31 #include <assert.h>
  32
  33 #include "intel_batchbuffer.h"
  34 #include "intel_driver.h"
  35
  36 #include "i965_defines.h"
  37 #include "i965_drv_video.h"
  38 #include "i965_avc_bsd.h"
  39 #include "i965_media_h264.h"
  40 #include "i965_media.h"
  41 #include "i965_decoder_utils.h"
  42 #include "intel_media.h"
  43
  44 static void
  45 i965_avc_bsd_init_avc_bsd_surface(VADriverContextP ctx,
  46                                   struct object_surface *obj_surface,
  47                                   VAPictureParameterBufferH264 *pic_param,
  48                                   struct i965_h264_context *i965_h264_context)
  49 {
  50     struct i965_driver_data *i965 = i965_driver_data(ctx);
  51     GenAvcSurface *avc_bsd_surface = obj_surface->private_data;
  52
  53     obj_surface->free_private_data = gen_free_avc_surface;
  54
  55     if (!avc_bsd_surface) {
  56         avc_bsd_surface = calloc(sizeof(GenAvcSurface), 1);
  57         assert((obj_surface->size & 0x3f) == 0);
  58         obj_surface->private_data = avc_bsd_surface;
  59     }
  60
  61     avc_bsd_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag &&
  62                                         !pic_param->seq_fields.bits.direct_8x8_inference_flag);
  63
  64     if (avc_bsd_surface->dmv_top == NULL) {
  65         avc_bsd_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr,
  66                                                 "direct mv w/r buffer",
  67                                                 DMV_SIZE,
  68                                                 0x1000);
  69     }
  70
  71     if (avc_bsd_surface->dmv_bottom_flag &&
  72         avc_bsd_surface->dmv_bottom == NULL) {
  73         avc_bsd_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr,
  74                                                    "direct mv w/r buffer",
  75                                                    DMV_SIZE,
  76                                                    0x1000);
  77     }
  78 }
  79
  80 static void
  81 i965_bsd_ind_obj_base_address(VADriverContextP ctx,
  82                               struct decode_state *decode_state,
  83                               int slice,
  84                               struct i965_h264_context *i965_h264_context)
  85
  86 {
  87     struct intel_batchbuffer *batch = i965_h264_context->batch;
  88
  89     dri_bo *ind_bo = decode_state->slice_datas[slice]->bo;
  90
  91     BEGIN_BCS_BATCH(batch, 3);
  92     OUT_BCS_BATCH(batch, CMD_BSD_IND_OBJ_BASE_ADDR | (3 - 2));
  93     OUT_BCS_RELOC(batch, ind_bo,
  94                   I915_GEM_DOMAIN_INSTRUCTION, 0,
  95                   0);
  96     OUT_BCS_BATCH(batch, 0);
  97     ADVANCE_BCS_BATCH(batch);
  98 }
  99
 100 static void
 101 i965_avc_bsd_img_state(VADriverContextP ctx,
 102                        struct decode_state *decode_state,
 103                        struct i965_h264_context *i965_h264_context)
 104 {
 105     struct intel_batchbuffer *batch = i965_h264_context->batch;
 106     int qm_present_flag;
 107     int img_struct;
 108     int mbaff_frame_flag;
 109     unsigned int avc_it_command_header;
 110     unsigned int width_in_mbs, height_in_mbs;
 111     VAPictureParameterBufferH264 *pic_param;
 112
 113     if (decode_state->iq_matrix && decode_state->iq_matrix->buffer)
 114         qm_present_flag = 1;
 115     else
 116         qm_present_flag = 0; /* built-in QM matrices */
 117
 118     assert(decode_state->pic_param && decode_state->pic_param->buffer);
 119     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
 120
 121     assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID));
 122
 123     if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD)
 124         img_struct = 1;
 125     else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD)
 126         img_struct = 3;
 127     else
 128         img_struct = 0;
 129
 130     if ((img_struct & 0x1) == 0x1) {
 131         assert(pic_param->pic_fields.bits.field_pic_flag == 0x1);
 132     } else {
 133         assert(pic_param->pic_fields.bits.field_pic_flag == 0x0);
 134     }
 135
 136     if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */
 137         assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0);
 138         assert(pic_param->pic_fields.bits.field_pic_flag == 0);
 139     } else {
 140         assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */
 141     }
 142
 143     mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag &&
 144                         !pic_param->pic_fields.bits.field_pic_flag);
 145
 146     width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff);
 147     height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */
 148
 149     assert(!((width_in_mbs * height_in_mbs) & 0x8000)); /* hardware requirement */
 150
 151     /* BSD unit doesn't support 4:2:2 and 4:4:4 picture */
 152     assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */
 153            pic_param->seq_fields.bits.chroma_format_idc == 1);  /* 4:2:0 */
 154     assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */
 155
 156     avc_it_command_header = (CMD_MEDIA_OBJECT_EX | (12 - 2));
 157
 158     BEGIN_BCS_BATCH(batch, 6);
 159     OUT_BCS_BATCH(batch, CMD_AVC_BSD_IMG_STATE | (6 - 2));
 160     OUT_BCS_BATCH(batch,
 161                   ((width_in_mbs * height_in_mbs) & 0x7fff));
 162     OUT_BCS_BATCH(batch,
 163                   (height_in_mbs << 16) |
 164                   (width_in_mbs << 0));
 165     OUT_BCS_BATCH(batch,
 166                   ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) |
 167                   ((pic_param->chroma_qp_index_offset & 0x1f) << 16) |
 168                   (SCAN_RASTER_ORDER << 15) | /* AVC ILDB Data */
 169                   (SCAN_SPECIAL_ORDER << 14) | /* AVC IT Command */
 170                   (SCAN_RASTER_ORDER << 13) | /* AVC IT Data */
 171                   (1 << 12) | /* always 1, hardware requirement */
 172                   (qm_present_flag << 10) |
 173                   (img_struct << 8) |
 174                   (16 << 0)); /* FIXME: always support 16 reference frames ??? */
 175     OUT_BCS_BATCH(batch,
 176                   (RESIDUAL_DATA_OFFSET << 24) | /* residual data offset */
 177                   (0 << 17) | /* don't overwrite SRT */
 178                   (0 << 16) | /* Un-SRT (Unsynchronized Root Thread) */
 179                   (0 << 12) | /* FIXME: no 16MV ??? */
 180                   (pic_param->seq_fields.bits.chroma_format_idc << 10) |
 181                   (i965_h264_context->enable_avc_ildb << 8)  | /* Enable ILDB writing output */
 182                   (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) |
 183                   ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) |
 184                   (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) |
 185                   (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) |
 186                   (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) |
 187                   (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) |
 188                   (mbaff_frame_flag << 1) |
 189                   (pic_param->pic_fields.bits.field_pic_flag << 0));
 190     OUT_BCS_BATCH(batch, avc_it_command_header);
 191     ADVANCE_BCS_BATCH(batch);
 192 }
 193
 194 static void
 195 i965_avc_bsd_qm_state(VADriverContextP ctx,
 196                       struct decode_state *decode_state,
 197                       struct i965_h264_context *i965_h264_context)
 198 {
 199     struct intel_batchbuffer *batch = i965_h264_context->batch;
 200     int cmd_len;
 201     VAIQMatrixBufferH264 *iq_matrix;
 202     VAPictureParameterBufferH264 *pic_param;
 203
 204     if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer)
 205         return;
 206
 207     iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer;
 208
 209     assert(decode_state->pic_param && decode_state->pic_param->buffer);
 210     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
 211
 212     cmd_len = 2 + 6 * 4; /* always load six 4x4 scaling matrices */
 213
 214     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
 215         cmd_len += 2 * 16; /* load two 8x8 scaling matrices */
 216
 217     BEGIN_BCS_BATCH(batch, cmd_len);
 218     OUT_BCS_BATCH(batch, CMD_AVC_BSD_QM_STATE | (cmd_len - 2));
 219
 220     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
 221         OUT_BCS_BATCH(batch,
 222                       (0x0  << 8) | /* don't use default built-in matrices */
 223                       (0xff << 0)); /* six 4x4 and two 8x8 scaling matrices */
 224     else
 225         OUT_BCS_BATCH(batch,
 226                       (0x0  << 8) | /* don't use default built-in matrices */
 227                       (0x3f << 0)); /* six 4x4 scaling matrices */
 228
 229     intel_batchbuffer_data(batch, &iq_matrix->ScalingList4x4[0][0], 6 * 4 * 4);
 230
 231     if (pic_param->pic_fields.bits.transform_8x8_mode_flag)
 232         intel_batchbuffer_data(batch, &iq_matrix->ScalingList8x8[0][0], 2 * 16 * 4);
 233
 234     ADVANCE_BCS_BATCH(batch);
 235 }
 236
 237 static void
 238 i965_avc_bsd_slice_state(VADriverContextP ctx,
 239                          VAPictureParameterBufferH264 *pic_param,
 240                          VASliceParameterBufferH264 *slice_param,
 241                          struct i965_h264_context *i965_h264_context)
 242 {
 243     struct intel_batchbuffer *batch = i965_h264_context->batch;
 244     int present_flag, cmd_len, list, j;
 245     uint8_t ref_idx_state[32];
 246     char weightoffsets[32 * 6];
 247
 248     /* don't issue SLICE_STATE for intra-prediction decoding */
 249     if (slice_param->slice_type == SLICE_TYPE_I ||
 250         slice_param->slice_type == SLICE_TYPE_SI)
 251         return;
 252
 253     cmd_len = 2;
 254
 255     if (slice_param->slice_type == SLICE_TYPE_P ||
 256         slice_param->slice_type == SLICE_TYPE_SP) {
 257         present_flag = PRESENT_REF_LIST0;
 258         cmd_len += 8;
 259     } else {
 260         present_flag = PRESENT_REF_LIST0 | PRESENT_REF_LIST1;
 261         cmd_len += 16;
 262     }
 263
 264     if ((slice_param->slice_type == SLICE_TYPE_P ||
 265          slice_param->slice_type == SLICE_TYPE_SP) &&
 266         (pic_param->pic_fields.bits.weighted_pred_flag == 1)) {
 267         present_flag |= PRESENT_WEIGHT_OFFSET_L0;
 268         cmd_len += 48;
 269     }
 270
 271     if ((slice_param->slice_type == SLICE_TYPE_B) &&
 272         (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) {
 273         present_flag |= PRESENT_WEIGHT_OFFSET_L0 | PRESENT_WEIGHT_OFFSET_L1;
 274         cmd_len += 96;
 275     }
 276
 277     BEGIN_BCS_BATCH(batch, cmd_len);
 278     OUT_BCS_BATCH(batch, CMD_AVC_BSD_SLICE_STATE | (cmd_len - 2));
 279     OUT_BCS_BATCH(batch, present_flag);
 280
 281     for (list = 0; list < 2; list++) {
 282         int flag, num_va_pics;
 283         VAPictureH264 *va_pic;
 284
 285         if (list == 0) {
 286             flag        = PRESENT_REF_LIST0;
 287             va_pic      = slice_param->RefPicList0;
 288             num_va_pics = slice_param->num_ref_idx_l0_active_minus1 + 1;
 289         } else {
 290             flag        = PRESENT_REF_LIST1;
 291             va_pic      = slice_param->RefPicList1;
 292             num_va_pics = slice_param->num_ref_idx_l1_active_minus1 + 1;
 293         }
 294
 295         if (!(present_flag & flag))
 296             continue;
 297
 298         gen5_fill_avc_ref_idx_state(
 299             ref_idx_state,
 300             va_pic, num_va_pics,
 301             i965_h264_context->fsid_list
 302         );
 303         intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state));
 304     }
 305
 306     i965_h264_context->weight128_luma_l0 = 0;
 307     i965_h264_context->weight128_luma_l1 = 0;
 308     i965_h264_context->weight128_chroma_l0 = 0;
 309     i965_h264_context->weight128_chroma_l1 = 0;
 310
 311     i965_h264_context->weight128_offset0_flag = 0;
 312     i965_h264_context->weight128_offset0 = 0;
 313
 314     if (present_flag & PRESENT_WEIGHT_OFFSET_L0) {
 315         for (j = 0; j < 32; j++) {
 316             weightoffsets[j * 6 + 0] = slice_param->luma_offset_l0[j];
 317             weightoffsets[j * 6 + 1] = slice_param->luma_weight_l0[j];
 318             weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l0[j][0];
 319             weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l0[j][0];
 320             weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l0[j][1];
 321             weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l0[j][1];
 322
 323             if (pic_param->pic_fields.bits.weighted_pred_flag == 1 ||
 324                 pic_param->pic_fields.bits.weighted_bipred_idc == 1) {
 325                 if (i965_h264_context->use_hw_w128) {
 326                     if (slice_param->luma_weight_l0[j] == 128)
 327                         i965_h264_context->weight128_luma_l0 |= (1 << j);
 328
 329                     if (slice_param->chroma_weight_l0[j][0] == 128 ||
 330                         slice_param->chroma_weight_l0[j][1] == 128)
 331                         i965_h264_context->weight128_chroma_l0 |= (1 << j);
 332                 } else {
 333                     /* FIXME: workaround for weight 128 */
 334                     if (slice_param->luma_weight_l0[j] == 128 ||
 335                         slice_param->chroma_weight_l0[j][0] == 128 ||
 336                         slice_param->chroma_weight_l0[j][1] == 128)
 337                         i965_h264_context->weight128_offset0_flag = 1;
 338                 }
 339             }
 340         }
 341
 342         intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets));
 343     }
 344
 345     if (present_flag & PRESENT_WEIGHT_OFFSET_L1) {
 346         for (j = 0; j < 32; j++) {
 347             weightoffsets[j * 6 + 0] = slice_param->luma_offset_l1[j];
 348             weightoffsets[j * 6 + 1] = slice_param->luma_weight_l1[j];
 349             weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l1[j][0];
 350             weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l1[j][0];
 351             weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l1[j][1];
 352             weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l1[j][1];
 353
 354             if (pic_param->pic_fields.bits.weighted_bipred_idc == 1) {
 355                 if (i965_h264_context->use_hw_w128) {
 356                     if (slice_param->luma_weight_l1[j] == 128)
 357                         i965_h264_context->weight128_luma_l1 |= (1 << j);
 358
 359                     if (slice_param->chroma_weight_l1[j][0] == 128 ||
 360                         slice_param->chroma_weight_l1[j][1] == 128)
 361                         i965_h264_context->weight128_chroma_l1 |= (1 << j);
 362                 } else {
 363                     if (slice_param->luma_weight_l0[j] == 128 ||
 364                         slice_param->chroma_weight_l0[j][0] == 128 ||
 365                         slice_param->chroma_weight_l0[j][1] == 128)
 366                         i965_h264_context->weight128_offset0_flag = 1;
 367                 }
 368             }
 369         }
 370
 371         intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets));
 372     }
 373
 374     ADVANCE_BCS_BATCH(batch);
 375 }
 376
 377 static void
 378 i965_avc_bsd_buf_base_state(VADriverContextP ctx,
 379                             VAPictureParameterBufferH264 *pic_param,
 380                             VASliceParameterBufferH264 *slice_param,
 381                             struct i965_h264_context *i965_h264_context)
 382 {
 383     struct i965_driver_data *i965 = i965_driver_data(ctx);
 384     struct intel_batchbuffer *batch = i965_h264_context->batch;
 385     struct i965_avc_bsd_context *i965_avc_bsd_context;
 386     int i, j;
 387     VAPictureH264 *va_pic;
 388     struct object_surface *obj_surface;
 389     GenAvcSurface *avc_bsd_surface;
 390
 391     i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context;
 392
 393     BEGIN_BCS_BATCH(batch, 74);
 394     OUT_BCS_BATCH(batch, CMD_AVC_BSD_BUF_BASE_STATE | (74 - 2));
 395     OUT_BCS_RELOC(batch, i965_avc_bsd_context->bsd_raw_store.bo,
 396                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 397                   0);
 398     OUT_BCS_RELOC(batch, i965_avc_bsd_context->mpr_row_store.bo,
 399                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 400                   0);
 401     OUT_BCS_RELOC(batch, i965_h264_context->avc_it_command_mb_info.bo,
 402                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 403                   i965_h264_context->avc_it_command_mb_info.mbs * i965_h264_context->use_avc_hw_scoreboard * MB_CMD_IN_BYTES);
 404     OUT_BCS_RELOC(batch, i965_h264_context->avc_it_data.bo,
 405                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 406                   (i965_h264_context->avc_it_data.write_offset << 6));
 407
 408     if (i965_h264_context->enable_avc_ildb)
 409         OUT_BCS_RELOC(batch, i965_h264_context->avc_ildb_data.bo,
 410                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 411                       0);
 412     else
 413         OUT_BCS_BATCH(batch, 0);
 414
 415     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
 416         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) {
 417             int found = 0;
 418             for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
 419                 va_pic = &pic_param->ReferenceFrames[j];
 420
 421                 if (va_pic->flags & VA_PICTURE_H264_INVALID)
 422                     continue;
 423
 424                 if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
 425                     found = 1;
 426                     break;
 427                 }
 428             }
 429
 430             assert(found == 1);
 431
 432             if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) {
 433                 obj_surface = SURFACE(va_pic->picture_id);
 434                 assert(obj_surface);
 435                 avc_bsd_surface = obj_surface->private_data;
 436
 437                 if (avc_bsd_surface == NULL) {
 438                     OUT_BCS_BATCH(batch, 0);
 439                     OUT_BCS_BATCH(batch, 0);
 440                 } else {
 441                     OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 442                                   I915_GEM_DOMAIN_INSTRUCTION, 0,
 443                                   0);
 444
 445                     if (avc_bsd_surface->dmv_bottom_flag == 1)
 446                         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom,
 447                                       I915_GEM_DOMAIN_INSTRUCTION, 0,
 448                                       0);
 449                     else
 450                         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 451                                       I915_GEM_DOMAIN_INSTRUCTION, 0,
 452                                       0);
 453                 }
 454             }
 455         } else {
 456             OUT_BCS_BATCH(batch, 0);
 457             OUT_BCS_BATCH(batch, 0);
 458         }
 459     }
 460
 461     va_pic = &pic_param->CurrPic;
 462     assert(!(va_pic->flags & VA_PICTURE_H264_INVALID));
 463     obj_surface = SURFACE(va_pic->picture_id);
 464     assert(obj_surface);
 465     obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
 466     obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
 467     i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420);
 468
 469     /* initial uv component for YUV400 case */
 470     if (pic_param->seq_fields.bits.chroma_format_idc == 0) {
 471          unsigned int uv_offset = obj_surface->width * obj_surface->height;
 472          unsigned int uv_size   = obj_surface->width * obj_surface->height / 2;
 473
 474          dri_bo_map(obj_surface->bo, 1);
 475          memset(obj_surface->bo->virtual + uv_offset, 0x80, uv_size);
 476          dri_bo_unmap(obj_surface->bo);
 477     }
 478
 479     i965_avc_bsd_init_avc_bsd_surface(ctx, obj_surface, pic_param, i965_h264_context);
 480     avc_bsd_surface = obj_surface->private_data;
 481
 482     OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 483                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 484                   0);
 485
 486     if (avc_bsd_surface->dmv_bottom_flag == 1)
 487         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom,
 488                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 489                       0);
 490     else
 491         OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
 492                       I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
 493                       0);
 494
 495     /* POC List */
 496     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
 497         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) {
 498             int found = 0;
 499             for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
 500                 va_pic = &pic_param->ReferenceFrames[j];
 501
 502                 if (va_pic->flags & VA_PICTURE_H264_INVALID)
 503                     continue;
 504
 505                 if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
 506                     found = 1;
 507                     break;
 508                 }
 509             }
 510
 511             assert(found == 1);
 512
 513             if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) {
 514                 OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
 515                 OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
 516             }
 517         } else {
 518             OUT_BCS_BATCH(batch, 0);
 519             OUT_BCS_BATCH(batch, 0);
 520         }
 521     }
 522
 523     va_pic = &pic_param->CurrPic;
 524     OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
 525     OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
 526
 527     ADVANCE_BCS_BATCH(batch);
 528 }
 529
 530 static void
 531 g4x_avc_bsd_object(VADriverContextP ctx,
 532                    struct decode_state *decode_state,
 533                    VAPictureParameterBufferH264 *pic_param,
 534                    VASliceParameterBufferH264 *slice_param,
 535                    int slice_index,
 536                    struct i965_h264_context *i965_h264_context)
 537 {
 538     struct intel_batchbuffer *batch = i965_h264_context->batch;
 539     int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
 540     int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
 541
 542     if (slice_param) {
 543         int encrypted, counter_value, cmd_len;
 544         int slice_hor_pos, slice_ver_pos;
 545         int num_ref_idx_l0, num_ref_idx_l1;
 546         int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag &&
 547                              pic_param->seq_fields.bits.mb_adaptive_frame_field_flag);
 548         unsigned int slice_data_bit_offset;
 549         int weighted_pred_idc = 0;
 550         int first_mb_in_slice = 0;
 551         int slice_type;
 552
 553         encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */
 554
 555         if (encrypted) {
 556             cmd_len = 9;
 557             counter_value = 0; /* FIXME: ??? */
 558         } else
 559             cmd_len = 8;
 560
 561
 562         slice_data_bit_offset = avc_get_first_mb_bit_offset_with_epb(
 563             decode_state->slice_datas[slice_index]->bo,
 564             slice_param,
 565             pic_param->pic_fields.bits.entropy_coding_mode_flag
 566         );
 567
 568         if (slice_param->slice_type == SLICE_TYPE_I ||
 569             slice_param->slice_type == SLICE_TYPE_SI)
 570             slice_type = SLICE_TYPE_I;
 571         else if (slice_param->slice_type == SLICE_TYPE_P ||
 572                  slice_param->slice_type == SLICE_TYPE_SP)
 573             slice_type = SLICE_TYPE_P;
 574         else {
 575             assert(slice_param->slice_type == SLICE_TYPE_B);
 576             slice_type = SLICE_TYPE_B;
 577         }
 578
 579         if (slice_type == SLICE_TYPE_I) {
 580             assert(slice_param->num_ref_idx_l0_active_minus1 == 0);
 581             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 582             num_ref_idx_l0 = 0;
 583             num_ref_idx_l1 = 0;
 584         } else if (slice_type == SLICE_TYPE_P) {
 585             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 586             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 587             num_ref_idx_l1 = 0;
 588         } else {
 589             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 590             num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1;
 591         }
 592
 593         if (slice_type == SLICE_TYPE_P)
 594             weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag;
 595         else if (slice_type == SLICE_TYPE_B)
 596             weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc;
 597
 598         first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture;
 599         slice_hor_pos = first_mb_in_slice % width_in_mbs;
 600         slice_ver_pos = first_mb_in_slice / width_in_mbs;
 601
 602         BEGIN_BCS_BATCH(batch, cmd_len);
 603         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (cmd_len - 2));
 604         OUT_BCS_BATCH(batch,
 605                       (encrypted << 31) |
 606                       ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0));
 607         OUT_BCS_BATCH(batch,
 608                       (slice_param->slice_data_offset +
 609                        (slice_data_bit_offset >> 3)));
 610         OUT_BCS_BATCH(batch,
 611                       (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */
 612                       (0 << 14) | /* ignore BSDPrematureComplete Error handling */
 613                       (0 << 13) | /* FIXME: ??? */
 614                       (0 << 12) | /* ignore MPR Error handling */
 615                       (0 << 10) | /* ignore Entropy Error handling */
 616                       (0 << 8)  | /* ignore MB Header Error handling */
 617                       (slice_type << 0));
 618         OUT_BCS_BATCH(batch,
 619                       (num_ref_idx_l1 << 24) |
 620                       (num_ref_idx_l0 << 16) |
 621                       (slice_param->chroma_log2_weight_denom << 8) |
 622                       (slice_param->luma_log2_weight_denom << 0));
 623         OUT_BCS_BATCH(batch,
 624                       (weighted_pred_idc << 30) |
 625                       (slice_param->direct_spatial_mv_pred_flag << 29) |
 626                       (slice_param->disable_deblocking_filter_idc << 27) |
 627                       (slice_param->cabac_init_idc << 24) |
 628                       ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) |
 629                       ((slice_param->slice_beta_offset_div2 & 0xf) << 8) |
 630                       ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0));
 631         OUT_BCS_BATCH(batch,
 632                       (slice_ver_pos << 24) |
 633                       (slice_hor_pos << 16) |
 634                       (first_mb_in_slice << 0));
 635         OUT_BCS_BATCH(batch,
 636                       (0 << 7) | /* FIXME: ??? */
 637                       ((0x7 - (slice_data_bit_offset & 0x7)) << 0));
 638
 639         if (encrypted) {
 640             OUT_BCS_BATCH(batch, counter_value);
 641         }
 642
 643         ADVANCE_BCS_BATCH(batch);
 644     } else {
 645         BEGIN_BCS_BATCH(batch, 8);
 646         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (8 - 2));
 647         OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */
 648         OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */
 649         OUT_BCS_BATCH(batch, 0);
 650         OUT_BCS_BATCH(batch, 0);
 651         OUT_BCS_BATCH(batch, 0);
 652         OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag));
 653         OUT_BCS_BATCH(batch, 0);
 654         ADVANCE_BCS_BATCH(batch);
 655     }
 656 }
 657
 658 static void
 659 ironlake_avc_bsd_object(VADriverContextP ctx,
 660                         struct decode_state *decode_state,
 661                         VAPictureParameterBufferH264 *pic_param,
 662                         VASliceParameterBufferH264 *slice_param,
 663                         int slice_index,
 664                         struct i965_h264_context *i965_h264_context)
 665 {
 666     struct intel_batchbuffer *batch = i965_h264_context->batch;
 667     int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
 668     int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
 669
 670     if (slice_param) {
 671         int encrypted, counter_value;
 672         int slice_hor_pos, slice_ver_pos;
 673         int num_ref_idx_l0, num_ref_idx_l1;
 674         int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag &&
 675                              pic_param->seq_fields.bits.mb_adaptive_frame_field_flag);
 676         unsigned int slice_data_bit_offset;
 677         int weighted_pred_idc = 0;
 678         int first_mb_in_slice;
 679         int slice_type;
 680
 681         encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */
 682
 683         if (encrypted) {
 684             counter_value = 0; /* FIXME: ??? */
 685         } else
 686             counter_value = 0;
 687
 688         slice_data_bit_offset = avc_get_first_mb_bit_offset_with_epb(
 689             decode_state->slice_datas[slice_index]->bo,
 690             slice_param,
 691             pic_param->pic_fields.bits.entropy_coding_mode_flag
 692         );
 693
 694         if (slice_param->slice_type == SLICE_TYPE_I ||
 695             slice_param->slice_type == SLICE_TYPE_SI)
 696             slice_type = SLICE_TYPE_I;
 697         else if (slice_param->slice_type == SLICE_TYPE_P ||
 698                  slice_param->slice_type == SLICE_TYPE_SP)
 699             slice_type = SLICE_TYPE_P;
 700         else {
 701             assert(slice_param->slice_type == SLICE_TYPE_B);
 702             slice_type = SLICE_TYPE_B;
 703         }
 704
 705         if (slice_type == SLICE_TYPE_I) {
 706             assert(slice_param->num_ref_idx_l0_active_minus1 == 0);
 707             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 708             num_ref_idx_l0 = 0;
 709             num_ref_idx_l1 = 0;
 710         } else if (slice_type == SLICE_TYPE_P) {
 711             assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
 712             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 713             num_ref_idx_l1 = 0;
 714         } else {
 715             num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
 716             num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1;
 717         }
 718
 719         if (slice_type == SLICE_TYPE_P)
 720             weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag;
 721         else if (slice_type == SLICE_TYPE_B)
 722             weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc;
 723
 724         first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture;
 725         slice_hor_pos = first_mb_in_slice % width_in_mbs;
 726         slice_ver_pos = first_mb_in_slice / width_in_mbs;
 727
 728         BEGIN_BCS_BATCH(batch, 16);
 729         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2));
 730         OUT_BCS_BATCH(batch,
 731                       (encrypted << 31) |
 732                       (0 << 30) | /* FIXME: packet based bit stream */
 733                       (0 << 29) | /* FIXME: packet format */
 734                       ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0));
 735         OUT_BCS_BATCH(batch,
 736                       (slice_param->slice_data_offset +
 737                        (slice_data_bit_offset >> 3)));
 738         OUT_BCS_BATCH(batch,
 739                       (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */
 740                       (0 << 14) | /* ignore BSDPrematureComplete Error handling */
 741                       (0 << 13) | /* FIXME: ??? */
 742                       (0 << 12) | /* ignore MPR Error handling */
 743                       (0 << 10) | /* ignore Entropy Error handling */
 744                       (0 << 8)  | /* ignore MB Header Error handling */
 745                       (slice_type << 0));
 746         OUT_BCS_BATCH(batch,
 747                       (num_ref_idx_l1 << 24) |
 748                       (num_ref_idx_l0 << 16) |
 749                       (slice_param->chroma_log2_weight_denom << 8) |
 750                       (slice_param->luma_log2_weight_denom << 0));
 751         OUT_BCS_BATCH(batch,
 752                       (weighted_pred_idc << 30) |
 753                       (slice_param->direct_spatial_mv_pred_flag << 29) |
 754                       (slice_param->disable_deblocking_filter_idc << 27) |
 755                       (slice_param->cabac_init_idc << 24) |
 756                       ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) |
 757                       ((slice_param->slice_beta_offset_div2 & 0xf) << 8) |
 758                       ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0));
 759         OUT_BCS_BATCH(batch,
 760                       (slice_ver_pos << 24) |
 761                       (slice_hor_pos << 16) |
 762                       (first_mb_in_slice << 0));
 763         OUT_BCS_BATCH(batch,
 764                       (0 << 7) | /* FIXME: ??? */
 765                       ((0x7 - (slice_data_bit_offset & 0x7)) << 0));
 766         OUT_BCS_BATCH(batch, counter_value);
 767
 768         /* FIXME: dw9-dw11 */
 769         OUT_BCS_BATCH(batch, 0);
 770         OUT_BCS_BATCH(batch, 0);
 771         OUT_BCS_BATCH(batch, 0);
 772         OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l0);
 773         OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l1);
 774         OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l0);
 775         OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l1);
 776
 777         ADVANCE_BCS_BATCH(batch);
 778     } else {
 779         BEGIN_BCS_BATCH(batch, 16);
 780         OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2));
 781         OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */
 782         OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */
 783         OUT_BCS_BATCH(batch, 0);
 784         OUT_BCS_BATCH(batch, 0);
 785         OUT_BCS_BATCH(batch, 0);
 786         OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag));
 787         OUT_BCS_BATCH(batch, 0);
 788         OUT_BCS_BATCH(batch, 0);
 789         OUT_BCS_BATCH(batch, 0);
 790         OUT_BCS_BATCH(batch, 0);
 791         OUT_BCS_BATCH(batch, 0);
 792         OUT_BCS_BATCH(batch, 0);
 793         OUT_BCS_BATCH(batch, 0);
 794         OUT_BCS_BATCH(batch, 0);
 795         OUT_BCS_BATCH(batch, 0);
 796         ADVANCE_BCS_BATCH(batch);
 797     }
 798 }
 799
 800 static void
 801 i965_avc_bsd_object(VADriverContextP ctx,
 802                     struct decode_state *decode_state,
 803                     VAPictureParameterBufferH264 *pic_param,
 804                     VASliceParameterBufferH264 *slice_param,
 805                     int slice_index,
 806                     struct i965_h264_context *i965_h264_context)
 807 {
 808     struct i965_driver_data *i965 = i965_driver_data(ctx);
 809
 810     if (IS_IRONLAKE(i965->intel.device_id))
 811         ironlake_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
 812     else
 813         g4x_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
 814 }
 815
 816 static void
 817 i965_avc_bsd_phantom_slice(VADriverContextP ctx,
 818                            struct decode_state *decode_state,
 819                            VAPictureParameterBufferH264 *pic_param,
 820                            struct i965_h264_context *i965_h264_context)
 821 {
 822     i965_avc_bsd_object(ctx, decode_state, pic_param, NULL, 0, i965_h264_context);
 823 }
 824
 825 static void
 826 i965_avc_bsd_frame_store_index(VADriverContextP ctx,
 827                                VAPictureParameterBufferH264 *pic_param,
 828                                struct i965_h264_context *i965_h264_context)
 829 {
 830     struct i965_driver_data *i965 = i965_driver_data(ctx);
 831     int i, j;
 832
 833     assert(ARRAY_ELEMS(i965_h264_context->fsid_list) == ARRAY_ELEMS(pic_param->ReferenceFrames));
 834
 835     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
 836         int found = 0;
 837
 838         if (i965_h264_context->fsid_list[i].surface_id == VA_INVALID_ID)
 839             continue;
 840
 841         for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
 842             VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j];
 843             if (ref_pic->flags & VA_PICTURE_H264_INVALID)
 844                 continue;
 845
 846             if (i965_h264_context->fsid_list[i].surface_id == ref_pic->picture_id) {
 847                 found = 1;
 848                 break;
 849             }
 850         }
 851
 852         if (!found) {
 853             struct object_surface *obj_surface = SURFACE(i965_h264_context->fsid_list[i].surface_id);
 854             obj_surface->flags &= ~SURFACE_REFERENCED;
 855
 856             if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) {
 857                 dri_bo_unreference(obj_surface->bo);
 858                 obj_surface->bo = NULL;
 859                 obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
 860             }
 861
 862             if (obj_surface->free_private_data)
 863                 obj_surface->free_private_data(&obj_surface->private_data);
 864
 865             i965_h264_context->fsid_list[i].surface_id = VA_INVALID_ID;
 866             i965_h264_context->fsid_list[i].frame_store_id = -1;
 867         }
 868     }
 869
 870     for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) {
 871         VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i];
 872         int found = 0;
 873
 874         if (ref_pic->flags & VA_PICTURE_H264_INVALID)
 875             continue;
 876
 877         for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 878             if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID)
 879                 continue;
 880
 881             if (i965_h264_context->fsid_list[j].surface_id == ref_pic->picture_id) {
 882                 found = 1;
 883                 break;
 884             }
 885         }
 886
 887         if (!found) {
 888             int frame_idx;
 889             struct object_surface *obj_surface = SURFACE(ref_pic->picture_id);
 890             assert(obj_surface);
 891             i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420);
 892
 893             for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) {
 894                 for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 895                     if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID)
 896                         continue;
 897
 898                     if (i965_h264_context->fsid_list[j].frame_store_id == frame_idx)
 899                         break;
 900                 }
 901
 902                 if (j == ARRAY_ELEMS(i965_h264_context->fsid_list))
 903                     break;
 904             }
 905
 906             assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list));
 907
 908             for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 909                 if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) {
 910                     i965_h264_context->fsid_list[j].surface_id = ref_pic->picture_id;
 911                     i965_h264_context->fsid_list[j].frame_store_id = frame_idx;
 912                     break;
 913                 }
 914             }
 915         }
 916     }
 917
 918     for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list) - 1; i++) {
 919         if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID &&
 920             i965_h264_context->fsid_list[i].frame_store_id == i)
 921             continue;
 922
 923         for (j = i + 1; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) {
 924             if (i965_h264_context->fsid_list[j].surface_id != VA_INVALID_ID &&
 925                 i965_h264_context->fsid_list[j].frame_store_id == i) {
 926                 VASurfaceID id = i965_h264_context->fsid_list[i].surface_id;
 927                 int frame_idx = i965_h264_context->fsid_list[i].frame_store_id;
 928
 929                 i965_h264_context->fsid_list[i].surface_id = i965_h264_context->fsid_list[j].surface_id;
 930                 i965_h264_context->fsid_list[i].frame_store_id = i965_h264_context->fsid_list[j].frame_store_id;
 931                 i965_h264_context->fsid_list[j].surface_id = id;
 932                 i965_h264_context->fsid_list[j].frame_store_id = frame_idx;
 933                 break;
 934             }
 935         }
 936     }
 937 }
 938
 939 void
 940 i965_avc_bsd_pipeline(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context)
 941 {
 942     struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context;
 943     struct intel_batchbuffer *batch = i965_h264_context->batch;
 944     VAPictureParameterBufferH264 *pic_param;
 945     VASliceParameterBufferH264 *slice_param;
 946     int i, j;
 947
 948     assert(decode_state->pic_param && decode_state->pic_param->buffer);
 949     pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
 950     i965_avc_bsd_frame_store_index(ctx, pic_param, i965_h264_context);
 951
 952     i965_h264_context->enable_avc_ildb = 0;
 953     i965_h264_context->picture.i_flag = 1;
 954
 955     for (j = 0; j < decode_state->num_slice_params && i965_h264_context->enable_avc_ildb == 0; j++) {
 956         assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
 957         slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer;
 958
 959         for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
 960             assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
 961             assert((slice_param->slice_type == SLICE_TYPE_I) ||
 962                    (slice_param->slice_type == SLICE_TYPE_SI) ||
 963                    (slice_param->slice_type == SLICE_TYPE_P) ||
 964                    (slice_param->slice_type == SLICE_TYPE_SP) ||
 965                    (slice_param->slice_type == SLICE_TYPE_B));
 966
 967             if (slice_param->disable_deblocking_filter_idc != 1) {
 968                 i965_h264_context->enable_avc_ildb = 1;
 969                 break;
 970             }
 971
 972             slice_param++;
 973         }
 974     }
 975
 976     intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
 977
 978     i965_avc_bsd_img_state(ctx, decode_state, i965_h264_context);
 979     i965_avc_bsd_qm_state(ctx, decode_state, i965_h264_context);
 980
 981     for (j = 0; j < decode_state->num_slice_params; j++) {
 982         assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
 983         slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer;
 984
 985         i965_bsd_ind_obj_base_address(ctx, decode_state, j, i965_h264_context);
 986
 987         for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
 988             assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
 989             assert((slice_param->slice_type == SLICE_TYPE_I) ||
 990                    (slice_param->slice_type == SLICE_TYPE_SI) ||
 991                    (slice_param->slice_type == SLICE_TYPE_P) ||
 992                    (slice_param->slice_type == SLICE_TYPE_SP) ||
 993                    (slice_param->slice_type == SLICE_TYPE_B));
 994
 995             if (i965_h264_context->picture.i_flag &&
 996                 (slice_param->slice_type != SLICE_TYPE_I ||
 997                  slice_param->slice_type != SLICE_TYPE_SI))
 998                 i965_h264_context->picture.i_flag = 0;
 999
1000             i965_avc_bsd_slice_state(ctx, pic_param, slice_param, i965_h264_context);
1001             i965_avc_bsd_buf_base_state(ctx, pic_param, slice_param, i965_h264_context);
1002             i965_avc_bsd_object(ctx, decode_state, pic_param, slice_param, j, i965_h264_context);
1003             slice_param++;
1004         }
1005     }
1006
1007     i965_avc_bsd_phantom_slice(ctx, decode_state, pic_param, i965_h264_context);
1008     intel_batchbuffer_emit_mi_flush(batch);
1009     intel_batchbuffer_end_atomic(batch);
1010     intel_batchbuffer_flush(batch);
1011 }
1012
1013 void
1014 i965_avc_bsd_decode_init(VADriverContextP ctx, void *h264_context)
1015 {
1016     struct i965_driver_data *i965 = i965_driver_data(ctx);
1017     struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context;
1018     struct i965_avc_bsd_context *i965_avc_bsd_context;
1019     dri_bo *bo;
1020
1021     assert(i965_h264_context);
1022     i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context;
1023
1024     dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo);
1025     bo = dri_bo_alloc(i965->intel.bufmgr,
1026                       "bsd raw store",
1027                       0x3000, /* at least 11520 bytes to support 120 MBs per row */
1028                       64);
1029     assert(bo);
1030     i965_avc_bsd_context->bsd_raw_store.bo = bo;
1031
1032     dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo);
1033     bo = dri_bo_alloc(i965->intel.bufmgr,
1034                       "mpr row store",
1035                       0x2000, /* at least 7680 bytes to support 120 MBs per row */
1036                       64);
1037     assert(bo);
1038     i965_avc_bsd_context->mpr_row_store.bo = bo;
1039 }
1040
1041 Bool
1042 i965_avc_bsd_ternimate(struct i965_avc_bsd_context *i965_avc_bsd_context)
1043 {
1044     dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo);
1045     dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo);
1046
1047     return True;
1048 }