Clean up for setting up reference surface state
[platform/upstream/libva-intel-driver.git] / src / gen6_mfc_common.c
1 /*
2  * Copyright © 2012 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the
13  * next paragraph) shall be included in all copies or substantial portions
14  * of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *    Xiang Haihao <haihao.xiang@intel.com>
26  *    Zhao Yakui <yakui.zhao@intel.com>
27  *
28  */
29
30 #include <stdio.h>
31 #include <stdlib.h>
32 #include <string.h>
33 #include <assert.h>
34 #include <math.h>
35
36 #include "intel_batchbuffer.h"
37 #include "i965_defines.h"
38 #include "i965_structs.h"
39 #include "i965_drv_video.h"
40 #include "i965_encoder.h"
41 #include "i965_encoder_utils.h"
42 #include "gen6_mfc.h"
43 #include "gen6_vme.h"
44 #include "intel_media.h"
45
46 #define BRC_CLIP(x, min, max)                                   \
47     {                                                           \
48         x = ((x > (max)) ? (max) : ((x < (min)) ? (min) : x));  \
49     }
50
51 #define BRC_P_B_QP_DIFF 4
52 #define BRC_I_P_QP_DIFF 2
53 #define BRC_I_B_QP_DIFF (BRC_I_P_QP_DIFF + BRC_P_B_QP_DIFF)
54
55 #define BRC_PWEIGHT 0.6  /* weight if P slice with comparison to I slice */
56 #define BRC_BWEIGHT 0.25 /* weight if B slice with comparison to I slice */
57
58 #define BRC_QP_MAX_CHANGE 5 /* maximum qp modification */
59 #define BRC_CY 0.1 /* weight for */
60 #define BRC_CX_UNDERFLOW 5.
61 #define BRC_CX_OVERFLOW -4.
62
63 #define BRC_PI_0_5 1.5707963267948966192313216916398
64
65 #ifndef HAVE_LOG2F
66 #define log2f(x) (logf(x)/(float)M_LN2)
67 #endif
68
69 int intel_avc_enc_slice_type_fixup(int slice_type)
70 {
71     if (slice_type == SLICE_TYPE_SP ||
72         slice_type == SLICE_TYPE_P)
73         slice_type = SLICE_TYPE_P;
74     else if (slice_type == SLICE_TYPE_SI ||
75              slice_type == SLICE_TYPE_I)
76         slice_type = SLICE_TYPE_I;
77     else {
78         if (slice_type != SLICE_TYPE_B)
79             WARN_ONCE("Invalid slice type for H.264 encoding!\n");
80
81         slice_type = SLICE_TYPE_B;
82     }
83
84     return slice_type;
85 }
86
87 static void
88 intel_mfc_bit_rate_control_context_init(struct encode_state *encode_state, 
89                                         struct gen6_mfc_context *mfc_context)
90 {
91     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
92     int width_in_mbs = (mfc_context->surface_state.width + 15) / 16;
93     int height_in_mbs = (mfc_context->surface_state.height + 15) / 16;
94     float fps =  pSequenceParameter->time_scale * 0.5 / pSequenceParameter->num_units_in_tick ;
95     int inter_mb_size = pSequenceParameter->bits_per_second * 1.0 / (fps+4.0) / width_in_mbs / height_in_mbs;
96     int intra_mb_size = inter_mb_size * 5.0;
97     int i;
98
99     mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_mb_size = intra_mb_size;
100     mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_frame_size = intra_mb_size * width_in_mbs * height_in_mbs;
101     mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_mb_size = inter_mb_size;
102     mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs;
103     mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_mb_size = inter_mb_size;
104     mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs;
105
106     for(i = 0 ; i < 3; i++) {
107         mfc_context->bit_rate_control_context[i].QpPrimeY = 26;
108         mfc_context->bit_rate_control_context[i].MaxQpNegModifier = 6;
109         mfc_context->bit_rate_control_context[i].MaxQpPosModifier = 6;
110         mfc_context->bit_rate_control_context[i].GrowInit = 6;
111         mfc_context->bit_rate_control_context[i].GrowResistance = 4;
112         mfc_context->bit_rate_control_context[i].ShrinkInit = 6;
113         mfc_context->bit_rate_control_context[i].ShrinkResistance = 4;
114         
115         mfc_context->bit_rate_control_context[i].Correct[0] = 8;
116         mfc_context->bit_rate_control_context[i].Correct[1] = 4;
117         mfc_context->bit_rate_control_context[i].Correct[2] = 2;
118         mfc_context->bit_rate_control_context[i].Correct[3] = 2;
119         mfc_context->bit_rate_control_context[i].Correct[4] = 4;
120         mfc_context->bit_rate_control_context[i].Correct[5] = 8;
121     }
122     
123     mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord = (intra_mb_size + 16)/ 16;
124     mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord = (inter_mb_size + 16)/ 16;
125     mfc_context->bit_rate_control_context[SLICE_TYPE_B].TargetSizeInWord = (inter_mb_size + 16)/ 16;
126
127     mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord * 1.5;
128     mfc_context->bit_rate_control_context[SLICE_TYPE_P].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord * 1.5;
129     mfc_context->bit_rate_control_context[SLICE_TYPE_B].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_B].TargetSizeInWord * 1.5;
130 }
131
132 static void intel_mfc_brc_init(struct encode_state *encode_state,
133                                struct intel_encoder_context* encoder_context)
134 {
135     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
136     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
137     VAEncMiscParameterBuffer* pMiscParamHRD = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer;
138     VAEncMiscParameterHRD* pParameterHRD = (VAEncMiscParameterHRD*)pMiscParamHRD->data;
139     double bitrate = pSequenceParameter->bits_per_second;
140     double framerate = (double)pSequenceParameter->time_scale /(2 * (double)pSequenceParameter->num_units_in_tick);
141     int inum = 1, pnum = 0, bnum = 0; /* Gop structure: number of I, P, B frames in the Gop. */
142     int intra_period = pSequenceParameter->intra_period;
143     int ip_period = pSequenceParameter->ip_period;
144     double qp1_size = 0.1 * 8 * 3 * (pSequenceParameter->picture_width_in_mbs<<4) * (pSequenceParameter->picture_height_in_mbs<<4)/2;
145     double qp51_size = 0.001 * 8 * 3 * (pSequenceParameter->picture_width_in_mbs<<4) * (pSequenceParameter->picture_height_in_mbs<<4)/2;
146     double bpf;
147
148     if (pSequenceParameter->ip_period) {
149         pnum = (intra_period + ip_period - 1)/ip_period - 1;
150         bnum = intra_period - inum - pnum;
151     }
152
153     mfc_context->brc.mode = encoder_context->rate_control_mode;
154
155     mfc_context->brc.target_frame_size[SLICE_TYPE_I] = (int)((double)((bitrate * intra_period)/framerate) /
156                                                              (double)(inum + BRC_PWEIGHT * pnum + BRC_BWEIGHT * bnum));
157     mfc_context->brc.target_frame_size[SLICE_TYPE_P] = BRC_PWEIGHT * mfc_context->brc.target_frame_size[SLICE_TYPE_I];
158     mfc_context->brc.target_frame_size[SLICE_TYPE_B] = BRC_BWEIGHT * mfc_context->brc.target_frame_size[SLICE_TYPE_I];
159
160     mfc_context->brc.gop_nums[SLICE_TYPE_I] = inum;
161     mfc_context->brc.gop_nums[SLICE_TYPE_P] = pnum;
162     mfc_context->brc.gop_nums[SLICE_TYPE_B] = bnum;
163
164     bpf = mfc_context->brc.bits_per_frame = bitrate/framerate;
165
166     mfc_context->hrd.buffer_size = (double)pParameterHRD->buffer_size;
167     mfc_context->hrd.current_buffer_fullness =
168         (double)(pParameterHRD->initial_buffer_fullness < mfc_context->hrd.buffer_size)?
169         pParameterHRD->initial_buffer_fullness: mfc_context->hrd.buffer_size/2.;
170     mfc_context->hrd.target_buffer_fullness = (double)mfc_context->hrd.buffer_size/2.;
171     mfc_context->hrd.buffer_capacity = (double)mfc_context->hrd.buffer_size/qp1_size;
172     mfc_context->hrd.violation_noted = 0;
173
174     if ((bpf > qp51_size) && (bpf < qp1_size)) {
175         mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 51 - 50*(bpf - qp51_size)/(qp1_size - qp51_size);
176     }
177     else if (bpf >= qp1_size)
178         mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 1;
179     else if (bpf <= qp51_size)
180         mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 51;
181
182     mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY = mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY;
183     mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY = mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY;
184
185     BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, 1, 51);
186     BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, 1, 51);
187     BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY, 1, 51);
188 }
189
190 int intel_mfc_update_hrd(struct encode_state *encode_state,
191                          struct gen6_mfc_context *mfc_context,
192                          int frame_bits)
193 {
194     double prev_bf = mfc_context->hrd.current_buffer_fullness;
195
196     mfc_context->hrd.current_buffer_fullness -= frame_bits;
197
198     if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness <= 0.) {
199         mfc_context->hrd.current_buffer_fullness = prev_bf;
200         return BRC_UNDERFLOW;
201     }
202     
203     mfc_context->hrd.current_buffer_fullness += mfc_context->brc.bits_per_frame;
204     if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness > mfc_context->hrd.buffer_size) {
205         if (mfc_context->brc.mode == VA_RC_VBR)
206             mfc_context->hrd.current_buffer_fullness = mfc_context->hrd.buffer_size;
207         else {
208             mfc_context->hrd.current_buffer_fullness = prev_bf;
209             return BRC_OVERFLOW;
210         }
211     }
212     return BRC_NO_HRD_VIOLATION;
213 }
214
215 int intel_mfc_brc_postpack(struct encode_state *encode_state,
216                            struct gen6_mfc_context *mfc_context,
217                            int frame_bits)
218 {
219     gen6_brc_status sts = BRC_NO_HRD_VIOLATION;
220     VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; 
221     int slicetype = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
222     int qpi = mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY;
223     int qpp = mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY;
224     int qpb = mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY;
225     int qp; // quantizer of previously encoded slice of current type
226     int qpn; // predicted quantizer for next frame of current type in integer format
227     double qpf; // predicted quantizer for next frame of current type in float format
228     double delta_qp; // QP correction
229     int target_frame_size, frame_size_next;
230     /* Notes:
231      *  x - how far we are from HRD buffer borders
232      *  y - how far we are from target HRD buffer fullness
233      */
234     double x, y;
235     double frame_size_alpha;
236
237     qp = mfc_context->bit_rate_control_context[slicetype].QpPrimeY;
238
239     target_frame_size = mfc_context->brc.target_frame_size[slicetype];
240     if (mfc_context->hrd.buffer_capacity < 5)
241         frame_size_alpha = 0;
242     else
243         frame_size_alpha = (double)mfc_context->brc.gop_nums[slicetype];
244     if (frame_size_alpha > 30) frame_size_alpha = 30;
245     frame_size_next = target_frame_size + (double)(target_frame_size - frame_bits) /
246         (double)(frame_size_alpha + 1.);
247
248     /* frame_size_next: avoiding negative number and too small value */
249     if ((double)frame_size_next < (double)(target_frame_size * 0.25))
250         frame_size_next = (int)((double)target_frame_size * 0.25);
251
252     qpf = (double)qp * target_frame_size / frame_size_next;
253     qpn = (int)(qpf + 0.5);
254
255     if (qpn == qp) {
256         /* setting qpn we round qpf making mistakes: now we are trying to compensate this */
257         mfc_context->brc.qpf_rounding_accumulator += qpf - qpn;
258         if (mfc_context->brc.qpf_rounding_accumulator > 1.0) {
259             qpn++;
260             mfc_context->brc.qpf_rounding_accumulator = 0.;
261         } else if (mfc_context->brc.qpf_rounding_accumulator < -1.0) {
262             qpn--;
263             mfc_context->brc.qpf_rounding_accumulator = 0.;
264         }
265     }
266     /* making sure that QP is not changing too fast */
267     if ((qpn - qp) > BRC_QP_MAX_CHANGE) qpn = qp + BRC_QP_MAX_CHANGE;
268     else if ((qpn - qp) < -BRC_QP_MAX_CHANGE) qpn = qp - BRC_QP_MAX_CHANGE;
269     /* making sure that with QP predictions we did do not leave QPs range */
270     BRC_CLIP(qpn, 1, 51);
271
272     /* checking wthether HRD compliance is still met */
273     sts = intel_mfc_update_hrd(encode_state, mfc_context, frame_bits);
274
275     /* calculating QP delta as some function*/
276     x = mfc_context->hrd.target_buffer_fullness - mfc_context->hrd.current_buffer_fullness;
277     if (x > 0) {
278         x /= mfc_context->hrd.target_buffer_fullness;
279         y = mfc_context->hrd.current_buffer_fullness;
280     }
281     else {
282         x /= (mfc_context->hrd.buffer_size - mfc_context->hrd.target_buffer_fullness);
283         y = mfc_context->hrd.buffer_size - mfc_context->hrd.current_buffer_fullness;
284     }
285     if (y < 0.01) y = 0.01;
286     if (x > 1) x = 1;
287     else if (x < -1) x = -1;
288
289     delta_qp = BRC_QP_MAX_CHANGE*exp(-1/y)*sin(BRC_PI_0_5 * x);
290     qpn = (int)(qpn + delta_qp + 0.5);
291
292     /* making sure that with QP predictions we did do not leave QPs range */
293     BRC_CLIP(qpn, 1, 51);
294
295     if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation
296         /* correcting QPs of slices of other types */
297         if (slicetype == SLICE_TYPE_P) {
298             if (abs(qpn + BRC_P_B_QP_DIFF - qpb) > 2)
299                 mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_P_B_QP_DIFF - qpb) >> 1;
300             if (abs(qpn - BRC_I_P_QP_DIFF - qpi) > 2)
301                 mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_P_QP_DIFF - qpi) >> 1;
302         } else if (slicetype == SLICE_TYPE_I) {
303             if (abs(qpn + BRC_I_B_QP_DIFF - qpb) > 4)
304                 mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_I_B_QP_DIFF - qpb) >> 2;
305             if (abs(qpn + BRC_I_P_QP_DIFF - qpp) > 2)
306                 mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn + BRC_I_P_QP_DIFF - qpp) >> 2;
307         } else { // SLICE_TYPE_B
308             if (abs(qpn - BRC_P_B_QP_DIFF - qpp) > 2)
309                 mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn - BRC_P_B_QP_DIFF - qpp) >> 1;
310             if (abs(qpn - BRC_I_B_QP_DIFF - qpi) > 4)
311                 mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_B_QP_DIFF - qpi) >> 2;
312         }
313         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, 1, 51);
314         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, 1, 51);
315         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY, 1, 51);
316     } else if (sts == BRC_UNDERFLOW) { // underflow
317         if (qpn <= qp) qpn = qp + 1;
318         if (qpn > 51) {
319             qpn = 51;
320             sts = BRC_UNDERFLOW_WITH_MAX_QP; //underflow with maxQP
321         }
322     } else if (sts == BRC_OVERFLOW) {
323         if (qpn >= qp) qpn = qp - 1;
324         if (qpn < 1) { // < 0 (?) overflow with minQP
325             qpn = 1;
326             sts = BRC_OVERFLOW_WITH_MIN_QP; // bit stuffing to be done
327         }
328     }
329
330     mfc_context->bit_rate_control_context[slicetype].QpPrimeY = qpn;
331
332     return sts;
333 }
334
335 static void intel_mfc_hrd_context_init(struct encode_state *encode_state,
336                                        struct intel_encoder_context *encoder_context)
337 {
338     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
339     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
340     unsigned int rate_control_mode = encoder_context->rate_control_mode;
341     int target_bit_rate = pSequenceParameter->bits_per_second;
342     
343     // current we only support CBR mode.
344     if (rate_control_mode == VA_RC_CBR) {
345         mfc_context->vui_hrd.i_bit_rate_value = target_bit_rate >> 10;
346         mfc_context->vui_hrd.i_cpb_size_value = (target_bit_rate * 8) >> 10;
347         mfc_context->vui_hrd.i_initial_cpb_removal_delay = mfc_context->vui_hrd.i_cpb_size_value * 0.5 * 1024 / target_bit_rate * 90000;
348         mfc_context->vui_hrd.i_cpb_removal_delay = 2;
349         mfc_context->vui_hrd.i_frame_number = 0;
350
351         mfc_context->vui_hrd.i_initial_cpb_removal_delay_length = 24; 
352         mfc_context->vui_hrd.i_cpb_removal_delay_length = 24;
353         mfc_context->vui_hrd.i_dpb_output_delay_length = 24;
354     }
355
356 }
357
358 void 
359 intel_mfc_hrd_context_update(struct encode_state *encode_state, 
360                              struct gen6_mfc_context *mfc_context)
361 {
362     mfc_context->vui_hrd.i_frame_number++;
363 }
364
365 int intel_mfc_interlace_check(VADriverContextP ctx,
366                               struct encode_state *encode_state,
367                               struct intel_encoder_context *encoder_context)
368 {
369     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
370     VAEncSliceParameterBufferH264 *pSliceParameter;
371     int i;
372     int mbCount = 0;
373     int width_in_mbs = (mfc_context->surface_state.width + 15) / 16;
374     int height_in_mbs = (mfc_context->surface_state.height + 15) / 16;
375   
376     for (i = 0; i < encode_state->num_slice_params_ext; i++) {
377         pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[i]->buffer; 
378         mbCount += pSliceParameter->num_macroblocks; 
379     }
380     
381     if ( mbCount == ( width_in_mbs * height_in_mbs ) )
382         return 0;
383
384     return 1;
385 }
386
387 void intel_mfc_brc_prepare(struct encode_state *encode_state,
388                            struct intel_encoder_context *encoder_context)
389 {
390     unsigned int rate_control_mode = encoder_context->rate_control_mode;
391     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
392
393     if (rate_control_mode == VA_RC_CBR) {
394         /*Programing bit rate control */
395         if ( mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord == 0 ) {
396             intel_mfc_bit_rate_control_context_init(encode_state, mfc_context);
397             intel_mfc_brc_init(encode_state, encoder_context);
398         }
399
400         /*Programing HRD control */
401         if ( mfc_context->vui_hrd.i_cpb_size_value == 0 )
402             intel_mfc_hrd_context_init(encode_state, encoder_context);    
403     }
404 }
405
406 void intel_mfc_avc_pipeline_header_programing(VADriverContextP ctx,
407                                               struct encode_state *encode_state,
408                                               struct intel_encoder_context *encoder_context,
409                                               struct intel_batchbuffer *slice_batch)
410 {
411     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
412     int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SPS);
413     unsigned int rate_control_mode = encoder_context->rate_control_mode;
414
415     if (encode_state->packed_header_data[idx]) {
416         VAEncPackedHeaderParameterBuffer *param = NULL;
417         unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
418         unsigned int length_in_bits;
419
420         assert(encode_state->packed_header_param[idx]);
421         param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
422         length_in_bits = param->bit_length;
423
424         mfc_context->insert_object(ctx,
425                                    encoder_context,
426                                    header_data,
427                                    ALIGN(length_in_bits, 32) >> 5,
428                                    length_in_bits & 0x1f,
429                                    5,   /* FIXME: check it */
430                                    0,
431                                    0,
432                                    !param->has_emulation_bytes,
433                                    slice_batch);
434     }
435
436     idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_PPS);
437
438     if (encode_state->packed_header_data[idx]) {
439         VAEncPackedHeaderParameterBuffer *param = NULL;
440         unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
441         unsigned int length_in_bits;
442
443         assert(encode_state->packed_header_param[idx]);
444         param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
445         length_in_bits = param->bit_length;
446
447         mfc_context->insert_object(ctx,
448                                    encoder_context,
449                                    header_data,
450                                    ALIGN(length_in_bits, 32) >> 5,
451                                    length_in_bits & 0x1f,
452                                    5, /* FIXME: check it */
453                                    0,
454                                    0,
455                                    !param->has_emulation_bytes,
456                                    slice_batch);
457     }
458     
459     idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SEI);
460
461     if (encode_state->packed_header_data[idx]) {
462         VAEncPackedHeaderParameterBuffer *param = NULL;
463         unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer;
464         unsigned int length_in_bits;
465
466         assert(encode_state->packed_header_param[idx]);
467         param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer;
468         length_in_bits = param->bit_length;
469
470         mfc_context->insert_object(ctx,
471                                    encoder_context,
472                                    header_data,
473                                    ALIGN(length_in_bits, 32) >> 5,
474                                    length_in_bits & 0x1f,
475                                    5, /* FIXME: check it */
476                                    0,
477                                    0,
478                                    !param->has_emulation_bytes,
479                                    slice_batch);
480     } else if (rate_control_mode == VA_RC_CBR) {
481         // this is frist AU
482         struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
483
484         unsigned char *sei_data = NULL;
485     
486         int length_in_bits = build_avc_sei_buffer_timing(
487             mfc_context->vui_hrd.i_initial_cpb_removal_delay_length,
488             mfc_context->vui_hrd.i_initial_cpb_removal_delay,
489             0,
490             mfc_context->vui_hrd.i_cpb_removal_delay_length,                                                       mfc_context->vui_hrd.i_cpb_removal_delay * mfc_context->vui_hrd.i_frame_number,
491             mfc_context->vui_hrd.i_dpb_output_delay_length,
492             0,
493             &sei_data);
494         mfc_context->insert_object(ctx,
495                                    encoder_context,
496                                    (unsigned int *)sei_data,
497                                    ALIGN(length_in_bits, 32) >> 5,
498                                    length_in_bits & 0x1f,
499                                    4,   
500                                    0,   
501                                    0,   
502                                    1,
503                                    slice_batch);  
504         free(sei_data);
505     }
506 }
507
508 VAStatus intel_mfc_avc_prepare(VADriverContextP ctx, 
509                                struct encode_state *encode_state,
510                                struct intel_encoder_context *encoder_context)
511 {
512     struct i965_driver_data *i965 = i965_driver_data(ctx);
513     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
514     struct object_surface *obj_surface; 
515     struct object_buffer *obj_buffer;
516     GenAvcSurface *gen6_avc_surface;
517     dri_bo *bo;
518     VAStatus vaStatus = VA_STATUS_SUCCESS;
519     int i, j, enable_avc_ildb = 0;
520     VAEncSliceParameterBufferH264 *slice_param;
521     struct i965_coded_buffer_segment *coded_buffer_segment;
522     VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
523     int width_in_mbs = pSequenceParameter->picture_width_in_mbs;
524     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
525
526     if (IS_GEN6(i965->intel.device_id)) {
527         /* On the SNB it should be fixed to 128 for the DMV buffer */
528         width_in_mbs = 128;
529     }
530
531     for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == 0; j++) {
532         assert(encode_state->slice_params_ext && encode_state->slice_params_ext[j]->buffer);
533         slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[j]->buffer;
534
535         for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) {
536             assert((slice_param->slice_type == SLICE_TYPE_I) ||
537                    (slice_param->slice_type == SLICE_TYPE_SI) ||
538                    (slice_param->slice_type == SLICE_TYPE_P) ||
539                    (slice_param->slice_type == SLICE_TYPE_SP) ||
540                    (slice_param->slice_type == SLICE_TYPE_B));
541
542             if (slice_param->disable_deblocking_filter_idc != 1) {
543                 enable_avc_ildb = 1;
544                 break;
545             }
546
547             slice_param++;
548         }
549     }
550
551     /*Setup all the input&output object*/
552
553     /* Setup current frame and current direct mv buffer*/
554     obj_surface = encode_state->reconstructed_object;
555     i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420);
556
557     if ( obj_surface->private_data == NULL) {
558         gen6_avc_surface = calloc(sizeof(GenAvcSurface), 1);
559         gen6_avc_surface->dmv_top = 
560             dri_bo_alloc(i965->intel.bufmgr,
561                          "Buffer",
562                          68 * width_in_mbs * height_in_mbs, 
563                          64);
564         gen6_avc_surface->dmv_bottom = 
565             dri_bo_alloc(i965->intel.bufmgr,
566                          "Buffer",
567                          68 * width_in_mbs * height_in_mbs, 
568                          64);
569         assert(gen6_avc_surface->dmv_top);
570         assert(gen6_avc_surface->dmv_bottom);
571         obj_surface->private_data = (void *)gen6_avc_surface;
572         obj_surface->free_private_data = (void *)gen_free_avc_surface; 
573     }
574     gen6_avc_surface = (GenAvcSurface *) obj_surface->private_data;
575     mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo = gen6_avc_surface->dmv_top;
576     mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 1].bo = gen6_avc_surface->dmv_bottom;
577     dri_bo_reference(gen6_avc_surface->dmv_top);
578     dri_bo_reference(gen6_avc_surface->dmv_bottom);
579
580     if (enable_avc_ildb) {
581         mfc_context->post_deblocking_output.bo = obj_surface->bo;
582         dri_bo_reference(mfc_context->post_deblocking_output.bo);
583     } else {
584         mfc_context->pre_deblocking_output.bo = obj_surface->bo;
585         dri_bo_reference(mfc_context->pre_deblocking_output.bo);
586     }
587
588     mfc_context->surface_state.width = obj_surface->orig_width;
589     mfc_context->surface_state.height = obj_surface->orig_height;
590     mfc_context->surface_state.w_pitch = obj_surface->width;
591     mfc_context->surface_state.h_pitch = obj_surface->height;
592     
593     /* Setup reference frames and direct mv buffers*/
594     for(i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++) {
595         obj_surface = encode_state->reference_objects[i];
596         
597         if (obj_surface && obj_surface->bo) {
598             mfc_context->reference_surfaces[i].bo = obj_surface->bo;
599             dri_bo_reference(obj_surface->bo);
600
601             /* Check DMV buffer */
602             if ( obj_surface->private_data == NULL) {
603                 
604                 gen6_avc_surface = calloc(sizeof(GenAvcSurface), 1);
605                 gen6_avc_surface->dmv_top = 
606                     dri_bo_alloc(i965->intel.bufmgr,
607                                  "Buffer",
608                                  68 * width_in_mbs * height_in_mbs, 
609                                  64);
610                 gen6_avc_surface->dmv_bottom = 
611                     dri_bo_alloc(i965->intel.bufmgr,
612                                  "Buffer",
613                                  68 * width_in_mbs * height_in_mbs, 
614                                  64);
615                 assert(gen6_avc_surface->dmv_top);
616                 assert(gen6_avc_surface->dmv_bottom);
617                 obj_surface->private_data = gen6_avc_surface;
618                 obj_surface->free_private_data = gen_free_avc_surface; 
619             }
620     
621             gen6_avc_surface = (GenAvcSurface *) obj_surface->private_data;
622             /* Setup DMV buffer */
623             mfc_context->direct_mv_buffers[i*2].bo = gen6_avc_surface->dmv_top;
624             mfc_context->direct_mv_buffers[i*2+1].bo = gen6_avc_surface->dmv_bottom; 
625             dri_bo_reference(gen6_avc_surface->dmv_top);
626             dri_bo_reference(gen6_avc_surface->dmv_bottom);
627         } else {
628             break;
629         }
630     }
631         
632     mfc_context->uncompressed_picture_source.bo = encode_state->input_yuv_object->bo;
633     dri_bo_reference(mfc_context->uncompressed_picture_source.bo);
634
635     obj_buffer = encode_state->coded_buf_object;
636     bo = obj_buffer->buffer_store->bo;
637     mfc_context->mfc_indirect_pak_bse_object.bo = bo;
638     mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE;
639     mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000);
640     dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo);
641     
642     dri_bo_map(bo, 1);
643     coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual;
644     coded_buffer_segment->mapped = 0;
645     coded_buffer_segment->codec = encoder_context->codec;
646     dri_bo_unmap(bo);
647
648     return vaStatus;
649 }
650 /*
651  * The LUT uses the pair of 4-bit units: (shift, base) structure.
652  * 2^K * X = value . 
653  * So it is necessary to convert one cost into the nearest LUT format.
654  * The derivation is:
655  * 2^K *x = 2^n * (1 + deltaX)
656  *    k + log2(x) = n + log2(1 + deltaX)
657  *    log2(x) = n - k + log2(1 + deltaX)
658  *    As X is in the range of [1, 15]
659  *      4 > n - k + log2(1 + deltaX) >= 0 
660  *      =>    n + log2(1 + deltaX)  >= k > n - 4  + log2(1 + deltaX)
661  *    Then we can derive the corresponding K and get the nearest LUT format.
662  */
663 int intel_format_lutvalue(int value, int max)
664 {
665     int ret;
666     int logvalue, temp1, temp2;
667
668     if (value <= 0)
669         return 0;
670
671     logvalue = (int)(log2f((float)value));
672     if (logvalue < 4) {
673         ret = value;
674     } else {
675         int error, temp_value, base, j, temp_err;
676         error = value;
677         j = logvalue - 4 + 1;
678         ret = -1;
679         for(; j <= logvalue; j++) {
680             if (j == 0) {
681                 base = value >> j;
682             } else {
683                 base = (value + (1 << (j - 1)) - 1) >> j;
684             }
685             if (base >= 16)
686                 continue;
687
688             temp_value = base << j;
689             temp_err = abs(value - temp_value);
690             if (temp_err < error) {
691                 error = temp_err;
692                 ret = (j << 4) | base;
693                 if (temp_err == 0)
694                     break;
695             }
696         }
697     }
698     temp1 = (ret & 0xf) << ((ret & 0xf0) >> 4);
699     temp2 = (max & 0xf) << ((max & 0xf0) >> 4);
700     if (temp1 > temp2)
701         ret = max;
702     return ret;
703         
704 }
705
706
707 #define         QP_MAX                  52
708
709
710 static float intel_lambda_qp(int qp)
711 {
712     float value, lambdaf;
713     value = qp;
714     value = value / 6 - 2;
715     if (value < 0)
716         value = 0;
717     lambdaf = roundf(powf(2, value));
718     return lambdaf;
719 }
720
721
722 void intel_vme_update_mbmv_cost(VADriverContextP ctx,
723                                 struct encode_state *encode_state,
724                                 struct intel_encoder_context *encoder_context)
725 {
726     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
727     struct gen6_vme_context *vme_context = encoder_context->vme_context;
728     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
729     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
730     int qp, m_cost, j, mv_count;
731     uint8_t *vme_state_message = (uint8_t *)(vme_context->vme_state_message);
732     float   lambda, m_costf;
733
734     int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
735
736     
737     if (encoder_context->rate_control_mode == VA_RC_CQP)
738         qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
739     else
740         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
741   
742     if (vme_state_message == NULL)
743         return;
744  
745     assert(qp <= QP_MAX); 
746     lambda = intel_lambda_qp(qp);
747     if (slice_type == SLICE_TYPE_I) {
748         vme_state_message[MODE_INTRA_16X16] = 0;
749         m_cost = lambda * 4;
750         vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f);
751         m_cost = lambda * 16; 
752         vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
753         m_cost = lambda * 3;
754         vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
755     } else {
756         m_cost = 0;
757         vme_state_message[MODE_INTER_MV0] = intel_format_lutvalue(m_cost, 0x6f);
758         for (j = 1; j < 3; j++) {
759             m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
760             m_cost = (int)m_costf;
761             vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f);
762         }
763         mv_count = 3;
764         for (j = 4; j <= 64; j *= 2) {
765             m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
766             m_cost = (int)m_costf;
767             vme_state_message[MODE_INTER_MV0 + mv_count] = intel_format_lutvalue(m_cost, 0x6f);
768             mv_count++;
769         }
770
771         if (qp <= 25) {
772             vme_state_message[MODE_INTRA_16X16] = 0x4a;
773             vme_state_message[MODE_INTRA_8X8] = 0x4a;
774             vme_state_message[MODE_INTRA_4X4] = 0x4a;
775             vme_state_message[MODE_INTRA_NONPRED] = 0x4a;
776             vme_state_message[MODE_INTER_16X16] = 0x4a;
777             vme_state_message[MODE_INTER_16X8] = 0x4a;
778             vme_state_message[MODE_INTER_8X8] = 0x4a;
779             vme_state_message[MODE_INTER_8X4] = 0x4a;
780             vme_state_message[MODE_INTER_4X4] = 0x4a;
781             vme_state_message[MODE_INTER_BWD] = 0x2a;
782             return;
783         }
784         m_costf = lambda * 10;
785         vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f);
786         m_cost = lambda * 14;
787         vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f);
788         m_cost = lambda * 24; 
789         vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f);
790         m_costf = lambda * 3.5;
791         m_cost = m_costf;
792         vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f);
793         if (slice_type == SLICE_TYPE_P) {
794             m_costf = lambda * 2.5;
795             m_cost = m_costf;
796             vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
797             m_costf = lambda * 4;
798             m_cost = m_costf;
799             vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f);
800             m_costf = lambda * 1.5;
801             m_cost = m_costf;
802             vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f);
803             m_costf = lambda * 3;
804             m_cost = m_costf;
805             vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f);
806             m_costf = lambda * 5;
807             m_cost = m_costf;
808             vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f);
809             /* BWD is not used in P-frame */
810             vme_state_message[MODE_INTER_BWD] = 0;
811         } else {
812             m_costf = lambda * 2.5;
813             m_cost = m_costf;
814             vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
815             m_costf = lambda * 5.5;
816             m_cost = m_costf;
817             vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f);
818             m_costf = lambda * 3.5;
819             m_cost = m_costf;
820             vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f);
821             m_costf = lambda * 5.0;
822             m_cost = m_costf;
823             vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f);
824             m_costf = lambda * 6.5;
825             m_cost = m_costf;
826             vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f);
827             m_costf = lambda * 1.5;
828             m_cost = m_costf;
829             vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f);
830         }
831     }
832 }
833
834
835 #define         MB_SCOREBOARD_A         (1 << 0)
836 #define         MB_SCOREBOARD_B         (1 << 1)
837 #define         MB_SCOREBOARD_C         (1 << 2)
838 void 
839 gen7_vme_scoreboard_init(VADriverContextP ctx, struct gen6_vme_context *vme_context)
840 {
841     vme_context->gpe_context.vfe_desc5.scoreboard0.enable = 1;
842     vme_context->gpe_context.vfe_desc5.scoreboard0.type = SCOREBOARD_STALLING;
843     vme_context->gpe_context.vfe_desc5.scoreboard0.mask = (MB_SCOREBOARD_A |
844                                                            MB_SCOREBOARD_B |
845                                                            MB_SCOREBOARD_C);
846
847     /* In VME prediction the current mb depends on the neighbour 
848      * A/B/C macroblock. So the left/up/up-right dependency should
849      * be considered.
850      */
851     vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x0 = -1;
852     vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y0 = 0;
853     vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x1 = 0;
854     vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y1 = -1;
855     vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x2 = 1;
856     vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y2 = -1;
857         
858     vme_context->gpe_context.vfe_desc7.dword = 0;
859     return;
860 }
861
862 /* check whether the mb of (x_index, y_index) is out of bound */
863 static inline int loop_in_bounds(int x_index, int y_index, int first_mb, int num_mb, int mb_width, int mb_height)
864 {
865     int mb_index;
866     if (x_index < 0 || x_index >= mb_width)
867         return -1;
868     if (y_index < 0 || y_index >= mb_height)
869         return -1;
870         
871     mb_index = y_index * mb_width + x_index;
872     if (mb_index < first_mb || mb_index > (first_mb + num_mb))
873         return -1;
874     return 0;
875 }
876
877 void
878 gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx, 
879                                      struct encode_state *encode_state,
880                                      int mb_width, int mb_height,
881                                      int kernel,
882                                      int transform_8x8_mode_flag,
883                                      struct intel_encoder_context *encoder_context)
884 {
885     struct gen6_vme_context *vme_context = encoder_context->vme_context;
886     int mb_row;
887     int s;
888     unsigned int *command_ptr;
889
890 #define         USE_SCOREBOARD          (1 << 21)
891  
892     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
893     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
894
895     for (s = 0; s < encode_state->num_slice_params_ext; s++) {
896         VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
897         int first_mb = pSliceParameter->macroblock_address;
898         int num_mb = pSliceParameter->num_macroblocks;
899         unsigned int mb_intra_ub, score_dep;
900         int x_outer, y_outer, x_inner, y_inner;
901         int xtemp_outer = 0;
902
903         x_outer = first_mb % mb_width;
904         y_outer = first_mb / mb_width;
905         mb_row = y_outer;
906                                  
907         for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) {
908             x_inner = x_outer;
909             y_inner = y_outer;
910             for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
911                 mb_intra_ub = 0;
912                 score_dep = 0;
913                 if (x_inner != 0) {
914                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
915                     score_dep |= MB_SCOREBOARD_A; 
916                 }
917                 if (y_inner != mb_row) {
918                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
919                     score_dep |= MB_SCOREBOARD_B;
920                     if (x_inner != 0)
921                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
922                     if (x_inner != (mb_width -1)) {
923                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
924                         score_dep |= MB_SCOREBOARD_C;
925                     }
926                 }
927                                                         
928                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
929                 *command_ptr++ = kernel;
930                 *command_ptr++ = USE_SCOREBOARD;
931                 /* Indirect data */
932                 *command_ptr++ = 0;
933                 /* the (X, Y) term of scoreboard */
934                 *command_ptr++ = ((y_inner << 16) | x_inner);
935                 *command_ptr++ = score_dep;
936                 /*inline data */
937                 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
938                 *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
939                 x_inner -= 2;
940                 y_inner += 1;
941             }
942             x_outer += 1;
943         }
944
945         xtemp_outer = mb_width - 2;
946         if (xtemp_outer < 0)
947             xtemp_outer = 0;
948         x_outer = xtemp_outer;
949         y_outer = first_mb / mb_width;
950         for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { 
951             y_inner = y_outer;
952             x_inner = x_outer;
953             for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
954                 mb_intra_ub = 0;
955                 score_dep = 0;
956                 if (x_inner != 0) {
957                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
958                     score_dep |= MB_SCOREBOARD_A; 
959                 }
960                 if (y_inner != mb_row) {
961                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
962                     score_dep |= MB_SCOREBOARD_B;
963                     if (x_inner != 0)
964                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
965
966                     if (x_inner != (mb_width -1)) {
967                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
968                         score_dep |= MB_SCOREBOARD_C;
969                     }
970                 }
971
972                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
973                 *command_ptr++ = kernel;
974                 *command_ptr++ = USE_SCOREBOARD;
975                 /* Indirect data */
976                 *command_ptr++ = 0;
977                 /* the (X, Y) term of scoreboard */
978                 *command_ptr++ = ((y_inner << 16) | x_inner);
979                 *command_ptr++ = score_dep;
980                 /*inline data */
981                 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
982                 *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
983
984                 x_inner -= 2;
985                 y_inner += 1;
986             }
987             x_outer++;
988             if (x_outer >= mb_width) {
989                 y_outer += 1;
990                 x_outer = xtemp_outer;
991             }           
992         }
993     }
994
995     *command_ptr++ = 0;
996     *command_ptr++ = MI_BATCH_BUFFER_END;
997
998     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
999 }
1000
1001 static uint8_t
1002 intel_get_ref_idx_state_1(VAPictureH264 *va_pic, unsigned int frame_store_id)
1003 {
1004     unsigned int is_long_term =
1005         !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE);
1006     unsigned int is_top_field =
1007         !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD);
1008     unsigned int is_bottom_field =
1009         !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD);
1010
1011     return ((is_long_term                         << 6) |
1012             ((is_top_field ^ is_bottom_field ^ 1) << 5) |
1013             (frame_store_id                       << 1) |
1014             ((is_top_field ^ 1) & is_bottom_field));
1015 }
1016
1017 void
1018 intel_mfc_avc_ref_idx_state(VADriverContextP ctx,
1019                             struct encode_state *encode_state,
1020                             struct intel_encoder_context *encoder_context)
1021 {
1022     struct intel_batchbuffer *batch = encoder_context->base.batch;
1023     struct i965_driver_data *i965 = i965_driver_data(ctx);
1024     int slice_type;
1025     struct object_surface *slice_obj_surface, *obj_surface;
1026     int ref_surface_id;
1027     unsigned int fref_entry, bref_entry;
1028     int frame_index, i;
1029     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
1030     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
1031
1032     fref_entry = 0x80808080;
1033     bref_entry = 0x80808080;
1034     slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
1035
1036     if (slice_type == SLICE_TYPE_P || slice_type == SLICE_TYPE_B) {
1037         slice_obj_surface = NULL;
1038         ref_surface_id = slice_param->RefPicList0[0].picture_id;
1039         if (ref_surface_id != VA_INVALID_SURFACE) {
1040             slice_obj_surface = SURFACE(ref_surface_id);
1041         }
1042         if (slice_obj_surface && slice_obj_surface->bo) {
1043             obj_surface = slice_obj_surface;
1044         } else {
1045             obj_surface = encode_state->reference_objects[0];
1046         }
1047         frame_index = -1;
1048         for (i = 0; i < 16; i++) {
1049             if (obj_surface == encode_state->reference_objects[i]) {
1050                 frame_index = i;
1051                 break;
1052             }
1053         }
1054         if (frame_index == -1) {
1055             WARN_ONCE("RefPicList0 is not found in DPB!\n");
1056         } else if (slice_obj_surface && slice_obj_surface->bo) {
1057             /* This is passed by Slice_param->RefPicList0 */
1058             fref_entry &= ~(0xFF);
1059             fref_entry += intel_get_ref_idx_state_1(&slice_param->RefPicList0[0], frame_index);
1060         } else {
1061             /* This is passed by the hacked mode */
1062             fref_entry &= ~(0xFF);
1063             fref_entry += intel_get_ref_idx_state_1(&pic_param->ReferenceFrames[frame_index], frame_index);
1064         }
1065     }
1066
1067     if (slice_type == SLICE_TYPE_B) {
1068         slice_obj_surface = NULL;
1069         ref_surface_id = slice_param->RefPicList1[0].picture_id;
1070         if (ref_surface_id != VA_INVALID_SURFACE) {
1071             slice_obj_surface = SURFACE(ref_surface_id);
1072         }
1073         if (slice_obj_surface && slice_obj_surface->bo) {
1074             obj_surface = slice_obj_surface;
1075         } else {
1076             obj_surface = encode_state->reference_objects[1];
1077         }
1078         frame_index = -1;
1079         for (i = 0; i < 16; i++) {
1080             if (obj_surface == encode_state->reference_objects[i]) {
1081                 frame_index = i;
1082                 break;
1083             }
1084         }
1085         if (frame_index == -1) {
1086             WARN_ONCE("RefPicList1 is not found in DPB!\n");
1087         } else if (slice_obj_surface && slice_obj_surface->bo) {
1088             bref_entry &= ~(0xFF);
1089             bref_entry += intel_get_ref_idx_state_1(&slice_param->RefPicList1[0], frame_index);
1090         } else {
1091             bref_entry &= ~(0xFF);
1092             bref_entry += intel_get_ref_idx_state_1(&pic_param->ReferenceFrames[frame_index], frame_index);
1093         }
1094     }
1095
1096     BEGIN_BCS_BATCH(batch, 10);
1097     OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
1098     OUT_BCS_BATCH(batch, 0);                  //Select L0
1099     OUT_BCS_BATCH(batch, fref_entry);         //Only 1 reference
1100     for(i = 0; i < 7; i++) {
1101         OUT_BCS_BATCH(batch, 0x80808080);
1102     }
1103     ADVANCE_BCS_BATCH(batch);
1104
1105     BEGIN_BCS_BATCH(batch, 10);
1106     OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
1107     OUT_BCS_BATCH(batch, 1);                  //Select L1
1108     OUT_BCS_BATCH(batch, bref_entry);         //Only 1 reference
1109     for(i = 0; i < 7; i++) {
1110         OUT_BCS_BATCH(batch, 0x80808080);
1111     }
1112     ADVANCE_BCS_BATCH(batch);
1113 }
1114
1115
1116 void intel_vme_mpeg2_state_setup(VADriverContextP ctx,
1117                                  struct encode_state *encode_state,
1118                                  struct intel_encoder_context *encoder_context)
1119 {
1120     struct gen6_vme_context *vme_context = encoder_context->vme_context;
1121     uint32_t *vme_state_message = (uint32_t *)(vme_context->vme_state_message);
1122     VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
1123     int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
1124     int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
1125     uint32_t mv_x, mv_y;
1126     VAEncSliceParameterBufferMPEG2 *slice_param = NULL;
1127     VAEncPictureParameterBufferMPEG2 *pic_param = NULL;
1128     slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
1129
1130     if (vme_context->mpeg2_level == MPEG2_LEVEL_LOW) {
1131         mv_x = 512;
1132         mv_y = 64;
1133     } else if (vme_context->mpeg2_level == MPEG2_LEVEL_MAIN) {
1134         mv_x = 1024;
1135         mv_y = 128;
1136     } else if (vme_context->mpeg2_level == MPEG2_LEVEL_HIGH) {
1137         mv_x = 2048;
1138         mv_y = 128;
1139     } else {
1140         WARN_ONCE("Incorrect Mpeg2 level setting!\n");
1141         mv_x = 512;
1142         mv_y = 64;
1143     }
1144
1145     pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
1146     if (pic_param->picture_type != VAEncPictureTypeIntra) {
1147         int qp, m_cost, j, mv_count;
1148         float   lambda, m_costf;
1149         slice_param = (VAEncSliceParameterBufferMPEG2 *)
1150             encode_state->slice_params_ext[0]->buffer;
1151         qp = slice_param->quantiser_scale_code;
1152         lambda = intel_lambda_qp(qp);
1153         /* No Intra prediction. So it is zero */
1154         vme_state_message[MODE_INTRA_8X8] = 0;
1155         vme_state_message[MODE_INTRA_4X4] = 0;
1156         vme_state_message[MODE_INTER_MV0] = 0;
1157         for (j = 1; j < 3; j++) {
1158             m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
1159             m_cost = (int)m_costf;
1160             vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f);
1161         }
1162         mv_count = 3;
1163         for (j = 4; j <= 64; j *= 2) {
1164             m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda;
1165             m_cost = (int)m_costf;
1166             vme_state_message[MODE_INTER_MV0 + mv_count] =
1167                 intel_format_lutvalue(m_cost, 0x6f);
1168             mv_count++;
1169         }
1170         m_cost = lambda;
1171         /* It can only perform the 16x16 search. So mode cost can be ignored for
1172          * the other mode. for example: 16x8/8x8
1173          */
1174         vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f);
1175         vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f);
1176                         
1177         vme_state_message[MODE_INTER_16X8] = 0;
1178         vme_state_message[MODE_INTER_8X8] = 0;
1179         vme_state_message[MODE_INTER_8X4] = 0;
1180         vme_state_message[MODE_INTER_4X4] = 0;
1181         vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f);
1182
1183     }
1184     vme_state_message[MPEG2_MV_RANGE] = (mv_y << 16) | (mv_x);
1185
1186     vme_state_message[MPEG2_PIC_WIDTH_HEIGHT] = (height_in_mbs << 16) |
1187         width_in_mbs;
1188 }
1189
1190 void
1191 gen7_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx, 
1192                                            struct encode_state *encode_state,
1193                                            int mb_width, int mb_height,
1194                                            int kernel,
1195                                            struct intel_encoder_context *encoder_context)
1196 {
1197     struct gen6_vme_context *vme_context = encoder_context->vme_context;
1198     unsigned int *command_ptr;
1199
1200 #define         MPEG2_SCOREBOARD                (1 << 21)
1201
1202     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
1203     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
1204
1205     {
1206         unsigned int mb_intra_ub, score_dep;
1207         int x_outer, y_outer, x_inner, y_inner;
1208         int xtemp_outer = 0;
1209         int first_mb = 0;
1210         int num_mb = mb_width * mb_height;
1211
1212         x_outer = 0;
1213         y_outer = 0;
1214         
1215                                  
1216         for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) {
1217             x_inner = x_outer;
1218             y_inner = y_outer;
1219             for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
1220                 mb_intra_ub = 0;
1221                 score_dep = 0;
1222                 if (x_inner != 0) {
1223                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
1224                     score_dep |= MB_SCOREBOARD_A; 
1225                 }
1226                 if (y_inner != 0) {
1227                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
1228                     score_dep |= MB_SCOREBOARD_B;
1229
1230                     if (x_inner != 0)
1231                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
1232
1233                     if (x_inner != (mb_width -1)) {
1234                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
1235                         score_dep |= MB_SCOREBOARD_C;
1236                     }
1237                 }
1238                                                         
1239                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
1240                 *command_ptr++ = kernel;
1241                 *command_ptr++ = MPEG2_SCOREBOARD;
1242                 /* Indirect data */
1243                 *command_ptr++ = 0;
1244                 /* the (X, Y) term of scoreboard */
1245                 *command_ptr++ = ((y_inner << 16) | x_inner);
1246                 *command_ptr++ = score_dep;
1247                 /*inline data */
1248                 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
1249                 *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8));
1250                 x_inner -= 2;
1251                 y_inner += 1;
1252             }
1253             x_outer += 1;
1254         }
1255
1256         xtemp_outer = mb_width - 2;
1257         if (xtemp_outer < 0)
1258             xtemp_outer = 0;
1259         x_outer = xtemp_outer;
1260         y_outer = 0;
1261         for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { 
1262             y_inner = y_outer;
1263             x_inner = x_outer;
1264             for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) {
1265                 mb_intra_ub = 0;
1266                 score_dep = 0;
1267                 if (x_inner != 0) {
1268                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
1269                     score_dep |= MB_SCOREBOARD_A; 
1270                 }
1271                 if (y_inner != 0) {
1272                     mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
1273                     score_dep |= MB_SCOREBOARD_B;
1274
1275                     if (x_inner != 0)
1276                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
1277
1278                     if (x_inner != (mb_width -1)) {
1279                         mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
1280                         score_dep |= MB_SCOREBOARD_C;
1281                     }
1282                 }
1283
1284                 *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
1285                 *command_ptr++ = kernel;
1286                 *command_ptr++ = MPEG2_SCOREBOARD;
1287                 /* Indirect data */
1288                 *command_ptr++ = 0;
1289                 /* the (X, Y) term of scoreboard */
1290                 *command_ptr++ = ((y_inner << 16) | x_inner);
1291                 *command_ptr++ = score_dep;
1292                 /*inline data */
1293                 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
1294                 *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8));
1295
1296                 x_inner -= 2;
1297                 y_inner += 1;
1298             }
1299             x_outer++;
1300             if (x_outer >= mb_width) {
1301                 y_outer += 1;
1302                 x_outer = xtemp_outer;
1303             }           
1304         }
1305     }
1306
1307     *command_ptr++ = 0;
1308     *command_ptr++ = MI_BATCH_BUFFER_END;
1309
1310     dri_bo_unmap(vme_context->vme_batchbuffer.bo);
1311     return;
1312 }
1313
1314 void
1315 intel_avc_vme_reference_state(VADriverContextP ctx,
1316                               struct encode_state *encode_state,
1317                               struct intel_encoder_context *encoder_context,
1318                               int list_index,
1319                               int surface_index,
1320                               void (* vme_source_surface_state)(
1321                                   VADriverContextP ctx,
1322                                   int index,
1323                                   struct object_surface *obj_surface,
1324                                   struct intel_encoder_context *encoder_context))
1325 {
1326     struct object_surface *obj_surface = NULL;
1327     struct i965_driver_data *i965 = i965_driver_data(ctx);
1328     VASurfaceID ref_surface_id;
1329     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
1330
1331     if (list_index == 0) {
1332         ref_surface_id = slice_param->RefPicList0[0].picture_id;
1333     } else {
1334         ref_surface_id = slice_param->RefPicList1[0].picture_id;
1335     }
1336
1337     if (ref_surface_id != VA_INVALID_SURFACE)
1338         obj_surface = SURFACE(ref_surface_id);
1339
1340     if (!obj_surface ||
1341         !obj_surface->bo)
1342         obj_surface = encode_state->reference_objects[list_index];
1343
1344     if (obj_surface &&
1345         obj_surface->bo)
1346         vme_source_surface_state(ctx, surface_index, obj_surface, encoder_context);
1347 }