2 * Copyright 2014 Advanced Micro Devices, Inc.
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
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24 #ifndef _AMDGPU_TEST_H_
25 #define _AMDGPU_TEST_H_
28 #include "amdgpu_drm.h"
31 * Define max. number of card in system which we are able to handle
33 #define MAX_CARDS_SUPPORTED 128
35 /* Forward reference for array to keep "drm" handles */
36 extern int drm_amdgpu[MAX_CARDS_SUPPORTED];
38 /* Global variables */
39 extern int open_render_node;
41 /************************* Basic test suite ********************************/
44 * Define basic test suite to serve as the starting point for future testing
48 * Initialize basic test suite
50 int suite_basic_tests_init();
53 * Deinitialize basic test suite
55 int suite_basic_tests_clean();
58 * Decide if the suite is enabled by default or not.
60 CU_BOOL suite_basic_tests_enable(void);
63 * Tests in basic test suite
65 extern CU_TestInfo basic_tests[];
68 * Initialize bo test suite
70 int suite_bo_tests_init();
73 * Deinitialize bo test suite
75 int suite_bo_tests_clean();
78 * Tests in bo test suite
80 extern CU_TestInfo bo_tests[];
83 * Initialize cs test suite
85 int suite_cs_tests_init();
88 * Deinitialize cs test suite
90 int suite_cs_tests_clean();
93 * Decide if the suite is enabled by default or not.
95 CU_BOOL suite_cs_tests_enable(void);
98 * Tests in cs test suite
100 extern CU_TestInfo cs_tests[];
103 * Initialize vce test suite
105 int suite_vce_tests_init();
108 * Deinitialize vce test suite
110 int suite_vce_tests_clean();
113 * Decide if the suite is enabled by default or not.
115 CU_BOOL suite_vce_tests_enable(void);
118 * Tests in vce test suite
120 extern CU_TestInfo vce_tests[];
123 + * Initialize vcn test suite
125 int suite_vcn_tests_init();
128 + * Deinitialize vcn test suite
130 int suite_vcn_tests_clean();
133 * Decide if the suite is enabled by default or not.
135 CU_BOOL suite_vcn_tests_enable(void);
138 + * Tests in vcn test suite
140 extern CU_TestInfo vcn_tests[];
143 * Initialize uvd enc test suite
145 int suite_uvd_enc_tests_init();
148 * Deinitialize uvd enc test suite
150 int suite_uvd_enc_tests_clean();
153 * Decide if the suite is enabled by default or not.
155 CU_BOOL suite_uvd_enc_tests_enable(void);
158 * Tests in uvd enc test suite
160 extern CU_TestInfo uvd_enc_tests[];
163 * Initialize deadlock test suite
165 int suite_deadlock_tests_init();
168 * Deinitialize deadlock test suite
170 int suite_deadlock_tests_clean();
173 * Decide if the suite is enabled by default or not.
175 CU_BOOL suite_deadlock_tests_enable(void);
178 * Tests in uvd enc test suite
180 extern CU_TestInfo deadlock_tests[];
183 * Initialize vm test suite
185 int suite_vm_tests_init();
188 * Deinitialize deadlock test suite
190 int suite_vm_tests_clean();
193 * Decide if the suite is enabled by default or not.
195 CU_BOOL suite_vm_tests_enable(void);
198 * Tests in vm test suite
200 extern CU_TestInfo vm_tests[];
204 * Initialize ras test suite
206 int suite_ras_tests_init();
209 * Deinitialize deadlock test suite
211 int suite_ras_tests_clean();
214 * Decide if the suite is enabled by default or not.
216 CU_BOOL suite_ras_tests_enable(void);
219 * Tests in ras test suite
221 extern CU_TestInfo ras_tests[];
225 * Initialize syncobj timeline test suite
227 int suite_syncobj_timeline_tests_init();
230 * Deinitialize syncobj timeline test suite
232 int suite_syncobj_timeline_tests_clean();
235 * Decide if the suite is enabled by default or not.
237 CU_BOOL suite_syncobj_timeline_tests_enable(void);
240 * Tests in syncobj timeline test suite
242 extern CU_TestInfo syncobj_timeline_tests[];
244 void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
245 void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
246 void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
248 void amdgpu_memcpy_draw_hang_slow_test(amdgpu_device_handle device_handle, uint32_t ring);
251 * Initialize security test suite
253 int suite_security_tests_init();
256 * Deinitialize security test suite
258 int suite_security_tests_clean();
261 * Decide if the suite is enabled by default or not.
263 CU_BOOL suite_security_tests_enable(void);
266 * Tests in security test suite
268 extern CU_TestInfo security_tests[];
271 amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
277 static inline amdgpu_bo_handle gpu_mem_alloc(
278 amdgpu_device_handle device_handle,
284 amdgpu_va_handle *va_handle)
286 struct amdgpu_bo_alloc_request req = {0};
287 amdgpu_bo_handle buf_handle = NULL;
290 req.alloc_size = size;
291 req.phys_alignment = alignment;
292 req.preferred_heap = type;
295 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
296 CU_ASSERT_EQUAL(r, 0);
300 if (vmc_addr && va_handle) {
301 r = amdgpu_va_range_alloc(device_handle,
302 amdgpu_gpu_va_range_general,
303 size, alignment, 0, vmc_addr,
305 CU_ASSERT_EQUAL(r, 0);
309 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0,
311 CU_ASSERT_EQUAL(r, 0);
319 r = amdgpu_va_range_free(*va_handle);
320 CU_ASSERT_EQUAL(r, 0);
323 r = amdgpu_bo_free(buf_handle);
324 CU_ASSERT_EQUAL(r, 0);
329 static inline int gpu_mem_free(amdgpu_bo_handle bo,
330 amdgpu_va_handle va_handle,
340 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0,
342 CU_ASSERT_EQUAL(r, 0);
346 r = amdgpu_va_range_free(va_handle);
347 CU_ASSERT_EQUAL(r, 0);
352 r = amdgpu_bo_free(bo);
353 CU_ASSERT_EQUAL(r, 0);
359 amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size,
360 unsigned alignment, unsigned heap, uint64_t flags,
361 amdgpu_bo_handle *bo)
363 struct amdgpu_bo_alloc_request request = {};
364 amdgpu_bo_handle buf_handle;
367 request.alloc_size = size;
368 request.phys_alignment = alignment;
369 request.preferred_heap = heap;
370 request.flags = flags;
372 r = amdgpu_bo_alloc(dev, &request, &buf_handle);
381 int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size,
382 unsigned alignment, unsigned heap, uint64_t alloc_flags,
383 uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu,
384 uint64_t *mc_address,
385 amdgpu_va_handle *va_handle);
388 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size,
389 unsigned alignment, unsigned heap, uint64_t alloc_flags,
390 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address,
391 amdgpu_va_handle *va_handle)
393 return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap,
394 alloc_flags, 0, bo, cpu, mc_address, va_handle);
398 amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle,
399 uint64_t mc_addr, uint64_t size)
401 amdgpu_bo_cpu_unmap(bo);
402 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP);
403 amdgpu_va_range_free(va_handle);
411 amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1,
412 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list)
414 amdgpu_bo_handle resources[] = {bo1, bo2};
416 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list);
420 static inline CU_ErrorCode amdgpu_set_suite_active(const char *suite_name,
423 CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suite_name), active);
425 if (r != CUE_SUCCESS)
426 fprintf(stderr, "Failed to obtain suite %s\n", suite_name);
431 static inline CU_ErrorCode amdgpu_set_test_active(const char *suite_name,
432 const char *test_name, CU_BOOL active)
435 CU_pSuite pSuite = CU_get_suite(suite_name);
438 fprintf(stderr, "Failed to obtain suite %s\n",
443 r = CU_set_test_active(CU_get_test(pSuite, test_name), active);
444 if (r != CUE_SUCCESS)
445 fprintf(stderr, "Failed to obtain test %s\n", test_name);
450 static inline bool asic_is_arcturus(uint32_t asic_id)
453 /* Arcturus asic DID */
464 #endif /* #ifdef _AMDGPU_TEST_H_ */