lib/media_fill_gen8lp.c

   1 #include <intel_bufmgr.h>
   2 #include <i915_drm.h>
   3
   4 #include "media_fill.h"
   5 #include "gen8_media.h"
   6 #include "intel_reg.h"
   7 #include "drmtest.h"
   8
   9 #include <assert.h>
  10
  11
  12 static const uint32_t media_kernel[][4] = {
  13         { 0x00400001, 0x20202288, 0x00000020, 0x00000000 },
  14         { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 },
  15         { 0x00200001, 0x20800208, 0x00450040, 0x00000000 },
  16         { 0x00000001, 0x20880608, 0x00000000, 0x000f000f },
  17         { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 },
  18         { 0x00800001, 0x20e00208, 0x00000020, 0x00000000 },
  19         { 0x00800001, 0x21200208, 0x00000020, 0x00000000 },
  20         { 0x00800001, 0x21600208, 0x00000020, 0x00000000 },
  21         { 0x0c800031, 0x24000a40, 0x0e000080, 0x120a8000 },
  22         { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 },
  23         { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 },
  24 };
  25
  26 static uint32_t
  27 batch_used(struct intel_batchbuffer *batch)
  28 {
  29         return batch->ptr - batch->buffer;
  30 }
  31
  32 static uint32_t
  33 batch_align(struct intel_batchbuffer *batch, uint32_t align)
  34 {
  35         uint32_t offset = batch_used(batch);
  36         offset = ALIGN(offset, align);
  37         batch->ptr = batch->buffer + offset;
  38         return offset;
  39 }
  40
  41 static void *
  42 batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align)
  43 {
  44         uint32_t offset = batch_align(batch, align);
  45         batch->ptr += size;
  46         return memset(batch->buffer + offset, 0, size);
  47 }
  48
  49 static uint32_t
  50 batch_offset(struct intel_batchbuffer *batch, void *ptr)
  51 {
  52         return (uint8_t *)ptr - batch->buffer;
  53 }
  54
  55 static uint32_t
  56 batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align)
  57 {
  58         return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size));
  59 }
  60
  61 static void
  62 gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
  63 {
  64         int ret;
  65
  66         ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
  67         if (ret == 0)
  68                 ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
  69                                         NULL, 0, 0, 0);
  70         igt_assert(ret == 0);
  71 }
  72
  73 static uint32_t
  74 gen8_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
  75                         uint8_t color)
  76 {
  77         uint8_t *curbe_buffer;
  78         uint32_t offset;
  79
  80         curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64);
  81         offset = batch_offset(batch, curbe_buffer);
  82         *curbe_buffer = color;
  83
  84         return offset;
  85 }
  86
  87 static uint32_t
  88 gen8_fill_surface_state(struct intel_batchbuffer *batch,
  89                         struct igt_buf *buf,
  90                         uint32_t format,
  91                         int is_dst)
  92 {
  93         struct gen8_surface_state *ss;
  94         uint32_t write_domain, read_domain, offset;
  95         int ret;
  96
  97         if (is_dst) {
  98                 write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
  99         } else {
 100                 write_domain = 0;
 101                 read_domain = I915_GEM_DOMAIN_SAMPLER;
 102         }
 103
 104         ss = batch_alloc(batch, sizeof(*ss), 64);
 105         offset = batch_offset(batch, ss);
 106
 107         ss->ss0.surface_type = GEN8_SURFACE_2D;
 108         ss->ss0.surface_format = format;
 109         ss->ss0.render_cache_read_write = 1;
 110         ss->ss0.vertical_alignment = 1; /* align 4 */
 111         ss->ss0.horizontal_alignment = 1; /* align 4 */
 112
 113         if (buf->tiling == I915_TILING_X)
 114                 ss->ss0.tiled_mode = 2;
 115         else if (buf->tiling == I915_TILING_Y)
 116                 ss->ss0.tiled_mode = 3;
 117
 118         ss->ss8.base_addr = buf->bo->offset;
 119
 120         ret = drm_intel_bo_emit_reloc(batch->bo,
 121                                 batch_offset(batch, ss) + 8 * 4,
 122                                 buf->bo, 0,
 123                                 read_domain, write_domain);
 124         igt_assert(ret == 0);
 125
 126         ss->ss2.height = igt_buf_height(buf) - 1;
 127         ss->ss2.width  = igt_buf_width(buf) - 1;
 128         ss->ss3.pitch  = buf->stride - 1;
 129
 130         ss->ss7.shader_chanel_select_r = 4;
 131         ss->ss7.shader_chanel_select_g = 5;
 132         ss->ss7.shader_chanel_select_b = 6;
 133         ss->ss7.shader_chanel_select_a = 7;
 134
 135         return offset;
 136 }
 137
 138 static uint32_t
 139 gen8_fill_binding_table(struct intel_batchbuffer *batch,
 140                         struct igt_buf *dst)
 141 {
 142         uint32_t *binding_table, offset;
 143
 144         binding_table = batch_alloc(batch, 32, 64);
 145         offset = batch_offset(batch, binding_table);
 146
 147         binding_table[0] = gen8_fill_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1);
 148
 149         return offset;
 150 }
 151
 152 static uint32_t
 153 gen8_fill_media_kernel(struct intel_batchbuffer *batch,
 154                 const uint32_t kernel[][4],
 155                 size_t size)
 156 {
 157         uint32_t offset;
 158
 159         offset = batch_copy(batch, kernel, size, 64);
 160
 161         return offset;
 162 }
 163
 164 static uint32_t
 165 gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst)
 166 {
 167         struct gen8_interface_descriptor_data *idd;
 168         uint32_t offset;
 169         uint32_t binding_table_offset, kernel_offset;
 170
 171         binding_table_offset = gen8_fill_binding_table(batch, dst);
 172         kernel_offset = gen8_fill_media_kernel(batch, media_kernel, sizeof(media_kernel));
 173
 174         idd = batch_alloc(batch, sizeof(*idd), 64);
 175         offset = batch_offset(batch, idd);
 176
 177         idd->desc0.kernel_start_pointer = (kernel_offset >> 6);
 178
 179         idd->desc2.single_program_flow = 1;
 180         idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754;
 181
 182         idd->desc3.sampler_count = 0;      /* 0 samplers used */
 183         idd->desc3.sampler_state_pointer = 0;
 184
 185         idd->desc4.binding_table_entry_count = 0;
 186         idd->desc4.binding_table_pointer = (binding_table_offset >> 5);
 187
 188         idd->desc5.constant_urb_entry_read_offset = 0;
 189         idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */
 190
 191         return offset;
 192 }
 193
 194 static void
 195 gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 196 {
 197         OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2));
 198
 199         /* general */
 200         OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
 201         OUT_BATCH(0);
 202
 203         /* stateless data port */
 204         OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
 205
 206         /* surface */
 207         OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
 208
 209         /* dynamic */
 210         OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 211                 0, BASE_ADDRESS_MODIFY);
 212
 213         /* indirect */
 214         OUT_BATCH(0);
 215         OUT_BATCH(0);
 216
 217         /* instruction */
 218         OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
 219
 220         /* general state buffer size */
 221         OUT_BATCH(0xfffff000 | 1);
 222         /* dynamic state buffer size */
 223         OUT_BATCH(1 << 12 | 1);
 224         /* indirect object buffer size */
 225         OUT_BATCH(0xfffff000 | 1);
 226         /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
 227         OUT_BATCH(1 << 12 | 1);
 228 }
 229
 230 static void
 231 gen8_emit_vfe_state(struct intel_batchbuffer *batch)
 232 {
 233         OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
 234
 235         /* scratch buffer */
 236         OUT_BATCH(0);
 237         OUT_BATCH(0);
 238
 239         /* number of threads & urb entries */
 240         OUT_BATCH(1 << 16 |
 241                 2 << 8);
 242
 243         OUT_BATCH(0);
 244
 245         /* urb entry size & curbe size */
 246         OUT_BATCH(2 << 16 |
 247                 2);
 248
 249         /* scoreboard */
 250         OUT_BATCH(0);
 251         OUT_BATCH(0);
 252         OUT_BATCH(0);
 253 }
 254
 255 static void
 256 gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
 257 {
 258         OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2));
 259         OUT_BATCH(0);
 260         /* curbe total data length */
 261         OUT_BATCH(64);
 262         /* curbe data start address, is relative to the dynamics base address */
 263         OUT_BATCH(curbe_buffer);
 264 }
 265
 266 static void
 267 gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
 268 {
 269         OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
 270         OUT_BATCH(0);
 271         /* interface descriptor data length */
 272         OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
 273         /* interface descriptor address, is relative to the dynamics base address */
 274         OUT_BATCH(interface_descriptor);
 275 }
 276
 277 static void
 278 gen8lp_emit_media_objects(struct intel_batchbuffer *batch,
 279                         unsigned x, unsigned y,
 280                         unsigned width, unsigned height)
 281 {
 282         int i, j;
 283
 284         for (i = 0; i < width / 16; i++) {
 285                 for (j = 0; j < height / 16; j++) {
 286                         OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
 287
 288                         /* interface descriptor offset */
 289                         OUT_BATCH(0);
 290
 291                         /* without indirect data */
 292                         OUT_BATCH(0);
 293                         OUT_BATCH(0);
 294
 295                         /* scoreboard */
 296                         OUT_BATCH(0);
 297                         OUT_BATCH(0);
 298
 299                         /* inline data (xoffset, yoffset) */
 300                         OUT_BATCH(x + i * 16);
 301                         OUT_BATCH(y + j * 16);
 302                 }
 303         }
 304 }
 305
 306 /*
 307  * This sets up the media pipeline,
 308  *
 309  * +---------------+ <---- 4096
 310  * |       ^       |
 311  * |       |       |
 312  * |    various    |
 313  * |      state    |
 314  * |       |       |
 315  * |_______|_______| <---- 2048 + ?
 316  * |       ^       |
 317  * |       |       |
 318  * |   batch       |
 319  * |    commands   |
 320  * |       |       |
 321  * |       |       |
 322  * +---------------+ <---- 0 + ?
 323  *
 324  */
 325
 326 #define BATCH_STATE_SPLIT 2048
 327
 328 void
 329 gen8lp_media_fillfunc(struct intel_batchbuffer *batch,
 330                 struct igt_buf *dst,
 331                 unsigned x, unsigned y,
 332                 unsigned width, unsigned height,
 333                 uint8_t color)
 334 {
 335         uint32_t curbe_buffer, interface_descriptor;
 336         uint32_t batch_end;
 337
 338         intel_batchbuffer_flush(batch);
 339
 340         /* setup states */
 341         batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 342
 343         curbe_buffer = gen8_fill_curbe_buffer_data(batch, color);
 344         interface_descriptor = gen8_fill_interface_descriptor(batch, dst);
 345         igt_assert(batch->ptr < &batch->buffer[4095]);
 346
 347         /* media pipeline */
 348         batch->ptr = batch->buffer;
 349         OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 350         gen8_emit_state_base_address(batch);
 351
 352         gen8_emit_vfe_state(batch);
 353
 354         gen8_emit_curbe_load(batch, curbe_buffer);
 355
 356         gen8_emit_interface_descriptor_load(batch, interface_descriptor);
 357
 358         gen8lp_emit_media_objects(batch, x, y, width, height);
 359
 360         OUT_BATCH(MI_BATCH_BUFFER_END);
 361
 362         batch_end = batch_align(batch, 8);
 363         igt_assert(batch_end < BATCH_STATE_SPLIT);
 364
 365         gen8_render_flush(batch, batch_end);
 366         intel_batchbuffer_reset(batch);
 367 }