1 /* Blackfin Serial Peripheral Interface (SPI) model
3 Copyright (C) 2010-2015 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
6 This file is part of simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "dv-bfin_spi.h"
27 /* XXX: This is merely a stub. */
31 /* This top portion matches common dv_bfin struct. */
33 struct hw *dma_master;
36 struct hw_event *handler;
40 /* Order after here is important -- matches hardware MMR layout. */
41 bu16 BFIN_MMR_16(ctl);
42 bu16 BFIN_MMR_16(flg);
43 bu16 BFIN_MMR_16(stat);
44 bu16 BFIN_MMR_16(tdbr);
45 bu16 BFIN_MMR_16(rdbr);
46 bu16 BFIN_MMR_16(baud);
47 bu16 BFIN_MMR_16(shadow);
49 #define mmr_base() offsetof(struct bfin_spi, ctl)
50 #define mmr_offset(mmr) (offsetof(struct bfin_spi, mmr) - mmr_base())
52 static const char * const mmr_names[] =
54 "SPI_CTL", "SPI_FLG", "SPI_STAT", "SPI_TDBR",
55 "SPI_RDBR", "SPI_BAUD", "SPI_SHADOW",
57 #define mmr_name(off) mmr_names[(off) / 4]
60 bfin_spi_enabled (struct bfin_spi *spi)
62 return (spi->ctl & SPE);
66 bfin_spi_timod (struct bfin_spi *spi)
68 return (spi->ctl & TIMOD);
72 bfin_spi_io_write_buffer (struct hw *me, const void *source, int space,
73 address_word addr, unsigned nr_bytes)
75 struct bfin_spi *spi = hw_data (me);
80 value = dv_load_2 (source);
81 mmr_off = addr - spi->base;
82 valuep = (void *)((unsigned long)spi + mmr_base() + mmr_off);
86 dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
90 case mmr_offset(stat):
91 dv_w1c_2 (valuep, value, ~(SPIF | TXS | RXS));
93 case mmr_offset(tdbr):
95 if (bfin_spi_enabled (spi) && bfin_spi_timod (spi) == TDBR_CORE)
101 case mmr_offset(rdbr):
102 case mmr_offset(ctl):
103 case mmr_offset(flg):
104 case mmr_offset(baud):
105 case mmr_offset(shadow):
109 dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
117 bfin_spi_io_read_buffer (struct hw *me, void *dest, int space,
118 address_word addr, unsigned nr_bytes)
120 struct bfin_spi *spi = hw_data (me);
124 mmr_off = addr - spi->base;
125 valuep = (void *)((unsigned long)spi + mmr_base() + mmr_off);
129 dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
133 case mmr_offset(rdbr):
134 dv_store_2 (dest, *valuep);
135 if (bfin_spi_enabled (spi) && bfin_spi_timod (spi) == RDBR_CORE)
136 spi->stat &= ~(RXS | TXS);
138 case mmr_offset(ctl):
139 case mmr_offset(stat):
140 case mmr_offset(flg):
141 case mmr_offset(tdbr):
142 case mmr_offset(baud):
143 case mmr_offset(shadow):
144 dv_store_2 (dest, *valuep);
147 dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
155 bfin_spi_dma_read_buffer (struct hw *me, void *dest, int space,
156 unsigned_word addr, unsigned nr_bytes)
158 HW_TRACE_DMA_READ ();
163 bfin_spi_dma_write_buffer (struct hw *me, const void *source,
164 int space, unsigned_word addr,
166 int violate_read_only_section)
168 HW_TRACE_DMA_WRITE ();
172 static const struct hw_port_descriptor bfin_spi_ports[] =
174 { "stat", 0, 0, output_port, },
179 attach_bfin_spi_regs (struct hw *me, struct bfin_spi *spi)
181 address_word attach_address;
183 unsigned attach_size;
184 reg_property_spec reg;
186 if (hw_find_property (me, "reg") == NULL)
187 hw_abort (me, "Missing \"reg\" property");
189 if (!hw_find_reg_array_property (me, "reg", 0, ®))
190 hw_abort (me, "\"reg\" property must contain three addr/size entries");
192 hw_unit_address_to_attach_address (hw_parent (me),
194 &attach_space, &attach_address, me);
195 hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me);
197 if (attach_size != BFIN_MMR_SPI_SIZE)
198 hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_SPI_SIZE);
200 hw_attach_address (hw_parent (me),
201 0, attach_space, attach_address, attach_size, me);
203 spi->base = attach_address;
207 bfin_spi_finish (struct hw *me)
209 struct bfin_spi *spi;
211 spi = HW_ZALLOC (me, struct bfin_spi);
213 set_hw_data (me, spi);
214 set_hw_io_read_buffer (me, bfin_spi_io_read_buffer);
215 set_hw_io_write_buffer (me, bfin_spi_io_write_buffer);
216 set_hw_dma_read_buffer (me, bfin_spi_dma_read_buffer);
217 set_hw_dma_write_buffer (me, bfin_spi_dma_write_buffer);
218 set_hw_ports (me, bfin_spi_ports);
220 attach_bfin_spi_regs (me, spi);
222 /* Initialize the SPI. */
228 const struct hw_descriptor dv_bfin_spi_descriptor[] =
230 {"bfin_spi", bfin_spi_finish,},