factor: disable x86_64 assembly code for x32 builds

The current x86_64 asm code does not work for x32 (__ILP32__) ABIs,
so disable it.  Note simply deleting the q suffix is not enough.

* src/longlong.h: Restrict x86_64 assembly to _LP64 targets,
which is consistent with other checks in longlong.h and
avoids this code on x32.
* NEWS: Mention the build fix.

diff --git a/NEWS b/NEWS
index ae7ec2a..7c0e554 100644 (file)
--- a/NEWS
+++ b/NEWS
@@ -85,6 +85,9 @@ GNU coreutils NEWS                                    -*- outline -*-
   build failure when building from modified sources, as is common practice
   for a patched distribution package.
 
+  factor now builds on x86_64 with x32 ABI, by avoiding incompatible asm.
+  [bug introduced in coreutils-8.20]
+
   The check in the root-only tests to test whether our dummy user,
   $NON_ROOT_USERNAME, is able to run binaries from the build directory
   failed.  As a result, these tests have been skipped unnecessarily.

diff --git a/src/longlong.h b/src/longlong.h
index f2b2c49..1792045 100644 (file)
--- a/src/longlong.h
+++ b/src/longlong.h
@@ -683,7 +683,7 @@ extern UWtype __MPN(udiv_qrnnd) (UWtype *, UWtype, UWtype, UWtype);
   && defined (_PA_RISC2_0) && defined (_LP64)
 /* Note the _PA_RISC2_0 above is to exclude this code from GCC with
    default -march options which doesn't support these instructions.
-   Also the width check for 'long' is to avoid ilp32 runtimes where
+   Also the width check for 'long' is to avoid ILP32 runtimes where
    GNU/Linux and narrow HP-UX kernels are known to have issues with
    clobbering of context between the add and add,dc instructions.  */
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
@@ -1006,7 +1006,9 @@ extern UWtype __MPN(udiv_qrnnd) (UWtype *, UWtype, UWtype, UWtype);
 #endif
 #endif /* 80x86 */
 
-#if defined (__amd64__) && W_TYPE_SIZE == 64
+#if defined (__amd64__) && W_TYPE_SIZE == 64 && defined (_LP64)
+/* Note the width check for 'long' is to avoid ILP32 runtimes (x32)
+   where the ABI is known to be incompatible with the following.  */
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
   __asm__ ("addq %5,%q1\n\tadcq %3,%q0"                                        \
           : "=r" (sh), "=&r" (sl)                                      \