+2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_PC32_BND
+ and R_X86_64_PLT32_BND.
+ (R_X86_64_standard): Replace R_X86_64_RELATIVE64 with
+ R_X86_64_PLT32_BND.
+ (IS_X86_64_PCREL_TYPE): Add R_X86_64_PLT32_BND.
+ (x86_64_reloc_map): Add BFD_RELOC_X86_64_PC32_BND and
+ BFD_RELOC_X86_64_PLT32_BND.
+ (elf_x86_64_check_relocs): Handle R_X86_64_PC32_BND and
+ R_X86_64_PLT32_BND.
+ (elf_x86_64_gc_sweep_hook): Likewise.
+ (elf_x86_64_relocate_section): Likewise.
+ * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_PC32_BND
+ and BFD_RELOC_X86_64_PLT32_BND.
+ * bfd-in2.h: Regenerated.
+ * libbfd.h: Likewise.
+
2013-11-15 H.J. Lu <hongjiu.lu@intel.com>
* elf32-i386.c (elf_i386_allocate_dynrelocs): Make room for
BFD_RELOC_X86_64_TLSDESC_CALL,
BFD_RELOC_X86_64_TLSDESC,
BFD_RELOC_X86_64_IRELATIVE,
+ BFD_RELOC_X86_64_PC32_BND,
+ BFD_RELOC_X86_64_PLT32_BND,
/* ns32k relocations */
BFD_RELOC_NS32K_IMM_8,
HOWTO(R_X86_64_RELATIVE64, 0, 4, 64, FALSE, 0, complain_overflow_bitfield,
bfd_elf_generic_reloc, "R_X86_64_RELATIVE64", FALSE, MINUS_ONE,
MINUS_ONE, FALSE),
+ HOWTO(R_X86_64_PC32_BND, 0, 2, 32, TRUE, 0, complain_overflow_signed,
+ bfd_elf_generic_reloc, "R_X86_64_PC32_BND", FALSE, 0xffffffff, 0xffffffff,
+ TRUE),
+ HOWTO(R_X86_64_PLT32_BND, 0, 2, 32, TRUE, 0, complain_overflow_signed,
+ bfd_elf_generic_reloc, "R_X86_64_PLT32_BND", FALSE, 0xffffffff, 0xffffffff,
+ TRUE),
/* We have a gap in the reloc numbers here.
R_X86_64_standard counts the number up to this point, and
R_X86_64_vt_offset is the value to subtract from a reloc type of
R_X86_64_GNU_VT* to form an index into this table. */
-#define R_X86_64_standard (R_X86_64_RELATIVE64 + 1)
+#define R_X86_64_standard (R_X86_64_PLT32_BND + 1)
#define R_X86_64_vt_offset (R_X86_64_GNU_VTINHERIT - R_X86_64_standard)
/* GNU extension to record C++ vtable hierarchy. */
( ((TYPE) == R_X86_64_PC8) \
|| ((TYPE) == R_X86_64_PC16) \
|| ((TYPE) == R_X86_64_PC32) \
+ || ((TYPE) == R_X86_64_PC32_BND) \
|| ((TYPE) == R_X86_64_PC64))
/* Map BFD relocs to the x86_64 elf relocs. */
{ BFD_RELOC_X86_64_TLSDESC_CALL, R_X86_64_TLSDESC_CALL, },
{ BFD_RELOC_X86_64_TLSDESC, R_X86_64_TLSDESC, },
{ BFD_RELOC_X86_64_IRELATIVE, R_X86_64_IRELATIVE, },
+ { BFD_RELOC_X86_64_PC32_BND, R_X86_64_PC32_BND,},
+ { BFD_RELOC_X86_64_PLT32_BND, R_X86_64_PLT32_BND,},
{ BFD_RELOC_VTABLE_INHERIT, R_X86_64_GNU_VTINHERIT, },
{ BFD_RELOC_VTABLE_ENTRY, R_X86_64_GNU_VTENTRY, },
};
case R_X86_64_32:
case R_X86_64_64:
case R_X86_64_PC32:
+ case R_X86_64_PC32_BND:
case R_X86_64_PC64:
case R_X86_64_PLT32:
+ case R_X86_64_PLT32_BND:
case R_X86_64_GOTPCREL:
case R_X86_64_GOTPCREL64:
if (htab->elf.dynobj == NULL)
break;
case R_X86_64_PLT32:
+ case R_X86_64_PLT32_BND:
/* This symbol requires a procedure linkage table entry. We
actually build the entry in adjust_dynamic_symbol,
because this might be a case of linking PIC code which is
case R_X86_64_PC8:
case R_X86_64_PC16:
case R_X86_64_PC32:
+ case R_X86_64_PC32_BND:
case R_X86_64_PC64:
case R_X86_64_64:
pointer:
/* We may need a .plt entry if the function this reloc
refers to is in a shared lib. */
h->plt.refcount += 1;
- if (r_type != R_X86_64_PC32 && r_type != R_X86_64_PC64)
+ if (r_type != R_X86_64_PC32
+ && r_type != R_X86_64_PC32_BND
+ && r_type != R_X86_64_PC64)
h->pointer_equality_needed = 1;
}
case R_X86_64_PC8:
case R_X86_64_PC16:
case R_X86_64_PC32:
+ case R_X86_64_PC32_BND:
case R_X86_64_PC64:
case R_X86_64_SIZE32:
case R_X86_64_SIZE64:
/* Fall thru */
case R_X86_64_PLT32:
+ case R_X86_64_PLT32_BND:
case R_X86_64_PLTOFF64:
if (h != NULL)
{
}
/* FALLTHROUGH */
case R_X86_64_PC32:
+ case R_X86_64_PC32_BND:
case R_X86_64_PC64:
case R_X86_64_PLT32:
+ case R_X86_64_PLT32_BND:
goto do_relocation;
case R_X86_64_GOTPCREL:
break;
case R_X86_64_PLT32:
+ case R_X86_64_PLT32_BND:
/* Relocation is to the entry for this symbol in the
procedure linkage table. */
case R_X86_64_PC8:
case R_X86_64_PC16:
case R_X86_64_PC32:
+ case R_X86_64_PC32_BND:
if (info->shared
&& (input_section->flags & SEC_ALLOC) != 0
&& (input_section->flags & SEC_READONLY) != 0
{
bfd_boolean fail = FALSE;
bfd_boolean branch
- = (r_type == R_X86_64_PC32
+ = ((r_type == R_X86_64_PC32
+ || r_type == R_X86_64_PC32_BND)
&& is_32bit_relative_branch (contents, rel->r_offset));
if (SYMBOL_REFERENCES_LOCAL (info, h))
"BFD_RELOC_X86_64_TLSDESC_CALL",
"BFD_RELOC_X86_64_TLSDESC",
"BFD_RELOC_X86_64_IRELATIVE",
+ "BFD_RELOC_X86_64_PC32_BND",
+ "BFD_RELOC_X86_64_PLT32_BND",
"BFD_RELOC_NS32K_IMM_8",
"BFD_RELOC_NS32K_IMM_16",
"BFD_RELOC_NS32K_IMM_32",
BFD_RELOC_X86_64_TLSDESC
ENUMX
BFD_RELOC_X86_64_IRELATIVE
+ENUMX
+ BFD_RELOC_X86_64_PC32_BND
+ENUMX
+ BFD_RELOC_X86_64_PLT32_BND
ENUMDOC
x86-64/elf relocations
+2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
+ indicate if instruction has the BND prefix. Return
+ BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
+ bnd_prefix isn't zero.
+ (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
+ if needed.
+ (output_jump): Update reloc call.
+ (output_interseg_jump): Likewise.
+ (output_disp): Likewise.
+ (output_imm): Likewise.
+ (x86_cons_fix_new): Likewise.
+ (lex_got): Add an argument, bnd_prefix, to indicate if
+ instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
+ if needed.
+ (x86_cons): Update lex_got call.
+ (i386_immediate): Likewise.
+ (i386_displacement): Likewise.
+ (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
+ BFD_RELOC_X86_64_PLT32_BND.
+ (tc_gen_reloc): Likewise.
+ * config/tc-i386-intel.c (i386_operator): Update lex_got call.
+
2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (set_other_error): New function.
int adjust = 0;
char *gotfree_input_line = lex_got (&i.reloc[this_operand],
&adjust,
- &intel_state.reloc_types);
+ &intel_state.reloc_types,
+ (i.bnd_prefix != NULL
+ || add_bnd_prefix));
if (!gotfree_input_line)
break;
reloc (unsigned int size,
int pcrel,
int sign,
+ int bnd_prefix,
bfd_reloc_code_real_type other)
{
if (other != NO_RELOC)
{
case 1: return BFD_RELOC_8_PCREL;
case 2: return BFD_RELOC_16_PCREL;
- case 4: return BFD_RELOC_32_PCREL;
+ case 4: return (bnd_prefix && object_64bit
+ ? BFD_RELOC_X86_64_PC32_BND
+ : BFD_RELOC_32_PCREL);
case 8: return BFD_RELOC_64_PCREL;
}
as_bad (_("cannot do %u byte pc-relative relocation"), size);
/* 1 possible extra opcode + 4 byte displacement go in var part.
Pass reloc in fr_var. */
- frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
+ frag_var (rs_machine_dependent, 5,
+ ((!object_64bit
+ || i.reloc[0] != NO_RELOC
+ || (i.bnd_prefix == NULL && !add_bnd_prefix))
+ ? i.reloc[0]
+ : BFD_RELOC_X86_64_PC32_BND),
+ subtype, sym, off, p);
}
static void
}
fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size,
- i.op[0].disps, 1, reloc (size, 1, 1, i.reloc[0]));
+ i.op[0].disps, 1, reloc (size, 1, 1,
+ (i.bnd_prefix != NULL
+ || add_bnd_prefix),
+ i.reloc[0]));
/* All jumps handled here are signed, but don't use a signed limit
check for 32 and 16 bit jumps as we want to allow wrap around at
}
else
fix_new_exp (frag_now, p - frag_now->fr_literal, size,
- i.op[1].imms, 0, reloc (size, 0, 0, i.reloc[1]));
+ i.op[1].imms, 0, reloc (size, 0, 0, 0, i.reloc[1]));
if (i.op[0].imms->X_op != O_constant)
as_bad (_("can't handle non absolute segment in `%s'"),
i.tm.name);
}
p = frag_more (size);
- reloc_type = reloc (size, pcrel, sign, i.reloc[n]);
+ reloc_type = reloc (size, pcrel, sign,
+ (i.bnd_prefix != NULL
+ || add_bnd_prefix),
+ i.reloc[n]);
if (GOT_symbol
&& GOT_symbol == i.op[n].disps->X_add_symbol
&& (((reloc_type == BFD_RELOC_32
sign = 0;
p = frag_more (size);
- reloc_type = reloc (size, 0, sign, i.reloc[n]);
+ reloc_type = reloc (size, 0, sign, 0, i.reloc[n]);
/* This is tough to explain. We end up with this one if we
* have operands that look like
x86_cons_fix_new (fragS *frag, unsigned int off, unsigned int len,
expressionS *exp)
{
- enum bfd_reloc_code_real r = reloc (len, 0, cons_sign, got_reloc);
+ enum bfd_reloc_code_real r = reloc (len, 0, cons_sign, 0, got_reloc);
got_reloc = NO_RELOC;
static char *
lex_got (enum bfd_reloc_code_real *rel,
int *adjust,
- i386_operand_type *types)
+ i386_operand_type *types,
+ int bnd_prefix)
{
/* Some of the relocations depend on the size of what field is to
be relocated. But in our callers i386_immediate and i386_displacement
*adjust = len;
memcpy (tmpbuf + first, past_reloc, second);
tmpbuf[first + second] = '\0';
+ if (bnd_prefix && *rel == BFD_RELOC_X86_64_PLT32)
+ *rel = BFD_RELOC_X86_64_PLT32_BND;
return tmpbuf;
}
int adjust = 0;
save = input_line_pointer;
- gotfree_input_line = lex_got (&got_reloc, &adjust, NULL);
+ gotfree_input_line = lex_got (&got_reloc, &adjust, NULL, 0);
if (gotfree_input_line)
input_line_pointer = gotfree_input_line;
save_input_line_pointer = input_line_pointer;
input_line_pointer = imm_start;
- gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
+ gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types,
+ (i.bnd_prefix != NULL
+ || add_bnd_prefix));
if (gotfree_input_line)
input_line_pointer = gotfree_input_line;
*displacement_string_end = '0';
}
#endif
- gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
+ gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types,
+ (i.bnd_prefix != NULL
+ || add_bnd_prefix));
if (gotfree_input_line)
input_line_pointer = gotfree_input_line;
&& (fixP->fx_r_type == BFD_RELOC_32_PCREL
|| fixP->fx_r_type == BFD_RELOC_64_PCREL
|| fixP->fx_r_type == BFD_RELOC_16_PCREL
- || fixP->fx_r_type == BFD_RELOC_8_PCREL)
+ || fixP->fx_r_type == BFD_RELOC_8_PCREL
+ || fixP->fx_r_type == BFD_RELOC_X86_64_PC32_BND)
&& !use_rela_relocations)
{
/* This is a hack. There should be a better way to handle this.
{
case BFD_RELOC_386_PLT32:
case BFD_RELOC_X86_64_PLT32:
+ case BFD_RELOC_X86_64_PLT32_BND:
/* Make the jump instruction point to the address of the operand. At
runtime we merely add the offset to the actual PLT entry. */
value = -4;
#endif
case BFD_RELOC_X86_64_PLT32:
+ case BFD_RELOC_X86_64_PLT32_BND:
case BFD_RELOC_X86_64_GOT32:
case BFD_RELOC_X86_64_GOTPCREL:
case BFD_RELOC_386_PLT32:
break;
case 1: code = BFD_RELOC_8_PCREL; break;
case 2: code = BFD_RELOC_16_PCREL; break;
- case 4: code = BFD_RELOC_32_PCREL; break;
+ case 4:
+ code = (fixp->fx_r_type == BFD_RELOC_X86_64_PC32_BND
+ ? fixp-> fx_r_type : BFD_RELOC_32_PCREL);
+ break;
#ifdef BFD64
case 8: code = BFD_RELOC_64_PCREL; break;
#endif
switch (code)
{
case BFD_RELOC_X86_64_PLT32:
+ case BFD_RELOC_X86_64_PLT32_BND:
case BFD_RELOC_X86_64_GOT32:
case BFD_RELOC_X86_64_GOTPCREL:
case BFD_RELOC_X86_64_TLSGD:
+2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp: Run x86-64-mpx-branch-1 and
+ x86-64-mpx-branch-2 on 64-bit ELF targets.
+ * gas/i386/x86-64-mpx-branch-1.d: New file.
+ * gas/i386/x86-64-mpx-branch-1.s: Likewise.
+ * gas/i386/x86-64-mpx-branch-2.d: Likewise.
+ * gas/i386/x86-64-mpx-branch-2.s: Likewise.
+
2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/diagnostic.s: Add tests.
run_dump_test "k1om"
run_dump_test "x86-64-localpic"
run_dump_test "debug1"
+ run_dump_test "x86-64-mpx-branch-1"
+ run_dump_test "x86-64-mpx-branch-2"
run_dump_test "x86-64-dw2-compress-2"
--- /dev/null
+#as: -J
+#objdump: -dwr
+#name: x86-64 MPX branch
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo1-0xc>:
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32_BND \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32_BND \*ABS\*\+0x10003c
+
+0+c <foo1>:
+[ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1>
+[ ]*[a-f0-9]+: f2 72 fa bnd jb c <foo1>
+[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff bnd callq c <foo1>
+[ ]*[a-f0-9]+: f2 eb 09 bnd jmp 24 <foo2>
+[ ]*[a-f0-9]+: f2 72 06 bnd jb 24 <foo2>
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
+
+0+24 <foo2>:
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32_BND foo-0x4
--- /dev/null
+ .text
+ bnd call 0x100040
+ bnd jmp 0x100040
+
+foo1:
+ bnd jmp foo1
+ bnd jb foo1
+ bnd call foo1
+ bnd jmp foo2
+ bnd jb foo2
+ bnd call foo2
+foo2:
+ bnd jmp foo
+ bnd jb foo
+ bnd call foo
+ bnd jmp foo@PLT
+ bnd jb foo@PLT
+ bnd call foo@plt
--- /dev/null
+#as: -J -madd-bnd-prefix
+#objdump: -dwr
+#name: x86-64 branch with BND prefix
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo1-0xc>:
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32_BND \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32_BND \*ABS\*\+0x10003c
+
+0+c <foo1>:
+[ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1>
+[ ]*[a-f0-9]+: f2 72 fa bnd jb c <foo1>
+[ ]*[a-f0-9]+: f2 e8 f4 ff ff ff bnd callq c <foo1>
+[ ]*[a-f0-9]+: f2 eb 09 bnd jmp 24 <foo2>
+[ ]*[a-f0-9]+: f2 72 06 bnd jb 24 <foo2>
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
+
+0+24 <foo2>:
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32_BND foo-0x4
--- /dev/null
+ .text
+ call 0x100040
+ jmp 0x100040
+
+foo1:
+ jmp foo1
+ jb foo1
+ call foo1
+ jmp foo2
+ jb foo2
+ call foo2
+foo2:
+ jmp foo
+ jb foo
+ call foo
+ jmp foo@PLT
+ jb foo@PLT
+ call foo@plt
+2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND.
+
2013-11-13 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h: Define R_AARCH64_TLS_DTPMOD64,
RELOC_NUMBER (R_X86_64_TLSDESC, 36) /* 2x64-bit TLS descriptor. */
RELOC_NUMBER (R_X86_64_IRELATIVE, 37) /* Adjust indirectly by program base */
RELOC_NUMBER (R_X86_64_RELATIVE64, 38) /* 64bit adjust by program base */
+ RELOC_NUMBER (R_X86_64_PC32_BND, 39) /* PC relative 32 bit
+ signed with BND prefix */
+ RELOC_NUMBER (R_X86_64_PLT32_BND, 40) /* 32 bit PLT address with
+ BND prefix */
RELOC_NUMBER (R_X86_64_GNU_VTINHERIT, 250) /* GNU C++ hack */
RELOC_NUMBER (R_X86_64_GNU_VTENTRY, 251) /* GNU C++ hack */
END_RELOC_NUMBERS (R_X86_64_max)
+2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ld-x86-64/mpx.exp: New file.
+ * ld-x86-64/mpx1.out: Likewise.
+ * ld-x86-64/mpx1a.c: Likewise.
+ * ld-x86-64/mpx1a.rd: Likewise.
+ * ld-x86-64/mpx1b.c: Likewise.
+ * ld-x86-64/mpx1c.c: Likewise.
+ * ld-x86-64/mpx1c.rd: Likewise.
+
2013-11-14 Will Newton <will.newton@linaro.org>
* ld-arm/script-type.sym: Remove redundant STT_FILE symbol.
--- /dev/null
+# Expect script for ELF MPX tests.
+# Copyright 2013
+# Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+#
+
+# The following tests require running the executable generated by ld,
+# or enough of a build environment to create a fully linked executable.
+# This is not commonly available when testing a cross-built linker.
+if ![isnative] {
+ return
+}
+
+# Only on Linux for now.
+if ![istarget "x86_64-*-linux*"] {
+ return
+}
+
+# Check to see if the C compiler works
+if { [which $CC] == 0 } {
+ return
+}
+
+set build_tests {
+ {"Build libmpx1a.a"
+ "" "-Wa,-madd-bnd-prefix -fPIC"
+ {mpx1a.c} {{readelf {-r --wide} mpx1a.rd}} "libmpx1a.a"}
+ {"Build libmpx1b.a"
+ "" ""
+ {mpx1b.c} {} "libmpx1b.a"}
+ {"Build libmpx1c.a"
+ "" "-Wa,-madd-bnd-prefix"
+ {mpx1c.c} {{readelf {-r --wide} mpx1c.rd}} "libmpx1c.a"}
+}
+
+run_cc_link_tests $build_tests
+
+set run_tests {
+ {"Run mpx1"
+ "tmpdir/mpx1a.o tmpdir/mpx1b.o tmpdir/mpx1c.o" ""
+ {dummy.s} "mpx1" "mpx1.out"}
+}
+
+run_ld_link_exec_tests [] $run_tests
--- /dev/null
+foo1
+foo2
--- /dev/null
+#include <stdio.h>
+
+void
+foo1 (void)
+{
+ printf ("foo1\n");
+}
--- /dev/null
+#...
+[0-9a-f ]+R_X86_64_PLT32_BND +0+ +.*
+#...
--- /dev/null
+#include <stdio.h>
+
+void
+foo2 (void)
+{
+ printf ("foo2\n");
+}
--- /dev/null
+extern void foo1 (void);
+extern void foo2 (void);
+
+int
+main (void)
+{
+ foo1 ();
+ foo2 ();
+ return 0;
+}
--- /dev/null
+#...
+[0-9a-f ]+R_X86_64_PC32_BND +0+ +.*
+#...
projects / platform / upstream / binutils.git / commitdiff