imply USE_BOOTCOMMAND
select CMD_BOOTZ if ARM && !ARM64
select CMD_BOOTI if ARM64
- select CMD_DHCP if NET
- select CMD_PXE if NET
+ select CMD_DHCP if NET && CMD_NET
+ select CMD_PXE if NET && CMD_NET
select CMD_EXT2
select CMD_EXT4
select CMD_FAT
select CMD_FS_GENERIC
- select CMD_MII if NET
+ imply CMD_MII if NET
select CMD_PING if NET
select CMD_PART if PARTITIONS
select HUSH_PARSER
- select BOOTP_BOOTPATH if NET
- select BOOTP_DNS if NET
- select BOOTP_GATEWAY if NET
- select BOOTP_HOSTNAME if NET
- select BOOTP_PXE if NET
- select BOOTP_SUBNETMASK if NET
+ select BOOTP_BOOTPATH if NET && CMD_NET
+ select BOOTP_DNS if NET && CMD_NET
+ select BOOTP_GATEWAY if NET && CMD_NET
+ select BOOTP_HOSTNAME if NET && CMD_NET
+ select BOOTP_PXE if NET && CMD_NET
+ select BOOTP_SUBNETMASK if NET && CMD_NET
select CMDLINE_EDITING
select AUTO_COMPLETE
select SYS_LONGHELP
Overwrite bootmode selected via boot mode pins to tell SPL what should
be the next boot device.
+config ZYNQ_SDHCI_MAX_FREQ
+ default 200000000
+
config SPL_ZYNQMP_ALT_BOOTMODE
hex
default 0x0 if JTAG_MODE
Add register writes to boot.bin format (max 256 pairs).
Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
+config ZYNQ_SDHCI_MAX_FREQ
+ default 52000000
+
endif
menu "Network commands"
+if NET
+
config CMD_NET
bool "bootp, tftpboot"
- select NET
default y
help
Network commands.
config CMD_DHCP
bool "dhcp"
+ depends on CMD_NET
help
Boot image via network using DHCP/TFTP protocol
config CMD_PXE
bool "pxe"
+ depends on CMD_NET
select MENU
help
Boot image via network using PXE protocol
operations such as enabling / disabling a port and
viewing/maintaining the filtering database (FDB)
+endif
+
endmenu
menu "Misc commands"
#if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO)
efi_gop_register();
#endif
-#ifdef CONFIG_NET
+#ifdef CONFIG_CMD_NET
efi_net_register();
#endif
#ifdef CONFIG_GENERATE_SMBIOS_TABLE
bootefi_device_path = efi_dp_from_part(desc, part);
} else {
-#ifdef CONFIG_NET
+#ifdef CONFIG_CMD_NET
bootefi_device_path = efi_dp_from_eth();
#endif
}
#include <miiphy.h>
#include <phy.h>
-
static char last_op[2];
static uint last_data;
static uint last_addr_lo;
case 'r':
if (pos > 1)
if (extract_reg_range(argv[pos--], &devadlo, &devadhi,
- ®lo, ®hi))
+ ®lo, ®hi))
return -1;
default:
if (pos > 1)
- if (extract_phy_range(&(argv[2]), pos - 1, &bus,
- &phydev, &addrlo, &addrhi))
+ if (extract_phy_range(&argv[2], pos - 1, &bus,
+ &phydev, &addrlo, &addrhi))
return -1;
break;
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_FLASH=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_IMLS=y
CONFIG_LOOPW=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
CONFIG_USB_MUSB_HCD=y
CONFIG_USB_AM35X=y
CONFIG_USB_STORAGE=y
+# CONFIG_REGEX is not set
# CONFIG_CMD_XIMG is not set
CONFIG_LOOPW=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_DIAG=y
CONFIG_ENV_IS_IN_FLASH=y
+# CONFIG_NET is not set
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_SERIAL=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1472k(uImage),64k(ART)"
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
+# CONFIG_NET is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTP_SUBNETMASK=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
CONFIG_MXC_GPIO=y
CONFIG_MMC_MXC=y
CONFIG_NAND=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
+# CONFIG_NET is not set
# CONFIG_MMC is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_CMD_JFFS2=y
+# CONFIG_NET is not set
CONFIG_FPGA_ALTERA=y
CONFIG_FPGA_CYCLON2=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_CMD_SF=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+# CONFIG_NET is not set
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_SF=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FAT=y
+# CONFIG_NET is not set
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_SF=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
+# CONFIG_NET is not set
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_NET is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_NET is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_NET is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_NET is not set
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
+# CONFIG_REGEX is not set
CONFIG_OF_LIBFDT=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_LED=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_LED=y
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_BCM6345_GPIO=y
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_LED=y
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_BCM6345_GPIO=y
CONFIG_DEBUG_UART_BASE=0
CONFIG_DEBUG_UART_CLOCK=0
CONFIG_ICH_SPI=y
+# CONFIG_REGEX is not set
CONFIG_EFI=y
# CONFIG_EFI_LOADER is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_BCM6345_GPIO=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPL_DM=y
+CONFIG_XILINX_GPIO=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHY_ATHEROS=y
CONFIG_PHY_BROADCOM=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_ENV_IS_IN_FLASH=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTP_DNS=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
CONFIG_SYS_OMAP24_I2C_SPEED=400000
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_NET is not set
CONFIG_MMC_MXS=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
+# CONFIG_NET is not set
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_USB_GADGET=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_BCM6345_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
+# CONFIG_NET is not set
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MII is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
+# CONFIG_REGEX is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_EFI_PARTITION is not set
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_ENV_IS_IN_MMC=y
-CONFIG_NET=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
CONFIG_OMAP3_SPI=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+# CONFIG_REGEX is not set
CONFIG_CMD_ONENAND=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+# CONFIG_REGEX is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_BCM6345_GPIO=y
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
+# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_GPIO=y
CONFIG_BCM6345_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
CONFIG_DM_MMC=y
CONFIG_STM32_SDMMC2=y
# CONFIG_PINCTRL_FULL is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
CONFIG_DM_MMC=y
CONFIG_STM32_SDMMC2=y
# CONFIG_PINCTRL_FULL is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:1m(u-boot),7m(kernel),-(rootfs)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+# CONFIG_NET is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_CF_SPI=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C1=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_PHY_MARVELL=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MII is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+# CONFIG_REGEX is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MII is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+# CONFIG_REGEX is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+# CONFIG_REGEX is not set
CONFIG_LIB_HW_RAND=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NET is not set
-CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
+# CONFIG_REGEX is not set
CONFIG_LIB_HW_RAND=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(SPL),1m(u-boot),384k(u-boot-env1),1152k(mtdoops),384k(u-boot-env2),5m(kernel),2m(fdt),-(ubi)"
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_NAND=y
+# CONFIG_NET is not set
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=1
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(SPL),1m(u-boot),384k(u-boot-env1),1152k(mtdoops),384k(u-boot-env2),5m(kernel),2m(fdt),-(ubi)"
CONFIG_CMD_UBI=y
+# CONFIG_NET is not set
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=1
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_CMD_JFFS2=y
CONFIG_MTDIDS_DEFAULT="onenand0=onenand"
# CONFIG_CMD_UBIFS is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_ONENAND=y
+# CONFIG_NET is not set
CONFIG_SYS_NS16550=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
+# CONFIG_REGEX is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_ONENAND=y
CONFIG_SYS_NS16550=y
+# CONFIG_REGEX is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_CMD_JFFS2=y
CONFIG_MTDIDS_DEFAULT="onenand0=onenand"
# CONFIG_CMD_UBIFS is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_ONENAND=y
+# CONFIG_NET is not set
CONFIG_SYS_NS16550=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
CONFIG_CMD_JFFS2=y
CONFIG_MTDIDS_DEFAULT="onenand0=onenand"
# CONFIG_CMD_UBIFS is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_ONENAND=y
+# CONFIG_NET is not set
CONFIG_SYS_NS16550=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xD2801FF8
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_SPARTAN3=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_ZYNQ_SDHCI_MAX_FREQ=52000000
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
CONFIG_DEBUG_UART=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
CONFIG_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
# CONFIG_DM_WARN is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_DM_MMC=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_PARTITIONS is not set
CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
# CONFIG_DM_WARN is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_MMC is not set
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
+# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PXA_SERIAL=y
CONFIG_USB=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
# CONFIG_PARTITIONS is not set
CONFIG_OF_EMBED=y
+# CONFIG_NET is not set
# CONFIG_DM_WARN is not set
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_DM_MMC=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
Enable FPGA driver for loading bitstream in BIT and BIN format
on Xilinx Zynq UltraScale+ (ZynqMP) device.
+config FPGA_SPARTAN3
+ bool "Enable Spartan3 FPGA driver"
+ help
+ Enable Spartan3 FPGA driver for loading in BIT format.
+
+config FPGA_ZYNQPL
+ bool "Enable Xilinx FPGA for Zynq"
+ depends on ARCH_ZYNQ
+ help
+ Enable FPGA driver for loading bitstream in BIT and BIN format
+ on Xilinx Zynq devices.
+
endmenu
of 'anonymous' GPIOs that do not belong to any device or bank.
Select a suitable value depending on your needs.
+config XILINX_GPIO
+ bool "Xilinx GPIO driver"
+ help
+ This config enable the Xilinx GPIO driver for Microblaze.
+
config CMD_TCA642X
bool "tca642x - Command to access tca642x state"
help
help
Define the maximum number of available I2C buses.
+config SYS_I2C_ZYNQ
+ bool "Xilinx I2C driver"
+ depends on ARCH_ZYNQMP || ARCH_ZYNQ
+ help
+ Support for Xilinx I2C controller.
+
+config SYS_I2C_ZYNQ_SLAVE
+ hex "Set slave addr"
+ depends on SYS_I2C_ZYNQ
+ default 0
+ help
+ Set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr.
+
+config SYS_I2C_ZYNQ_SPEED
+ int "Set I2C speed"
+ depends on SYS_I2C_ZYNQ
+ default 100000
+ help
+ Set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting.
+
+config ZYNQ_I2C0
+ bool "Xilinx I2C0 controller"
+ depends on SYS_I2C_ZYNQ
+ help
+ Enable Xilinx I2C0 controller.
+
+config ZYNQ_I2C1
+ bool "Xilinx I2C1 controller"
+ depends on SYS_I2C_ZYNQ
+ help
+ Enable Xilinx I2C1 controller.
+
config SYS_I2C_IHS
bool "gdsys IHS I2C driver"
depends on DM_I2C
This option is an SPL-variant of the I2C_EEPROM option.
See the help of I2C_EEPROM for details.
+config ZYNQ_GEM_I2C_MAC_OFFSET
+ hex "Set the I2C MAC offset"
+ default 0x0
+ help
+ Set the MAC offset for i2C.
+
if I2C_EEPROM
config SYS_I2C_EEPROM_ADDR
help
Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
+config ZYNQ_SDHCI_MAX_FREQ
+ int "Set the maximum frequency of the controller"
+ depends on MMC_SDHCI_ZYNQ
+ help
+ Set the maximum frequency of the controller.
+
+config ZYNQ_SDHCI_MIN_FREQ
+ int "Set the minimum frequency of the controller"
+ depends on MMC_SDHCI_ZYNQ
+ default 0
+ help
+ Set the minimum frequency of the controller.
+
config MMC_SUNXI
bool "Allwinner sunxi SD/MMC Host Controller support"
depends on ARCH_SUNXI && !UART0_PORT_F
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ
-# define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0
-#endif
-
struct arasan_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
break;
err = clk_enable(&priv->clocks[i]);
- if (err) {
+ if (err && err != -ENOSYS && err != -ENOTSUPP) {
pr_err("failed to enable clock %d\n", i);
clk_free(&priv->clocks[i]);
goto clk_err;
return;
swsm = E1000_READ_REG(hw, SWSM);
- if (hw->mac_type == e1000_80003es2lan) {
+ if (hw->mac_type == e1000_80003es2lan || hw->mac_type == e1000_igb) {
/* Release both semaphores. */
swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
} else
mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS);
if ((mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) &&
- !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
+ !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
int i = 0;
puts("Waiting for PHY realtime link");
putc('.');
udelay(1000);
mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
- MIIM_88E1xxx_PHY_STATUS);
+ MIIM_88E1xxx_PHY_STATUS);
}
puts(" done\n");
- udelay(500000); /* another 500 ms (results in faster booting) */
+ mdelay(500); /* another 500 ms (results in faster booting) */
} else {
if (mii_reg & MIIM_88E1xxx_PHYSTAT_LINK)
phydev->link = 1;
if (phy_interface_is_rgmii(phydev)) {
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
+ MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
- (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
+ (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
reg &= ~MIIM_88E1111_TX_DELAY;
}
phy_write(phydev,
- MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
+ MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
+ MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RGMII;
phy_write(phydev,
- MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg);
+ MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR, reg);
}
if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
+ MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_SR);
reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK);
reg |= MIIM_88E1111_HWCFG_MODE_SGMII_NO_CLK;
reg |= MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
phy_write(phydev, MDIO_DEVAD_NONE,
- MIIM_88E1111_PHY_EXT_SR, reg);
+ MIIM_88E1111_PHY_EXT_SR, reg);
}
if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
+ MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR);
reg |= (MIIM_88E1111_RX_DELAY | MIIM_88E1111_TX_DELAY);
phy_write(phydev,
- MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
+ MDIO_DEVAD_NONE, MIIM_88E1111_PHY_EXT_CR, reg);
reg = phy_read(phydev, MDIO_DEVAD_NONE,
- MIIM_88E1111_PHY_EXT_SR);
+ MIIM_88E1111_PHY_EXT_SR);
reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
reg |= 0x7 | MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
phy_write(phydev, MDIO_DEVAD_NONE,
- MIIM_88E1111_PHY_EXT_SR, reg);
+ MIIM_88E1111_PHY_EXT_SR, reg);
/* soft reset */
phy_reset(phydev);
reg = phy_read(phydev, MDIO_DEVAD_NONE,
- MIIM_88E1111_PHY_EXT_SR);
+ MIIM_88E1111_PHY_EXT_SR);
reg &= ~(MIIM_88E1111_HWCFG_MODE_MASK |
- MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
+ MIIM_88E1111_HWCFG_FIBER_COPPER_RES);
reg |= MIIM_88E1111_HWCFG_MODE_COPPER_RTBI |
MIIM_88E1111_HWCFG_FIBER_COPPER_AUTO;
phy_write(phydev, MDIO_DEVAD_NONE,
- MIIM_88E1111_PHY_EXT_SR, reg);
+ MIIM_88E1111_PHY_EXT_SR, reg);
}
/* soft reset */
* m88e1518_phy_writebits - write bits to a register
*/
void m88e1518_phy_writebits(struct phy_device *phydev,
- u8 reg_num, u16 offset, u16 len, u16 data)
+ u8 reg_num, u16 offset, u16 len, u16 data)
{
u16 reg, mask;
reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E151x_PHY_MSCR);
reg &= ~MIIM_88E151x_RGMII_RXTX_DELAY;
- if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||
+ phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
reg |= MIIM_88E151x_RGMII_RXTX_DELAY;
else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
reg |= MIIM_88E151x_RGMII_RX_DELAY;
/* Switch the page to access the led register */
pg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE);
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE,
- MIIM_88E1121_PHY_LED_PAGE);
+ MIIM_88E1121_PHY_LED_PAGE);
/* Configure leds */
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_LED_CTRL,
- MIIM_88E1121_PHY_LED_DEF);
+ MIIM_88E1121_PHY_LED_DEF);
/* Restore the page pointer */
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1121_PHY_PAGE, pg);
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_CAL_OV, 0xa2da);
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_SCR,
- MIIM_88E1xxx_PHY_MDI_X_AUTO);
+ MIIM_88E1xxx_PHY_MDI_X_AUTO);
reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_EXT_CR);
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
return ret;
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1145_PHY_LED_CONTROL,
- MIIM_88E1145_PHY_LED_DIRECT);
+ MIIM_88E1145_PHY_LED_DIRECT);
return m88e1xxx_parse_status(phydev);
}
/* Generic PHY support and helper functions */
/**
- * genphy_config_advert - sanitize and advertise auto-negotation parameters
+ * genphy_config_advert - sanitize and advertise auto-negotiation parameters
* @phydev: target phy_device struct
*
* Description: Writes MII_ADVERTISE with the appropriate values,
return changed;
}
-
/**
* genphy_setup_forced - configures/forces speed/duplex from @phydev
* @phydev: target phy_device struct
int err;
int ctl = BMCR_ANRESTART;
- phydev->pause = phydev->asym_pause = 0;
+ phydev->pause = 0;
+ phydev->asym_pause = 0;
- if (SPEED_1000 == phydev->speed)
+ if (phydev->speed == SPEED_1000)
ctl |= BMCR_SPEED1000;
- else if (SPEED_100 == phydev->speed)
+ else if (phydev->speed == SPEED_100)
ctl |= BMCR_SPEED100;
- if (DUPLEX_FULL == phydev->duplex)
+ if (phydev->duplex == DUPLEX_FULL)
ctl |= BMCR_FULLDPLX;
err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
return err;
}
-
/**
* genphy_restart_aneg - Enable and Restart Autonegotiation
* @phydev: target phy_device struct
return ctl;
}
-
/**
* genphy_config_aneg - restart auto-negotiation or write BMCR
* @phydev: target phy_device struct
{
int result;
- if (AUTONEG_ENABLE != phydev->autoneg)
+ if (phydev->autoneg != AUTONEG_ENABLE)
return genphy_setup_forced(phydev);
result = genphy_config_advert(phydev);
return result;
if (result == 0) {
- /* Advertisment hasn't changed, but maybe aneg was never on to
- * begin with? Or maybe phy was isolated? */
+ /*
+ * Advertisment hasn't changed, but maybe aneg was never on to
+ * begin with? Or maybe phy was isolated?
+ */
int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
if (ctl < 0)
result = 1; /* do restart aneg */
}
- /* Only restart aneg if we are advertising something different
- * than we were before. */
+ /*
+ * Only restart aneg if we are advertising something different
+ * than we were before.
+ */
if (result > 0)
result = genphy_restart_aneg(phydev);
int i = 0;
printf("%s Waiting for PHY auto negotiation to complete",
- phydev->dev->name);
+ phydev->dev->name);
while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
/*
* Timeout reached ?
*/
gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
if (gblpa < 0) {
- debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
+ debug("Could not read MII_STAT1000. ");
+ debug("Ignoring gigabit capability\n");
gblpa = 0;
}
gblpa &= phy_read(phydev,
if (lpa & LPA_100FULL)
phydev->duplex = DUPLEX_FULL;
- } else if (lpa & LPA_10FULL)
+ } else if (lpa & LPA_10FULL) {
phydev->duplex = DUPLEX_FULL;
+ }
/*
* Extended status may indicate that the PHY supports
{
int err = 0;
- phydev->advertising = phydev->supported = phydev->drv->features;
+ phydev->advertising = phydev->drv->features;
+ phydev->supported = phydev->drv->features;
+
phydev->mmds = phydev->drv->mmds;
if (phydev->drv->probe)
}
static struct phy_driver *get_phy_driver(struct phy_device *phydev,
- phy_interface_t interface)
+ phy_interface_t interface)
{
struct list_head *entry;
int phy_id = phydev->phy_id;
{
struct phy_device *dev;
- /* We allocate the device, and initialize the
- * default values */
+ /*
+ * We allocate the device, and initialize the
+ * default values
+ */
dev = malloc(sizeof(*dev));
if (!dev) {
printf("Failed to allocate PHY device for %s:%d\n",
- bus->name, addr);
+ bus->name, addr);
return NULL;
}
{
int phy_reg;
- /* Grab the bits from PHYIR1, and put them
- * in the upper half */
+ /*
+ * Grab the bits from PHYIR1, and put them
+ * in the upper half
+ */
phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
if (phy_reg < 0)
}
static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
- unsigned phy_mask, int devad, phy_interface_t interface)
+ uint phy_mask, int devad,
+ phy_interface_t interface)
{
u32 phy_id = 0xffffffff;
+
while (phy_mask) {
int addr = ffs(phy_mask) - 1;
int r = get_phy_id(bus, addr, devad, &phy_id);
}
static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
- unsigned phy_mask, phy_interface_t interface)
+ uint phy_mask,
+ phy_interface_t interface)
{
/* If we have one, return the existing device, with new interface */
while (phy_mask) {
int addr = ffs(phy_mask) - 1;
+
if (bus->phymap[addr]) {
bus->phymap[addr]->interface = interface;
return bus->phymap[addr];
}
static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
- unsigned phy_mask, phy_interface_t interface)
+ uint phy_mask,
+ phy_interface_t interface)
{
int i;
struct phy_device *phydev;
/* Otherwise we have to try Clause 45 */
for (i = 0; i < 5; i++) {
phydev = create_phy_by_mask(bus, phy_mask,
- i ? i : MDIO_DEVAD_NONE, interface);
+ i ? i : MDIO_DEVAD_NONE, interface);
if (IS_ERR(phydev))
return NULL;
if (phydev)
debug("\n%s PHY: ", bus->name);
while (phy_mask) {
int addr = ffs(phy_mask) - 1;
+
debug("%d ", addr);
phy_mask &= ~(1 << addr);
}
}
/**
- * get_phy_device - reads the specified PHY device and returns its @phy_device struct
+ * get_phy_device - reads the specified PHY device and returns its
+ * @phy_device struct
* @bus: the target MII bus
* @addr: PHY address on the MII bus
*
return phy_reset(phydev);
}
-struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
- phy_interface_t interface)
+struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
+ phy_interface_t interface)
{
/* Reset the bus */
if (bus->reset) {
bus->reset(bus);
/* Wait 15ms to make sure the PHY has come out of hard reset */
- udelay(15000);
+ mdelay(15);
}
return get_phy_device_by_mask(bus, phy_mask, interface);
phy_reset(phydev);
if (phydev->dev && phydev->dev != dev) {
printf("%s:%d is connected to %s. Reconnecting to %s\n",
- phydev->bus->name, phydev->addr,
- phydev->dev->name, dev->name);
+ phydev->bus->name, phydev->addr,
+ phydev->dev->name, dev->name);
}
phydev->dev = dev;
debug("%s connected to %s\n", dev->name, phydev->drv->name);
#ifdef CONFIG_DM_ETH
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
- struct udevice *dev, phy_interface_t interface)
+ struct udevice *dev,
+ phy_interface_t interface)
#else
struct phy_device *phy_connect(struct mii_dev *bus, int addr,
- struct eth_device *dev, phy_interface_t interface)
+ struct eth_device *dev,
+ phy_interface_t interface)
#endif
{
struct phy_device *phydev = NULL;
#ifdef CONFIG_PHY_FIXED
int sn;
const char *name;
+
sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
while (sn > 0) {
name = fdt_get_name(gd->fdt_blob, sn, NULL);
- if (name != NULL && strcmp(name, "fixed-link") == 0) {
+ if (name && strcmp(name, "fixed-link") == 0) {
phydev = phy_device_create(bus,
sn, PHY_FIXED_ID, interface);
break;
sn = fdt_next_subnode(gd->fdt_blob, sn);
}
#endif
- if (phydev == NULL)
+ if (!phydev)
phydev = phy_find_by_mask(bus, 1 << addr, interface);
if (phydev)
.shutdown = &genphy_shutdown,
};
+static struct phy_driver lan8741_driver = {
+ .name = "SMSC LAN8741",
+ .uid = 0x0007c120,
+ .mask = 0xffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config = &genphy_config_aneg,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
static struct phy_driver lan8742_driver = {
.name = "SMSC LAN8742",
.uid = 0x0007c130,
phy_register(&lan911x_driver);
phy_register(&lan8700_driver);
phy_register(&lan8740_driver);
+ phy_register(&lan8741_driver);
phy_register(&lan8742_driver);
return 0;
#include <asm/processor.h>
#include <asm/io.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#ifndef CONFIG_DM_ETH
/* Default initializations for TSEC controllers. */
* to the register offset used for external PHY accesses
*/
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
- 0, TBI_ANA, TBIANA_SETTINGS);
+ 0, TBI_ANA, TBIANA_SETTINGS);
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
- 0, TBI_TBICON, TBICON_CLK_SELECT);
+ 0, TBI_TBICON, TBICON_CLK_SELECT);
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
- 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
+ 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
}
#ifdef CONFIG_MCAST_TFTP
whichbit = (result >> 24) & 0x1f; /* the 5 LSB = which bit to set */
whichreg = result >> 29; /* the 3 MSB = which reg to set it in */
- value = 1 << (31-whichbit);
+ value = BIT(31 - whichbit);
if (set)
setbits_be32(®s->hash.gaddr0 + whichreg, value);
out_be32(®s->attr, ATTR_INIT_SETTINGS);
out_be32(®s->attreli, ATTRELI_INIT_SETTINGS);
-
}
/*
out_be32(®s->maccfg2, maccfg2);
printf("Speed: %d, %s duplex%s\n", phydev->speed,
- (phydev->duplex) ? "full" : "half",
- (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
+ (phydev->duplex) ? "full" : "half",
+ (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
}
/*
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec __iomem *regs = priv->regs;
- uint16_t status;
+ u16 status;
int result = 0;
int i;
while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
int length = in_be16(&priv->rxbd[priv->rx_idx].length);
- uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
+ u16 status = in_be16(&priv->rxbd[priv->rx_idx].status);
uchar *packet = net_rx_packets[priv->rx_idx];
/* Send the packet up if there were no errors */
if (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
int length = in_be16(&priv->rxbd[priv->rx_idx].length);
- uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
- uint32_t buf;
+ u16 status = in_be16(&priv->rxbd[priv->rx_idx].status);
+ u32 buf;
/* Send the packet up if there were no errors */
if (!(status & RXBD_STATS)) {
static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length)
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
- uint16_t status;
+ u16 status;
out_be16(&priv->rxbd[priv->rx_idx].length, 0);
clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
do {
- uint16_t status;
+ u16 status;
+
tsec_send(priv->dev, (void *)pkt, sizeof(pkt));
/* Wait for buffer to be received */
static void startup_tsec(struct tsec_private *priv)
{
struct tsec __iomem *regs = priv->regs;
- uint16_t status;
+ u16 status;
int i;
/* reset the indices to zero */
* This allows U-Boot to find the first active controller.
*/
#ifndef CONFIG_DM_ETH
-static int tsec_init(struct eth_device *dev, bd_t * bd)
+static int tsec_init(struct eth_device *dev, bd_t *bd)
#else
static int tsec_init(struct udevice *dev)
#endif
}
if (ecntrl & ECNTRL_REDUCED_MODE) {
+ phy_interface_t interface;
+
if (ecntrl & ECNTRL_REDUCED_MII_MODE)
return PHY_INTERFACE_MODE_RMII;
- else {
- phy_interface_t interface = priv->interface;
-
- /*
- * This isn't autodetected, so it must
- * be set by the platform code.
- */
- if ((interface == PHY_INTERFACE_MODE_RGMII_ID) ||
- (interface == PHY_INTERFACE_MODE_RGMII_TXID) ||
- (interface == PHY_INTERFACE_MODE_RGMII_RXID))
- return interface;
-
- return PHY_INTERFACE_MODE_RGMII;
- }
+
+ interface = priv->interface;
+
+ /*
+ * This isn't autodetected, so it must
+ * be set by the platform code.
+ */
+ if (interface == PHY_INTERFACE_MODE_RGMII_ID ||
+ interface == PHY_INTERFACE_MODE_RGMII_TXID ||
+ interface == PHY_INTERFACE_MODE_RGMII_RXID)
+ return interface;
+
+ return PHY_INTERFACE_MODE_RGMII;
}
if (priv->flags & TSEC_GIGABIT)
int i;
struct tsec_private *priv;
- dev = (struct eth_device *)malloc(sizeof *dev);
+ dev = (struct eth_device *)malloc(sizeof(*dev));
- if (NULL == dev)
+ if (!dev)
return 0;
- memset(dev, 0, sizeof *dev);
+ memset(dev, 0, sizeof(*dev));
priv = (struct tsec_private *)malloc(sizeof(*priv));
- if (NULL == priv)
+ if (!priv) {
+ free(dev);
return 0;
+ }
priv->regs = tsec_info->regs;
priv->phyregs_sgmii = tsec_info->miiregs_sgmii;
int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsecs, int num)
{
int i;
- int ret, count = 0;
+ int count = 0;
for (i = 0; i < num; i++) {
- ret = tsec_initialize(bis, &tsecs[i]);
+ int ret = tsec_initialize(bis, &tsecs[i]);
+
if (ret > 0)
count += ret;
}
struct tsec_private *priv = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_platdata(dev);
struct fsl_pq_mdio_info mdio_info;
- int offset = 0;
- int reg;
+ struct ofnode_phandle_args phandle_args;
+ ofnode parent;
const char *phy_mode;
int ret;
- pdata->iobase = (phys_addr_t)devfdt_get_addr(dev);
+ pdata->iobase = (phys_addr_t)dev_read_addr(dev);
priv->regs = (struct tsec *)pdata->iobase;
- offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
- "phy-handle");
- if (offset > 0) {
- reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
- priv->phyaddr = reg;
- } else {
+ if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+ &phandle_args)) {
debug("phy-handle does not exist under tsec %s\n", dev->name);
return -ENOENT;
+ } else {
+ int reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
+
+ priv->phyaddr = reg;
}
- offset = fdt_parent_offset(gd->fdt_blob, offset);
- if (offset > 0) {
- reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
+ parent = ofnode_get_parent(phandle_args.node);
+ if (ofnode_valid(parent)) {
+ int reg = ofnode_read_u32_default(parent, "reg", 0);
priv->phyregs_sgmii = (struct tsec_mii_mng *)(reg + 0x520);
} else {
debug("No parent node for PHY?\n");
return -ENOENT;
}
- offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
- "tbi-handle");
- if (offset > 0) {
- reg = fdtdec_get_int(gd->fdt_blob, offset, "reg",
- CONFIG_SYS_TBIPA_VALUE);
- priv->tbiaddr = reg;
- } else {
+ if (dev_read_phandle_with_args(dev, "tbi-handle", NULL, 0, 0,
+ &phandle_args)) {
priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE;
+ } else {
+ int reg = ofnode_read_u32_default(phandle_args.node, "reg",
+ CONFIG_SYS_TBIPA_VALUE);
+ priv->tbiaddr = reg;
}
- phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
- "phy-connection-type", NULL);
+ phy_mode = dev_read_prop(dev, "phy-connection-type", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
* FPGA
*/
#define CONFIG_FPGA_COUNT 1
-#define CONFIG_FPGA_SPARTAN3
#define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_CHECK_CTRLC
#define CONFIG_SYS_LOAD_ADDR 0x20000
#define CONFIG_FPGA_COUNT 1
-#define CONFIG_FPGA_SPARTAN3
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_WAIT 1000
/* gpio */
#ifdef XILINX_GPIO_BASEADDR
-# define CONFIG_XILINX_GPIO
# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
#endif
/*
* FPGA
*/
-#define CONFIG_FPGA_SPARTAN3
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_WAIT 10000
#define CONFIG_MAX_FPGA_DEVICES 1
#ifndef __CONFIG_SYZYGY_HUB_H
#define __CONFIG_SYZYGY_HUB_H
-#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x57
-#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA
#define CONFIG_EXTRA_ENV_SETTINGS \
"fit_image=fit.itb\0" \
#ifndef __CONFIG_TOPIC_MIAMI_H
#define __CONFIG_TOPIC_MIAMI_H
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
/* Speed up boot time by ignoring the environment which we never used */
"fi; fi; run $modeboot"
#undef CONFIG_DISPLAY_BOARDINFO
-/* Further tweaks to reduce image size */
-#undef CONFIG_CMD_NET
-
#endif /* __CONFIG_TOPIC_MIAMI_H */
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
/* FPGA config options */
-#define CONFIG_FPGA_SPARTAN3
#define CONFIG_FPGA_COUNT 1
/* USB EHCI options */
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_SUPPORT_EMMC_BOOT
-# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
-# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
-# endif
#endif
#ifdef CONFIG_NAND_ARASAN
/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
#endif
/* EEPROM */
#ifndef __CONFIG_ZYNQMP_EP_H
#define __CONFIG_ZYNQMP_EP_H
-#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
-#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
#define CONFIG_ZYNQ_EEPROM
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR}
#define __CONFIG_ZYNQMP_ZCU102_H
#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 18
#define CONFIG_SYS_I2C_BUSES { \
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
-#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_PCA953X
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
-#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0x20
#include <configs/xilinx_zynqmp.h>
#define CONFIG_MTD_DEVICE
#endif
-/* MMC */
-#if defined(CONFIG_MMC_SDHCI_ZYNQ)
-# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
-#endif
-
#ifdef CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI
# define DFU_ALT_INFO
#endif
-#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
-#define CONFIG_SYS_I2C_ZYNQ
-#endif
-
/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
#endif
/* EEPROM */
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-/* Enable the PL to be downloaded */
-#define CONFIG_FPGA_ZYNQPL
/* FIT support */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
#ifndef __CONFIG_ZYNQ_ZC70X_H
#define __CONFIG_ZYNQ_ZC70X_H
-#define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_EEPROM
#include <configs/zynq-common.h>
#ifndef __CONFIG_ZYNQ_ZYBO_H
#define __CONFIG_ZYNQ_ZYBO_H
-#define CONFIG_ZYNQ_I2C0
-#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x50
-#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA
#define CONFIG_DISPLAY
#define CONFIG_I2C_EDID
#define DNS_CALLBACK
#endif
-#ifdef CONFIG_NET
+#ifdef CONFIG_CMD_NET
#define NET_CALLBACKS \
"bootfile:bootfile," \
"ipaddr:ipaddr," \
obj-$(CONFIG_LCD) += efi_gop.o
obj-$(CONFIG_DM_VIDEO) += efi_gop.o
obj-$(CONFIG_PARTITIONS) += efi_disk.o
-obj-$(CONFIG_NET) += efi_net.o
+obj-$(CONFIG_CMD_NET) += efi_net.o
obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += efi_smbios.o
return start;
}
-#ifdef CONFIG_NET
+#ifdef CONFIG_CMD_NET
struct efi_device_path *efi_dp_from_eth(void)
{
struct efi_device_path_mac_addr *ndp;
menuconfig NET
bool "Networking support"
+ default y
if NET
config NET_TFTP_VARS
bool "Control TFTP timeout and count through environment"
+ depends on CMD_NET
default y
help
If set, allows controlling the TFTP timeout through the
config BOOTP_BOOTPATH
bool "Enable BOOTP BOOTPATH"
+ depends on CMD_NET
config BOOTP_DNS
bool "Enable bootp DNS"
+ depends on CMD_NET
config BOOTP_GATEWAY
bool "Enable BOOTP gateway"
+ depends on CMD_NET
config BOOTP_HOSTNAME
bool "Enable BOOTP hostname"
+ depends on CMD_NET
config BOOTP_PXE
bool "Enable BOOTP PXE"
+ depends on CMD_NET
config BOOTP_SUBNETMASK
bool "Enable BOOTP subnetmask"
+ depends on CMD_NET
+ depends on CMD_NET
config BOOTP_PXE_CLIENTARCH
hex
+ depends on CMD_NET
default 0x16 if ARM64
default 0x15 if ARM
default 0 if X86
config BOOTP_VCI_STRING
string
+ depends on CMD_NET
default "U-Boot.armv7" if CPU_V7 || CPU_V7M
default "U-Boot.armv8" if ARM64
default "U-Boot.arm" if ARM
projects / platform / kernel / u-boot.git / commitdiff